JPH04279016A - Manufacture of chip type electrical double-layer capacitor - Google Patents
Manufacture of chip type electrical double-layer capacitorInfo
- Publication number
- JPH04279016A JPH04279016A JP91349A JP34991A JPH04279016A JP H04279016 A JPH04279016 A JP H04279016A JP 91349 A JP91349 A JP 91349A JP 34991 A JP34991 A JP 34991A JP H04279016 A JPH04279016 A JP H04279016A
- Authority
- JP
- Japan
- Prior art keywords
- layer capacitor
- double layer
- electric double
- lead terminal
- case
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 31
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 6
- 238000000034 method Methods 0.000 claims abstract description 14
- 239000011347 resin Substances 0.000 claims abstract description 10
- 229920005989 resin Polymers 0.000 claims abstract description 10
- 238000005452 bending Methods 0.000 claims abstract description 4
- 238000007493 shaping process Methods 0.000 claims abstract description 3
- 238000000605 extraction Methods 0.000 claims 1
- 238000000465 moulding Methods 0.000 abstract description 9
- 239000002184 metal Substances 0.000 description 7
- 239000004734 Polyphenylene sulfide Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 238000005266 casting Methods 0.000 description 1
- 229920006351 engineering plastic Polymers 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/13—Energy storage using capacitors
Abstract
Description
【0001】0001
【産業上の利用分野】本発明はチップ型電気二重層コン
デンサの製造方法に関し、特にケース形成工程に関する
。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip type electric double layer capacitor, and more particularly to a case forming process.
【0002】0002
【従来の技術】従来の電気二重層コンデンサは、図4に
示すように、複数個直列に積層された電気二重層コンデ
ンサ素子1の下面部1aと接触したリード端子板2cと
、上面部1bと金属ケース5を介して電気的に接続され
たリード端子板2dを各々断面略U字形に折り曲げ加工
を施こし、外部電極としていた。この従来のチップ型電
気二重層コンデンサの場合、折り曲げられたリード端子
板2c,2dと金属ケース5が電気的に接触しない様に
絶縁スリープ7で離間されている。2. Description of the Related Art As shown in FIG. 4, a conventional electric double layer capacitor has a lead terminal plate 2c in contact with a lower surface portion 1a of a plurality of electric double layer capacitor elements 1 stacked in series, and an upper surface portion 1b. The lead terminal plates 2d electrically connected via the metal case 5 were each bent into a substantially U-shaped cross section to serve as external electrodes. In the case of this conventional chip type electric double layer capacitor, the bent lead terminal plates 2c, 2d and the metal case 5 are separated by an insulating sleeve 7 so that they do not come into electrical contact.
【0003】また、金属ケース5内に於いても電気二重
層素子1の側面に露出している電極(図示省略)が金属
ケース5と電気的に接触しない様に絶縁ケース6にて離
間されている。更に製品底面部のリード端子板2c,2
dの密閉性を確保する為、封止用樹脂8が塗布され組み
立てられていた。[0003]Also, even within the metal case 5, the electrodes (not shown) exposed on the side surfaces of the electric double layer element 1 are separated by an insulating case 6 so that they do not come into electrical contact with the metal case 5. There is. Furthermore, the lead terminal plates 2c, 2 on the bottom of the product
In order to ensure the sealability of d, a sealing resin 8 was applied and assembled.
【0004】0004
【発明が解決しようとする課題】従来の電気二重層コン
デンサは、本来コンデンサの機能を有する電気二重層コ
ンデンサ素子1以外に電気的接続・絶縁用に金属ケース
5絶縁ケース6絶縁スリーブ7および封止用樹脂8等の
部材が必要となるためコスト高である問題点があった。[Problems to be Solved by the Invention] A conventional electric double layer capacitor has, in addition to an electric double layer capacitor element 1 which originally has the function of a capacitor, a metal case 5 for electrical connection and insulation, and a metal case 5 for electrical connection and insulation. Since members such as the resin 8 are required, there is a problem in that the cost is high.
【0005】本発明の目的は、簡易な構造で従来のよう
な多くの外装部材を必要とすることなく、コストを低下
させることができるチップ型電気二重層コンデンサの製
造方法を提供することにある。An object of the present invention is to provide a method for manufacturing a chip-type electric double layer capacitor that has a simple structure, does not require many exterior members as in the past, and can reduce costs. .
【0006】[0006]
【課題を解決するための手段】本発明のチップ型電気二
重層コンデンサの製造方法は、複数個直列に積層された
電気二重層コンデンサ素子の両端部に外部導出用リード
端子板を設置し、このリード端子板の一部を各々成形金
型で挟持固定する工程と、成形金型内に樹脂を注型し、
外装ケースを形成する工程と、外装ケース側面から導出
された各々のリード端子を同一方向に折り曲げ整形する
工程とを含んで構成される。[Means for Solving the Problems] The method for manufacturing a chip-type electric double layer capacitor of the present invention includes installing lead terminal plates for leading to the outside at both ends of a plurality of electric double layer capacitor elements stacked in series. A process of clamping and fixing a part of the lead terminal board with each mold, and pouring resin into the mold.
The method includes a step of forming an outer case, and a step of bending and shaping each lead terminal led out from the side surface of the outer case in the same direction.
【0007】[0007]
【実施例】次に本発明について図面を参照して説明する
。図1は本発明の一実施例のチップ型電気二重層コンデ
ンサの断面図である。また、図2は本発明の特徴を示す
ケース成形工程を表わす側面図、図3は本発明の一実施
例の外形図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a sectional view of a chip type electric double layer capacitor according to an embodiment of the present invention. Further, FIG. 2 is a side view showing a case molding process showing the features of the present invention, and FIG. 3 is an external view of an embodiment of the present invention.
【0008】図2において、直列に積層された電気二重
層コンデンサ素子1の両端部には各々リード端子板2a
,2bが接触している。このリード端子板2a,2bは
各々電気二重層コンデンサ素子1の側面に一層毎露出し
ている電極(図示省略)から離間し、直列に積層された
電気二重層コンデンサ素子1の略中央部から外周方向へ
折り曲げ加工が加えられている。この状態で外装ケース
3を成形する為、成形金型4a,4bに収納される。
成形用樹脂としてはチップ部品として要求される耐熱性
を満足する為、PPS(ポリフェニレンサルファイド)
樹脂等の所謂エンプラが使用される。本発明の場合はリ
ード端子板2a,2bを介して電気二重層コンデンサ素
子が、成形金型4a,4b内に於いて、外装ケース3を
成形する樹脂の注入圧力で移動しない様、成形金型4a
,4bの一部に凸部4c,4dを設け挟持固定する。
この凸部4c,4dは電気二重層コンデンサ素子1を加
圧し、各々の電気二重層コンデンサ素子1間の導通抵抗
を下げる効果も同時に有している。凸部4c,4dにて
挟持固定された後樹脂が注型される為、図3に示した様
に外装ケース3の一部に凹部3a,3bが形成される。
ケース3が成形された後、ケース3から外部へ引き出さ
れている。リード端子板2a,2bを所定の電極形状に
折り曲げ、図1に示す様なチップ型電気二重層コンデン
サが完成される。In FIG. 2, lead terminal plates 2a are provided at both ends of the electric double layer capacitor elements 1 stacked in series.
, 2b are in contact. These lead terminal plates 2a and 2b are spaced apart from electrodes (not shown) exposed layer by layer on the side surfaces of the electric double layer capacitor element 1, and are arranged from approximately the center to the outer periphery of the electric double layer capacitor element 1 stacked in series. A bending process has been added in the direction. In this state, in order to mold the exterior case 3, it is housed in molding molds 4a and 4b. PPS (polyphenylene sulfide) is used as the molding resin to satisfy the heat resistance required for chip parts.
So-called engineering plastics such as resin are used. In the case of the present invention, the electric double layer capacitor element is placed in the molding molds 4a, 4b via the lead terminal plates 2a, 2b so that it does not move due to the injection pressure of the resin used to mold the exterior case 3. 4a
, 4b are provided with convex portions 4c, 4d and clamped and fixed. The convex portions 4c and 4d simultaneously have the effect of pressurizing the electric double layer capacitor element 1 and lowering the conduction resistance between the electric double layer capacitor elements 1. Since the resin is cast after being clamped and fixed by the convex parts 4c and 4d, concave parts 3a and 3b are formed in a part of the exterior case 3, as shown in FIG. After the case 3 is molded, it is pulled out from the case 3. The lead terminal plates 2a and 2b are bent into a predetermined electrode shape to complete a chip type electric double layer capacitor as shown in FIG.
【0009】[0009]
【発明の効果】以上説明したように本発明は、電気二重
層コンデンサ素子とリード端子が挟持固定されたのち、
注型して外装ケースが形成されるため、外装ケースが一
体化されて、チップ部品となる為、従来の様な多くの部
材を必要としない為、コスト安という利点を有している
。[Effects of the Invention] As explained above, in the present invention, after the electric double layer capacitor element and the lead terminal are clamped and fixed,
Since the outer case is formed by casting, the outer case is integrated and becomes a chip component, so it does not require as many members as in the conventional case, so it has the advantage of low cost.
【図1】本発明の一実施例により形成されたチップ型電
気二重層コンデンサの断面図である。FIG. 1 is a sectional view of a chip type electric double layer capacitor formed according to an embodiment of the present invention.
【図2】本発明の一実施例を説明するための成形工程の
側面図である。FIG. 2 is a side view of a molding process for explaining one embodiment of the present invention.
【図3】本発明の一実施例により形成されたチップ型電
気二重層コンデンサの上面図,側面図および下面図であ
る。FIG. 3 is a top view, a side view, and a bottom view of a chip type electric double layer capacitor formed according to an embodiment of the present invention.
【図4】従来例を説明するための従来の電気二重層コン
デンサの断面図である。FIG. 4 is a sectional view of a conventional electric double layer capacitor for explaining a conventional example.
1 電気二重層コンデンサ素子
1a (電気二重層コンデンサ素子の)上面部1
b (電気二重層コンデンサ素子の)下面部2a
,2b,2c,2d リード端子板3 外
装ケース
3a,3b 外装ケースの凹部
4a,4b 成形金型
4c,4d 成形金型の凸部
5 金属ケース
6 絶縁ケース
7 絶縁スリーブ
8 封止用樹脂1 Electric double layer capacitor element 1a (of the electric double layer capacitor element) Upper surface part 1
b Lower surface part 2a (of the electric double layer capacitor element)
, 2b, 2c, 2d Lead terminal plate 3 Exterior case 3a, 3b Recessed portions 4a, 4b of exterior case Molding mold 4c, 4d Convex portion of molding mold 5 Metal case 6 Insulating case 7 Insulating sleeve 8 Sealing resin
Claims (1)
ンデンサ素子の両端部に外部導出用リード端子板を設置
し、前記リード端子板の一部を各々成形金型で挟持固定
する工程と、前記成形金型内に樹脂を注型し、外装ケー
スを形成する工程と、前記外装ケース側面から導出され
た各々のリード端子を同一方向に折り曲げ整形する工程
とを含むことを特徴とするチップ型電気二重層コンデン
サの製造方法。1. A step of installing lead terminal plates for external extraction at both ends of a plurality of electric double layer capacitor elements stacked in series, and clamping and fixing a part of the lead terminal plates with respective molds, A chip mold characterized by comprising the steps of: pouring resin into the mold to form an exterior case; and shaping each lead terminal led out from the side surface of the exterior case by bending in the same direction. Method for manufacturing electric double layer capacitors.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP91349A JPH04279016A (en) | 1991-01-08 | 1991-01-08 | Manufacture of chip type electrical double-layer capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP91349A JPH04279016A (en) | 1991-01-08 | 1991-01-08 | Manufacture of chip type electrical double-layer capacitor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04279016A true JPH04279016A (en) | 1992-10-05 |
Family
ID=11471366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP91349A Pending JPH04279016A (en) | 1991-01-08 | 1991-01-08 | Manufacture of chip type electrical double-layer capacitor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04279016A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0528024U (en) * | 1991-09-20 | 1993-04-09 | エルナー株式会社 | Electric double layer capacitor |
-
1991
- 1991-01-08 JP JP91349A patent/JPH04279016A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0528024U (en) * | 1991-09-20 | 1993-04-09 | エルナー株式会社 | Electric double layer capacitor |
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