JPH04273076A - Electrostatic breakdown tester for ic - Google Patents

Abstract

PURPOSE:To automate an electrostatic breakdown tester for IC. CONSTITUTION:Regularity is given to the back side of a performance board 60 provided with an IC 40 to be tested to form an arranged conductive pad 62 and electrically-connect the respective terminals of the IC to be tested to the conductive pad in a wiring pattern of the identical length. An access pin 72 installed on a movable base 70 is made to come into contact with the conductive pad 62 arranged with the regularity, and by this contact, an electrostatic waveform generator 20 and a circuit tester 50 are connected successively to the respective terminals of the IC 40 to be tested.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] This invention applies a high voltage charged in a charging/discharging capacitor to the terminals of an IC under test, and applies a pseudo static electricity waveform to the terminals of the IC to destroy the IC under test. This invention relates to an IC electrostatic breakdown tester that tests whether or not.

0002

[Prior Art] As is well known, an IC is manufactured by forming a circuit pattern on a semiconductor substrate using microfabrication technology.
When high voltage enters the circuit, dielectric breakdown tends to occur between the circuit patterns, and the circuit has the property of being easily broken down by high voltage. For this reason, the input/output terminals of the IC are provided with various high voltage blocking means to reversibly block the intrusion of high voltage and improve durability against high voltage.

[0003] The form of high voltage applied to an IC is often mainly due to static electricity. In other words, there are many cases in which a human body or other object is charged with positive or negative static electricity, and this charged object contacts the terminals of an IC and destroys the IC. Against this background, there is a demand for applying a pseudo-static waveform to an IC and testing its durability against high voltage.

FIG. 3 shows an outline of a conventional IC electrostatic breakdown tester. In the figure, 100 indicates the entire IC electrostatic breakdown tester. The electrostatic breakdown tester 100 for IC includes a high voltage generator 10, an electrostatic waveform generator 20 that converts the high voltage generated by the high voltage generator 10 into a pseudo electrostatic waveform, and an electrostatic waveform generator 20 that generates electrostatic damage. The circuit tester 50 includes a connection section 30 that applies an electrostatic waveform to the IC under test 40, and a circuit tester 50 that checks whether the IC under test 40 is destroyed after applying the electrostatic waveform to the IC under test.

[0005] The high voltage generator 10 has a voltage of -5000 to 0, for example.
It is made so that ~+5000V can be changed in 10V steps. The electrostatic waveform generator 20 includes a charging/discharging capacitor C, relay contacts K1 and K2, a charging resistor R1 that limits the charging current, and a discharging resistor R2 that limits the discharging current.

By turning on the relay contact K1, the charge/discharge capacitor C is charged with the voltage generated by the high voltage generator 10. Turn relay contact K1 back off,
By controlling the relay contact K2 to turn on, the high voltage charged in the charging/discharging capacitor C is applied to the connection part 30 through the discharging resistor R2. The connecting portion 30 is configured by attaching a contact 31 such as a probe or a clip to the tip of the cable, and connects the contact 31 to the IC under test 4.
By contacting the terminal 0, a high voltage electrostatic waveform A is applied between the terminals to which this contactor 31 is connected.

After applying the electrostatic waveform A between desired terminals of the IC under test 40, a test is performed using a circuit tester 50 to determine whether or not the inside of this terminal has been destroyed. Complete the exam. The IC electrostatic breakdown tester 100 shown in FIG. 3 has the disadvantage that it cannot automatically test the IC 40 under test because the contacts 31 are connected manually. Connect the IC under test 40 to the circuit tester 50 each time
Perform a circuit test.

[0008] Since the work of connecting the IC under test 40 to the circuit tester 50 is also done manually, there is a drawback that the time required to test one IC becomes long. Furthermore, since the connecting portion 30 is moved manually, the condition of the cable is not constant. For this reason, the stray capacitance generated between the cables changes each time they are connected to the IC under test 40, and as a result, the peak value of the electrostatic waveform applied to the IC under test 40 changes greatly, and the correlation with respect to the test of each terminal changes. There are drawbacks that cannot be overcome.

For this reason, it is conceivable to provide a scanning switch device 200 between the IC electrostatic breakdown tester 100 and the IC under test 40, as shown in FIG. Scanning switch device 200 is composed of relay contact groups 201 and 202. The relay contact group 201 operates to selectively connect the electrostatic waveform generator 20 to each terminal of the IC under test 40 in sequence, and the relay contact group 202 selectively connects each terminal of the IC under test 40 to the circuit tester 50. perform an action.

0010

As shown in FIG. 4, by using a scanning switch device 200, connection switching can be automated and tests can be performed automatically. However, relay contact groups 201 and 2
There is a stray capacitance C0 in the circuit connected by 02, which has the disadvantage that the electrostatic waveform applied from the electrostatic waveform generator 20 to the IC under test 40 cannot be accurately transmitted to the terminals of the IC under test 40.

Furthermore, since the stray capacitance value of each circuit is not constant, the peak value of the high voltage applied to each terminal of the IC 40 under test varies, resulting in the disadvantage that the electrostatic breakdown test between the terminals cannot correlate with each other. . Furthermore, since relays that can withstand a large number of high-voltage switches are used, there are disadvantages of high costs and a high failure rate.

An object of the present invention is to provide an electrostatic breakdown test for an IC in which the peak value of the electrostatic waveform applied to the IC under test is made uniform, and the correlation of the electrostatic breakdown test for each terminal of the IC under test can be maintained. It is an attempt to provide a vessel.

[0013]

[Means for solving the problem] In this invention, the IC under test
Attach it to the IC socket provided on the performance board. On the back side of the performance board, conductive pads are arranged regularly in a matrix or ring shape. Each terminal of the IC socket is connected to this conductive pad by a wiring pattern of the same length.

A moving stand is provided below the performance board, and an access pin that can move vertically is mounted on this moving stand. By moving this access pin in, for example, the X-Y direction using a moving table, the access pin can be opposed to a conductive pad at an arbitrary position, and the access pin can be brought into contact with a target conductive pad.

A high voltage generator is connected to the access pin via an electrostatic waveform generator, and a circuit tester is connected via a switch. As described above, according to the present invention, the access pin or the performance board is moved, for example, in the X-Y direction by the moving table, and the access pin is made to face arbitrary conductive pads arranged in a matrix or circumferentially on the performance board. Since the terminals are configured so that they can be brought into contact with each other, it is possible to share a high voltage application circuit to each terminal of the IC under test.

[0016] Therefore, the peak value of the electrostatic waveform applied to each terminal of the IC under test can be made constant, and thereby an electrostatic breakdown test can be performed in which the mutual correlation between the terminals is established.

[0017]

[Embodiment] FIG. 1 shows an embodiment of the present invention. 10 in the diagram
This is the same as the conventional one in that numeral 20 represents a high voltage generator, 20 represents an electrostatic waveform generator, 40 represents an IC to be tested, and 50 represents a circuit tester. In this invention, the performance board 6
0 is mounted with an IC socket 61, and this IC socket 61
Attach the IC40 to be tested.

In this example, conductive pads 62 are formed in a matrix on the back surface of the performance board 60, as shown in FIG. As shown in FIG. 2, each terminal of the IC socket 61 is connected to each conductive pad 62 via a wiring pattern 63 of the same length. Therefore, the wiring of each terminal of the IC under test 40 mounted on the performance board 60 is set to the same conditions, and the stray capacitances can be made substantially equal to each other.

A moving table 70 is provided below the performance board 60. In this example, a movable base that moves in the X-Y direction is used as the movable base 70. Therefore, the moving table 70 is supported by an X-Y drive device 71 so as to be movable in the X-Y direction. Along with this, in this example, an access pin 72, a pin drive device 73, and an electrostatic waveform generator 20 are mounted on the movable table 70. As the X-Y moving table 70, one having a well-known structure can be used. By moving the X-Y moving table 70, the access pin 72 can be moved to any position along the lower surface of the performance board 60, and at that time, it is possible to move the access pin 72 to an arbitrary position along the lower surface of the performance board 60, and at that time, it is possible to move the access pin 72 to an arbitrary position along the lower surface of the performance board 60.
2 can be brought into contact with the access pin 72.

[0020] 80 indicates a controller. This controller 60
- In addition to controlling the position of the Y moving table 70 and the pin driving device 73, controlling the voltage generated by the high voltage generator 10;
A control signal is sent to a measurement controller 51 provided in the circuit tester 50 and used to control the operation of the circuit tester 50. The circuit tester 50 can be configured by, for example, a measurement controller 51 and a voltage/current generator 52. The output of voltage current generator 52 is applied to access pin 7 after application of electrostatic waveform A through relay contact K3.
Connected to 2.

Voltage current generator 52 operates in two modes. That is, it operates in a voltage generation current measurement mode and a current generation voltage measurement mode. In the voltage generation current measurement mode, the voltage value applied to the terminals of the IC under test is gradually changed in a stepwise manner, and the current flowing through the IC under test at that time is measured. In the current generation voltage measurement mode, the current flowing through the IC under test is changed stepwise, and the current flowing through the IC under test is
Measure the voltage generated at the terminals of C. When the measured current and voltage are within the specified range, the circuit is determined to be normal.

[0022] The DC characteristics of each terminal of the IC 40 under test are measured using these two modes or either one of them. This DC characteristic measurement function is generally available in IC test equipment and can be used as is.

[0023]

As explained above, according to the present invention, the access pin 72 is moved in the X-Y direction by the contact with the conductive pad 6
Since the structure is such that a pseudo electrostatic waveform is applied to the terminals of the IC 40 under test connected to the IC 2, the circuit that applies the electrostatic waveform to all the terminals of the IC 40 under test is shared. Therefore,
Since the stray capacitance of the electrostatic waveform supply path does not change when the electrostatic waveform is applied to any terminal of the IC 40 under test, an electrostatic waveform with the same peak value can be applied to any terminal of the IC 40 under test.

[0024] Therefore, there is an advantage that a highly reliable electrostatic breakdown test can be performed in which correlation is maintained. Also,
By programming the movement position of the X-Y moving table 70 in advance, it is possible to sequentially apply electrostatic waveforms to all terminals of the IC 40 under test, and to apply the static electricity waveform to the terminals of the IC 40 under test using a circuit tester. 50 can be automatically connected, and the electrostatic breakdown test can be fully automated.

In the above description, a case has been described in which an X-Y moving table is used as the moving table 70. However, if the conductive pads 62 formed on the performance board 60 can be arranged in a circumferential manner, the moving table 70 can be used as a turntable.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a bottom view for explaining the structure of the performance board used in the embodiment of the present invention.

FIG. 3 is a block diagram for explaining a conventional technique.

FIG. 4 is a block diagram for explaining a conventional technique.

[Explanation of symbols]

10 High voltage generator 20 Electrostatic waveform generator 30 Connection part 40 IC under test 50 Circuit tester 60 Performance board 61 IC socket 62 Conductive pad 70 Mobile platform 71 Drive device 72 Access pin 73 Pin drive device 80 Controller C Charging and discharging capacitor

Claims (1)

[Claims] 1. A high voltage generator, a charging/discharging capacitor charged with the high voltage generated by the high voltage generator through a switch, and a switch providing the high voltage charged in the charging/discharging capacitor to an access pin. a pin driving device that advances and retreats the access pin toward the performance board; a plurality of conductive pads arranged regularly on one surface of the performance board; and either the access pin or the performance board. a moving base that moves the access pin to a position opposite to a selected conductive pad at an arbitrary position; A circuit tester connected to an access pin and used to test whether or not an IC under test has been destroyed.