JPH0426914Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a microcomputer runaway detection system in a digital control device that performs system control using a plurality of microcomputers.

[Conventional technology]

As a conventional runaway detection system of this type, there is one shown in FIG. 3, for example. This is a system in which dedicated runaway detection circuits 4, 5, and 6 are provided for a plurality of microcomputers 1, 2, and 3, respectively, and the microcomputers 1, 2, and 3 receive constant pulse signals S1, S1, and _S1 by a program. S ₂ and S ₃ are sent to the runaway detection circuits 4, 5, and 6, and the runaway detection circuits 4, 5, and 6 monitor the cycles of the pulse signals S ₁ , S ₂ , and S _3, respectively. This is a runaway detection system that sends reset signals R ₁ , R ₂ , R ₃ to microcomputers 1, ₂ , _{and 3} when the notes of pulse signals S ₁ , S 2 , and S 3 are disturbed due to runaway.

[Problem that the invention attempts to solve]

However, in such conventional runaway detection systems, each microcomputer has one runaway detection circuit, and as the number of microcomputers increases, the number of runaway detection circuits also increases. The number of parts increases and costs rise. Also, since the reset signal is not common,
There was a problem that the operation of the entire microcomputer system became unstable.

This idea was created by focusing on these conventional problems, and not only improves the reliability of the runaway detection system, but also reduces the number of runaway detection circuits to one for multiple microcomputers to be monitored. It is an object of the present invention to provide a runaway detection system for a microcomputer that has a simple configuration and stabilizes the operation of the entire microcomputer system.

[Means for solving problems]

Therefore, in the microcomputer runaway detection system according to this invention, a plurality of microcomputers program pulse signals of the same period to each microcomputer based on a reference pulse signal commonly input from a reference pulse generation circuit. A single runaway detection circuit detects whether the cycles of the pulse signals outputted from the plurality of microcomputers and the reference pulse signals outputted from the reference pulse generation circuit are the same. Accordingly, the program of each microcomputer is reset or a runaway alarm is issued.

[Effect]

According to the microcomputer runaway detection system according to this invention, the period of the reference pulse signal,
Based on the reference pulse signal, it is detected whether the periods of pulse signals from multiple microcomputers that are programmed to output pulse signals with the same period are the same, and whether the periods are different from each other or not. When it is detected that the microcomputer has been damaged, it supplies a reset signal to each of the microcomputers mentioned above or issues a runaway alarm.

〔Example〕

This invention will be explained below based on the drawings. FIG. 1 is a diagram showing an embodiment of this invention. First, to explain the configuration, 11 and 12 are first and second microcomputers that perform predetermined system control; _CPU1 , _CPU2 , and 13 are reference pulse generation circuits;
This reference pulse generation circuit 13 includes a third microcomputer CPU ₃ 14 that generates a reference pulse, a runaway detection circuit 15 for the third microcomputer, and a NOR circuit 16 that monitors the generation of the reference pulse signal.
It becomes more. 17 is a runaway detection circuit, and the runaway detection circuit 17 is the gate circuit 1 of the exclusive OR function.
8, a filter circuit 19, an inverter (reset pulse generation circuit 20).Furthermore, this gate circuit 18 receives pulse signals c, b, a from the first to third microcomputers 11, 12, 14.
, an OR circuit 182 , and a NAND circuit 183 that receives the outputs of both these circuits 181 and 182 .

Next, the operation of this embodiment will be explained with reference to the timing chart shown in FIG. Third microcomputer 1 of reference pulse generation circuit 13
When the reference pulse signal a is emitted from the output port of 4, the first and second microcomputers 1
1 and 12 output mutually synchronized pulse signals c and b from their respective output ports when they are normal, and these two pulse signals c and b are input to the gate circuit 18 together with the reference pulse signal a.

This gate circuit 18 receives three pulse signals a,
It detects a mismatch between b and c and outputs a low level signal during the mismatch period, but there is a delay between the two pulse signals c and b relative to the reference pulse signal a by the amount of time it takes to transfer the signals. Therefore, even when the first and second microcomputers 11 and 12 are operating normally, a spike-like low level signal is output from the gate circuit 18 (see FIG. 2f).
This spike-like low level signal is removed by being integrated by the filter circuit 19, so that the output voltage of the filter circuit 19 is maintained at a substantially high level with only a slight drop. Therefore,
The output level of inverter 20 remains at low level, and the reset signal RES ₁ h is not generated.

However, if one microcomputer, for example, the second microcomputer 12, goes out of control and its pulse signal 6 becomes out of synchronization with the other pulse signal c, the output level of the gate circuit 18 becomes a low level corresponding to the mismatch. , filter circuit 19
When the output voltage of the inverter 20 becomes lower than a preset threshold value of the inverter 20, the reset signal _RES1 from the inverter 20 is inverted by the NOR circuit 16, and the inverted reset signal RES is sent to the plurality of microcomputers 11. , 12, and 14 to reset them.

When the microcomputers 11, 12, and 14 are reset, their inputs and outputs become high impedance, and the pull-up resistor 184 causes the pulse signals a, b, and c to become high level, and the output of the NAND circuit 181 becomes low level. , the output of the OR circuit 182 becomes high level.

As a result, the output of the NAND circuit 183 becomes high level and the reset is released. Although the runaway of the microcomputer 12 has been mentioned here, any microcomputer 11 or 1
The same applies to the runaway of 2.

Further, when the third microcomputer 14 runs out of control, the third microcomputer runaway detection circuit 15 detects the runaway of the third microcomputer 14, that is, the stoppage of generation of the reference pulse signal a;
The NOR circuit 16 resets the first to third microcomputers 11, 12, and 14.

The reference pulse signal a from the third microcomputer 14 is input to the runaway detection circuit 17 in order to detect a disconnection at point X in FIG.

Furthermore, it goes without saying that the gate circuit 18 of the runaway detection circuit 17 may be replaced with a single exclusive OR circuit.

[Effect of idea]

As explained above, according to this idea,
Even when a plurality of microcomputers 11 and 12 are used, it is possible to detect runaway with one runaway detection circuit 17, and it is possible to detect synchronization of pulse signals c and b emitted from each microcomputer 11 and 12. Therefore, even if either of the microcomputers 11, 12 goes out of control, it can be quickly detected.

In addition, since the reference pulse signal a from the reference pulse signal generation circuit 13 is input to the runaway detection circuit 17, a disconnection at point X in Figure 1 can also be detected, improving the reliability of the entire runaway detection system. There is.

Furthermore, as in the embodiment, the reset signal from the third microcomputer runaway detection circuit 15 is applied to the first
By also inputting the information to the second microcomputers 11 and 12, the simultaneous relationship of the microcomputer system consisting of the plurality of microcomputers 11, 12, and 14 is ensured.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of this invention, FIG. 2 is a timing chart thereof, and FIG. 3 is a circuit diagram of a conventional train. 11, 12... microcomputer, 13...
... Reference pulse signal generation circuit, 14 ... Other microcomputer, 15 ... Runaway detection circuit for other microcomputer, 17 ... Runaway detection circuit, 1
8... Gate circuit, 19... Filter circuit, 20
...Inverter.

Claims (1)

[Claims for Utility Model Registration] (1) A plurality of microcomputers 11 and 12 are provided which perform predetermined system control according to a program, and the plurality of microcomputers 11 and 1
2 generate pulse signals c, 2 with the same period based on a reference pulse signal a supplied from a reference pulse generation circuit 13 provided externally when the respective programs are in a state where they can operate normally.
It has a program that outputs a plurality of pulse signals c and b from respective output ports of the plurality of microcomputers 11 and 12 and a plurality of pulse signals c and b output from the reference pulse generation circuit 13. A microcomputer comprising a runaway detection circuit 17 which inputs a reference pulse signal a and detects whether the periods of the plurality of pulse signals c, b and the reference pulse signal a are the same. runaway detection system. (2) The runaway detection circuit 17 receives a plurality of pulse signals c and b outputted from each output port of the plurality of microcomputers 11 and 12, and a reference pulse signal a outputted from the reference pulse generation circuit 13. The circuit generates a reset signal h for resetting each program of the plurality of microcomputers 11 and 12 or generates an alarm when detecting that the cycles of the microcomputers 11 and 12 are no longer the same. A runaway detection system for a microcomputer according to claim 1, characterized in that it is a utility model. (3) The reference pulse generation circuit 13 has a fail-safe reset function against its own program runaway, and is connected to another microcomputer 14 that performs predetermined system control in accordance with the program together with the plurality of microcomputers 11 and 12. A runaway detection system for a microcomputer according to claim 1, characterized in that the system comprises: (4) The plurality of microcomputers 11 and 12
The microcomputer runaway detection system according to claim 3, wherein each program is reset in response to a reset signal from the fail-safe reset function of the other microcomputer 14. .