JPH04265867A - Frequency discrimination device - Google Patents

Abstract

PURPOSE:To enable a difference in the number of cycles and frequency to be measured easily from two input signals. CONSTITUTION:An up/down counter 11 counts up a first signal for measurement of a terminal IN1. Then, a second signal for measurement which is input to a terminal IN2 is counted down during a low level of the signal 1 which is input to a terminal U/P and a terminal SEL. A difference in the number of pulses of two signals for measurement remains in the up/down counter 11 and is memorized. Also, an underflow compensation circuit 12 which is incorporated in the up/down counter 11 compares the size of two signals for measurement. As a result, the result of comparison of the number of pulses is output from the signal 7. Also, a reference value 6 which is set by a signal 9, a comparison discrimination result of the difference in the number of pulses, and a measurement frequency can be obtained.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency discrimination device used for frequency measurement.

0002

BACKGROUND OF THE INVENTION In recent years, frequency allocation for each frequency band has been actively carried out in the fields of information processing and telecommunications, regardless of whether it is wired or wireless, and there is a rapid trend towards increasing the degree of use of frequency bands. Therefore, there is a strong need for technological measures to prevent interference and interference. Therefore, there are many opportunities to measure and manage frequencies when manufacturing and operating devices related to this, and there is a demand for an inexpensive frequency discrimination device.

A conventional frequency discrimination device will be explained below. Although not shown, to perform frequency determination, a measurer generally measures (reads) the signal to be measured using an expensive digital frequency measuring device, and the frequency value of the signal to be measured is used as an arbitrary reference. The frequency value and whether it is within the allowable range are determined. Alternatively, unmanned measurement is also being carried out, but even with this unmanned conventional technology, it is possible to measure the frequency, know the frequency value of the signal under test from the measured value, and make judgments. There is no change in the process of comparing the frequency with a reference value to determine whether the frequency is higher or lower than the reference frequency and whether the frequency error is within the allowable range.

[0004] Such a conventional frequency determining device requires a highly accurate frequency measuring device, and the frequency measuring device must accurately measure the signal under test. However, this poses a problem in that an expensive frequency measuring device is required.

[0005]

SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems, and provides a frequency determination device that can easily and accurately measure the frequency of an input signal by inputting the signal. The purpose is to

[0006]

[Means for Solving the Problems] In order to achieve this object, the frequency determination device of the present invention includes up-counting means for up-counting the number of cycles of a first signal for a predetermined time;
It is equipped with a down-counting means for down-counting the number of cycles of the second signal for a predetermined period of time, a detecting means for detecting the difference between the up-count and down-count values counted by each means, and a detection means for detecting the difference between the up-count and down-count values counted by each of the means, and a frequency It has a frequency determining means for determining the frequency.

[0007]

[Operation] The frequency discrimination device configured as described above receives the reference signal as the first signal and the measured signal as the second signal. Even if the frequency of the reference signal of the first signal is unknown, the up-count count value of the up-count means for the frequency of the reference signal and the down-count count value of the down-count means for the frequency of the signal under test of the second signal. By performing the comparison by the detection means, it is possible to determine whether the frequency of the signal under test is higher or lower than the frequency of the reference signal. Furthermore, it is possible to determine pass/fail by comparing the difference between the frequency of the reference signal detected by the detection means and the count frequency of the signal under test with an arbitrarily set frequency width. Further, the frequency determining means determines the frequency of the signal to be measured when the frequency of the reference signal is clear by comparing the difference between the count frequencies and a built-in reference digital value.

[0008]

[Embodiment] The first embodiment of the present invention will be described below with reference to FIG.
This will be explained with reference to FIG.

FIG. 1 is a diagram showing the configuration of a frequency determining apparatus according to a first embodiment of the present invention. As shown in FIG. 1, its main components are an up/down counter 11 and an underflow circuit 1 built into this up/down counter 11.
It is 2. Signal 1 is a clock pulse input to terminal U/P and terminal SEL, and signals 2 and 3 are measurement signals input to terminals IN1 and IN2. Signal 4 is an enable signal input to the terminal EN, and signal 5 is a signal for clearing the up/down counter 11. In the embodiment, the voltage of the input signal is set to a high level to clear the contents of the up/down counter 11 in advance. do. The signal 1 is a clock pulse whose high level and low level periods are equal, and in the embodiment, when the input voltage of the terminal U/P is at a high level, the up/down counter 11 functions as an up counter as an up counting means, When the level is low, it functions as a down counter as a down counting means.

On the other hand, when the input voltage of the input selection terminal SEL to which the same clock pulse signal 1 is applied is at a high level, the up/down counter 11 has a function of counting the signal 2 from the measurement signal input terminal IN1. Then,
When the level is low, the up/down counter 11 functions to count the signal 3 from the measurement signal input terminal IN2. That is, when the signal 1 is at a high level, the up/down counter 11 has the function of up-counting the first measurement signal from the terminal IN1, and on the other hand, when the signal 1 is at a low level, the up/down counter 11 has the function of up-counting the first measurement signal from the terminal IN2. This function is to count down the second measurement signal from. Further, when the signal 4 is at a high level, the counting function of the up/down counter 11 is enabled, and when the signal 4 is at a low level, it is disabled. According to the embodiment, the input signal 4 at the terminal EN is a signal whose positive edges are synchronized with the signal 1 and whose width corresponds to one period of the signal 1.

Next, the operation of the configuration of the first embodiment shown in FIG. 1 will be explained with reference to FIG. 3. The horizontal axis in Figure 3 is the time axis,
The terminal name of the up/down counter 11 to which each signal is input is written at the left end of each signal. . The contents of the up/down counter 11 are cleared in advance by setting the voltage of the signal 5 of the clearing terminal CL of the up/down counter 11 to a high level. When a signal with a high voltage level is applied to the enable terminal EN, during the period when the signal 1 is at a high level, the up/down counter 11 is input to the terminal IN.
The first measurement signal of 1 is counted up. next,
During the low level period of signal 1, the second measurement signal at terminal IN2 is counted down. As mentioned above, the signal 1 is a clock pulse whose high level and low level periods are equal, and while the signal voltage level of the terminal CL returns to the low level, the up/down counter 11 receives the first signal input to the terminal IN1. The difference in the number of cycles between the number of cycles of the second measurement signal and the number of cycles of the second measurement signal input to the terminal IN2 remains and is stored.

FIG. 3 shows the movement of the potential at the terminal CT. During time tu, the first measurement signal input to the terminal IN1 is counted up, and during time td, the first measurement signal input to the terminal IN2 is counted up.
The potential corresponding to the count difference remaining after down-counting the second measurement signal input to is displayed. The up/down counter 11 also has an underflow correction circuit 12.
By checking the signal 7 at terminal C, the number of cycles of the first signal and the number of cycles of the second signal can be compared and determined, and the frequency of the first and second measurement signals can be determined. information can be obtained. Furthermore, when the absolute value of the first or second measurement signal is clear, the absolute value of the frequency is determined. In this embodiment, the count-up means and the down-count means are provided by a switching means for the functions of one up-down counter 11, but the same effect can be achieved even if the up-count means and the down-count means are configured separately and switched by the switching means. It goes without saying that there is.

Next, the configuration and operation of the second embodiment will be explained with reference to FIGS. 2 and 3. The second embodiment shown in FIG. 2 differs from the first embodiment shown in FIG. 1 in that it includes a magnitude comparator 13 in addition to the first embodiment. Description of the same parts as in FIG. 1 of the first embodiment will be omitted. The second embodiment uses up/down counter 1
A signal 8 at the terminal CT for count output of 1 is added as an input signal to the magnitude comparator 13. on the other hand,
Terminal SET for setting the magnitude comparator 13
Therefore, an arbitrarily set digital value 6 is input, and the difference between the number of cycles of the first measurement signal and the number of cycles of the second measurement signal is determined from the terminal 9 as the comparator output of the magnitude comparator 13. , it is possible to obtain a result of determining whether the value is larger or smaller than an arbitrarily set digital value 6 corresponding to the difference in the number of cycles set from the terminal SET. Furthermore, when the absolute value of the frequency of the first or second measurement signal is clear, the absolute value of the frequency is determined.

In the embodiment, the positive edge of the signal 4 at the enable terminal EN is synchronized with the signal 1, and the signal 1
Although the signal has a width equivalent to one period of the clock pulse, it may be an integral multiple of the period of signal 1 as a clock pulse, and even if it is not synchronized, the signal 1 can be set to a high level within the period of the high level of signal 4 at terminal EN. It goes without saying that if the total period of high level and the total of low level periods are equal, the same effect as that of this embodiment can be obtained. Further, in this embodiment, up-counting is performed first, but down-counting may be performed first.

[0015]

[Effects of the Invention] As is clear from the above explanation, the present invention has the following advantages:
Up-counting means for up-counting the first signal, down-counting means for down-counting the second signal, detection means for detecting the count difference between these two means, and frequency determination means for determining the frequency from this count difference. By providing a means, even if the value of the frequency of the reference signal is unknown, it is possible to calculate the counted value of the frequency of the reference signal and the measured value without requiring a high-precision frequency measurement device and at a lower cost than with conventional techniques. It is possible to determine whether the frequency of the signal under test is higher or lower than the frequency of the reference signal by storing the difference in the count value of the signal frequency, and also to distinguish between the frequency value of the signal under test and the frequency value of the reference signal. It is possible to realize an excellent frequency discriminating device that can compare and discriminate the frequency difference between the two frequencies with an arbitrarily set value and also determine the frequency.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a frequency determination device in a first embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of a frequency determination device in a second embodiment of the present invention.

FIG. 3 is a timing chart for explaining the operation of the embodiment of the present invention.

[Explanation of symbols]

11 Up/down counter 12 Underflow correction circuit

Claims (3)

[Claims] 1. Up-counting means for up-counting a first signal for a predetermined time; down-counting means for down-counting a second signal for the predetermined time; 1. A frequency discrimination device comprising: a detection means for detecting a count difference between the down counts obtained by the counting means; and a frequency determination means for determining the frequency of the first or second signal from the count difference. 2. A device comprising a first input terminal for inputting a first signal and a second input terminal for inputting a second signal, and for receiving a signal input to the first input terminal. 2. The frequency discriminating device according to claim 1, further comprising a switching means for inputting the signal inputted to the up-counting means for a predetermined time period and switching the signal inputted to the second input terminal to be inputted to the down-counting means for a predetermined time period. 3. The frequency discrimination device according to claim 1, wherein the frequency determining means includes means for holding a reference digital value and comparing the count difference with the reference digital value.