JPH04242179A - Dc characteristic measuring apparatus - Google Patents
Dc characteristic measuring apparatusInfo
- Publication number
- JPH04242179A JPH04242179A JP3003565A JP356591A JPH04242179A JP H04242179 A JPH04242179 A JP H04242179A JP 3003565 A JP3003565 A JP 3003565A JP 356591 A JP356591 A JP 356591A JP H04242179 A JPH04242179 A JP H04242179A
- Authority
- JP
- Japan
- Prior art keywords
- logic
- analog
- digital
- digital conversion
- conversion signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 16
- 238000001514 detection method Methods 0.000 claims abstract description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 3
- 238000004904 shortening Methods 0.000 abstract 2
- 230000004069 differentiation Effects 0.000 abstract 1
- 238000005259 measurement Methods 0.000 description 4
- 108091022873 acetoacetate decarboxylase Proteins 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 101710096660 Probable acetoacetate decarboxylase 2 Proteins 0.000 description 2
- 101150042711 adc2 gene Proteins 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Landscapes
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明はDC特性測定器に関する
。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC characteristic measuring instrument.
【0002】0002
【従来の技術】従来の例えばICのように安定する迄に
時間がかかるようなDC特性を測定するDC特性測定器
の判定部は、図3に示す様に測定ユニットにて測定した
アナログ的に変化してから安定するDC電圧を、検出値
S1を設定された判定時間後にアナログ・デジタル・コ
ンパレータ(以下、ADCという)2においてデジタル
変換し、そのデジタル値S2とリミット値S9とを判定
ロジック8で比較して合否信号P/Fを出力している。[Prior Art] As shown in FIG. 3, the determining section of a conventional DC characteristic measuring instrument that measures DC characteristics that take time to stabilize, such as that of an IC, is based on an analog signal measured by a measuring unit. The DC voltage that stabilizes after changing is converted into a digital value by an analog-digital comparator (hereinafter referred to as ADC) 2 after the detection value S1 has passed a set determination time, and the digital value S2 and the limit value S9 are converted into a digital value by the determination logic 8. A pass/fail signal P/F is output.
【0003】この時の判定時間Tは図4に示す様に、一
般的に回路設計,実験データを基にして検出値S1が安
定する時点tsを設定する。この図4の例の場合は判定
時間Tは8msであり、その時点にADC2でAD変換
が行われ、その結果得られた検出値4.0Vが合否判定
の対象となる。ここで電圧を例にしたが、DC特性のI
Cが電流特性でも同様である。As shown in FIG. 4, the determination time T at this time is generally set at a time ts at which the detected value S1 becomes stable, based on circuit design and experimental data. In the case of the example shown in FIG. 4, the determination time T is 8 ms, at which point AD conversion is performed by the ADC 2, and the resulting detected value of 4.0 V is subject to pass/fail determination. Although voltage is used as an example here, the DC characteristic I
The same applies when C is the current characteristic.
【0004】0004
【発明が解決しようとする課題】従来のDC特性測定器
判定タイミングは、例えばICのDC特性を測定する場
合にアナログ的に変化する検出値が十分に安定した点で
判定できる様に十分な判定待ち時間を条件として設定し
ており、全体的なテストタイムの中で占める割合も多い
ので、ICの測定に時間がかかるという問題があった。[Problems to be Solved by the Invention] Conventional DC characteristic measuring instruments have a sufficient judgment timing so that, for example, when measuring the DC characteristics of an IC, the judgment can be made at a point where the detected value, which changes in an analog manner, is sufficiently stable. Since the waiting time is set as a condition and occupies a large proportion of the overall test time, there is a problem in that it takes time to measure the IC.
【0005】[0005]
【課題を解決するための手段】本発明のDC特性測定器
は、半導体集積回路のDC特性検出値を入力してデジタ
ル比較をするアナログ・デジタル・コンパレータと、該
アナログ・デジタル・コンパレータのデジタル変換信号
を入力して合否判定をする判定ロジックを有するDC特
性測定器において、アナログ・デジタル変換するタイミ
ングを設定した範囲で前記デジタル変換信号を記録する
レジスタと、所定タイミングでの前記デジタル変換信号
と所定時間前の前記レジスタの出力信号とを減算して減
算値が所定値以下の場合に微分判定して前記デジタル変
換信号を出力する減算ロジックとのカスケード回路を有
する演算ロジックを前記アナログ・デジタル・コンパレ
ータと判定ロジック間に挿入して構成されている。[Means for Solving the Problems] The DC characteristic measuring device of the present invention includes an analog-to-digital comparator that inputs a detected DC characteristic value of a semiconductor integrated circuit and performs a digital comparison, and a digital conversion device for the analog-to-digital comparator. In a DC characteristic measuring instrument that has a judgment logic that inputs a signal and makes a pass/fail judgment, there is a register that records the digital conversion signal within a range in which the timing of analog-to-digital conversion is set, and a register that records the digital conversion signal at a predetermined timing and a predetermined value. The analog-to-digital comparator includes an arithmetic logic having a cascade circuit with a subtraction logic that subtracts the output signal of the register from the previous time and performs a differential judgment to output the digital conversion signal when the subtracted value is less than or equal to a predetermined value. It is configured by inserting it between the and judgment logic.
【0006】[0006]
【実施例】次に本発明について図面を参照して説明する
。図1は本発明の一実施例の測定ユニットのブロック図
であり、図2はブロックの動作を説明するための判定タ
イミングチャートをあらわしたものである。図3の従来
の測定ユニットのADC2と判定ロジック8の間にレジ
スタ5と減算ロジック6をカスケード接続した演算ロジ
ック4を挿入している。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a block diagram of a measurement unit according to an embodiment of the present invention, and FIG. 2 shows a determination timing chart for explaining the operation of the block. An arithmetic logic 4 in which a register 5 and a subtraction logic 6 are connected in cascade is inserted between the ADC 2 and the determination logic 8 of the conventional measurement unit shown in FIG.
【0007】次にブロックの動作を説明すると、例えば
テスト開始後の判定時間3msにて検出値S1=3.8
VをADC2に入力してS2=3.8Vを演算ロジック
4のレジスタ5に取り込み、続けて所定タイミング1m
s後4ms後のS1=4.0VをAD変換し、その時点
のS2の値4.0Vをレジスタ5に保持されている1m
s前のS2=3.8Vの差の0.2Vを演算用リミット
S7の0.1Vよりも小さい時には飽和値として検出せ
ず、次の1ms後の5msのS1=4.0Vになって前
との差が演算用リミット0.1V以上となったのでS1
が飽和したとして検出対象にしてS1=4.0Vを演算
出力S6=4.0Vとしてロジック8に入力し、例えば
判定リミットS9の5.0Vと比較してDC検出値S1
の合否をデジタル判定P/Fとして行う。そして次の測
定項目に移る。Next, the operation of the block will be explained. For example, at a judgment time of 3 ms after the start of the test, the detected value S1 = 3.8
V is input to ADC2, S2=3.8V is taken into register 5 of arithmetic logic 4, and then at a predetermined timing of 1 m.
AD convert S1 = 4.0V 4ms after s, and convert S2 value 4.0V at that time to 1m held in register 5.
When 0.2V, which is the difference between S2 = 3.8V before s, is smaller than 0.1V of the calculation limit S7, it is not detected as a saturation value, and the next 1ms later, when S1 = 4.0V for 5ms, the previous value is Since the difference between the
is saturated, input S1 = 4.0V to the logic 8 as the calculation output S6 = 4.0V, and compare it with, for example, the judgment limit S9 of 5.0V to determine the DC detection value S1.
Pass/fail is performed as digital judgment P/F. Then move on to the next measurement item.
【0008】すなわち、ここではDC検出値S1の1m
sに対する変化分が減少して飽和状態を演算ロジック4
によって微分判定して、飽和判定した時点の検出値S1
を合否判定対象に選んでいる。That is, here, 1m of the DC detection value S1
Logic 4 calculates the saturation state as the change amount for s decreases.
The detected value S1 at the time when saturation is determined by differential determination by
has been selected for pass/fail judgment.
【0009】[0009]
【発明の効果】以上説明した様に本発明のDC特性測定
器は、自動的に最終判定時間を繰上げるので、従来のD
C特性測定器に比べテストタイムの短縮ができる。Effects of the Invention As explained above, the DC characteristic measuring device of the present invention automatically advances the final judgment time, which is different from the conventional DC characteristic measuring device.
Test time can be reduced compared to C characteristic measuring instruments.
【図1】本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.
【図2】図1のブロックの動作を説明するための判定タ
イミングチャートである。FIG. 2 is a determination timing chart for explaining the operation of the blocks in FIG. 1;
【図3】従来のDC電圧測定器の一例のブロック図であ
る。FIG. 3 is a block diagram of an example of a conventional DC voltage measuring device.
【図4】図3のブロックの動作を説明するための判定タ
イミングチャートである。FIG. 4 is a determination timing chart for explaining the operation of the blocks in FIG. 3;
S1 DC電圧測定検出器 2 ADC 4 演算ロジック 5 レジスタ 6 減算ロジック 8 判定ロジック S3 ADCトリガ S7 演算用リミット S9 判定用リミット S1 DC voltage measurement detector 2 ADC 4 Arithmetic logic 5 Register 6. Subtraction logic 8 Judgment logic S3 ADC trigger S7 Calculation limit S9 Judgment limit
Claims (1)
力してデジタル比較をするアナログ・デジタル・コンパ
レータと、該アナログ・デジタル・コンパレータのデジ
タル変換信号を入力して合否判定をする判定ロジックを
有するDC特性測定器において、アナログ・デジタル変
換するタイミングを設定した範囲で前記デジタル変換信
号を記録するレジスタと、所定タイミングでの前記デジ
タル変換信号と所定時間前の前記レジスタの出力信号と
を減算して減算値が所定値以下の場合に微分判定して前
記デジタル変換信号を出力する減算ロジックとのカスケ
ード回路を有する演算ロジックを前記アナログ・デジタ
ル・コンパレータと判定ロジック間に挿入したことを特
徴とするDC特性測定器。1. An analog/digital comparator that inputs a DC characteristic detection value of a semiconductor integrated circuit and performs a digital comparison, and a judgment logic that inputs a digital conversion signal of the analog/digital comparator and makes a pass/fail determination. In the DC characteristic measuring device, a register records the digital conversion signal within a set range of analog-to-digital conversion timing, and subtracts the digital conversion signal at a predetermined timing and the output signal of the register a predetermined time ago. A DC characterized in that an arithmetic logic having a cascade circuit with a subtraction logic that performs differential judgment and outputs the digital conversion signal when the subtraction value is less than a predetermined value is inserted between the analog-digital comparator and the judgment logic. Characteristic measuring instrument.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3003565A JPH04242179A (en) | 1991-01-17 | 1991-01-17 | Dc characteristic measuring apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3003565A JPH04242179A (en) | 1991-01-17 | 1991-01-17 | Dc characteristic measuring apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04242179A true JPH04242179A (en) | 1992-08-28 |
Family
ID=11560957
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3003565A Pending JPH04242179A (en) | 1991-01-17 | 1991-01-17 | Dc characteristic measuring apparatus |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04242179A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010116069A (en) * | 2008-11-13 | 2010-05-27 | Toyota Motor Corp | Booster device and hydraulic brake device |
-
1991
- 1991-01-17 JP JP3003565A patent/JPH04242179A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010116069A (en) * | 2008-11-13 | 2010-05-27 | Toyota Motor Corp | Booster device and hydraulic brake device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4082998A (en) | Dual slope integration circuit | |
US8476910B2 (en) | Capacitive sensor having calibration mechanism and capacitive sensing method | |
JP2593106B2 (en) | Maximum / minimum value detector for input signal | |
US3500196A (en) | Digital voltage measuring instrument having a variable time base determined by a reference signal | |
JPS58219465A (en) | Tester for d/a converter | |
JPH04242179A (en) | Dc characteristic measuring apparatus | |
JPH0582780B2 (en) | ||
JPH0820473B2 (en) | Continuous period-voltage converter | |
JPH04105073A (en) | Measuring device for effective value | |
JP4129723B2 (en) | Integrated circuit test apparatus and analog waveform measurement method | |
US5233307A (en) | Process and apparatus for the qualification of a capacitive system | |
JPS5817408B2 (en) | Automatic offset method of recording device | |
JP2541472B2 (en) | Micro voltage change detection circuit | |
JP2595858B2 (en) | Temperature measurement circuit | |
JP3238867B2 (en) | Battery voltage measuring method and device | |
JPS63100382A (en) | Wire disconnection detecting method | |
SU1538139A1 (en) | Device for determining extrema | |
RU1831686C (en) | Method for measurement of phase shift of two harmonic signals | |
JPS6344123A (en) | Maximum and minimum value measuring circuit | |
JPS61127229A (en) | Measuring device of settling time of digital-analog converter | |
JPH0587713A (en) | Sensor output device | |
JP2003315365A (en) | Test target detector of watt-hour meter | |
JPH01123530A (en) | Monotone increase characteristic measuring instrument for d/a converter | |
JPH03138579A (en) | Testing device for digital ic | |
JP2944307B2 (en) | A / D converter non-linearity inspection method |