JPH04263425A - Grinding device for semiconductor substrate and method thereof - Google Patents

Grinding device for semiconductor substrate and method thereof

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Publication number
JPH04263425A
JPH04263425A JP2346191A JP2346191A JPH04263425A JP H04263425 A JPH04263425 A JP H04263425A JP 2346191 A JP2346191 A JP 2346191A JP 2346191 A JP2346191 A JP 2346191A JP H04263425 A JPH04263425 A JP H04263425A
Authority
JP
Japan
Prior art keywords
grinding
semiconductor substrate
substrate
grindstone
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2346191A
Other languages
Japanese (ja)
Inventor
Sukemune Udou
有働 祐宗
Kazuyoshi Furukawa
和由 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2346191A priority Critical patent/JPH04263425A/en
Publication of JPH04263425A publication Critical patent/JPH04263425A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To make it possible to conduct grinding of excellent dimensional accuracy. CONSTITUTION:The title grinding device is constituted in such a manner that the disc-shaped grindstone 11, on which a rotating shaft is attached to the center point, or a substrate jig 9, with which a semiconductor substrate 5 is horizontally retained, can be moved in parallel and in vertical direction against the surface of the semiconductor substrate 5, and the upper surface of the above- mentioned substrate retaining jig 9 and the rotating shaft RG of the grindstone are in parallel with each other.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】[発明の目的][Object of the invention]

【0002】0002

【産業上の利用分野】本発明は、半導体基板の加工装置
に関し、特に、2枚の半導体基板を接着若しくは接合し
て一体化した接着半導体基板の外周部の未接着部を除去
する技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate processing apparatus, and more particularly to a technique for removing an unbonded portion on the outer periphery of a bonded semiconductor substrate formed by bonding or bonding two semiconductor substrates together.

【0003】0003

【従来の技術】近年、鏡面に研磨されたシリコン等の半
導体基板(ウェーハ)に前処理を施した後、2枚のウェ
ーハの鏡面同士を接着させ、熱処理することにより、強
固な接合体ウェーハを形成する技術が注目されている。 この方法は、表面を酸化したウェーハを接着することに
より、誘電体分離基板の作成が容易に行なえるばかりで
なく、素子が形成される側もシリコン基板を用いるので
、結晶性もよく、比較的反りも少ない等の特徴も有する
優れた方法であり、近年、その実用化が行なわれつつあ
る。従来より、半導体装置の素子分離技術として、P−
N接合分離や誘電体分離が知られているが、誘電体分離
は■ラッチアップが無い。■高耐圧が得られる。■寄生
容量が少なく高速動作が可能である。等の特徴がある為
、高速IC、高耐圧PW−IC等用途が広がりつつある
。従って、接着ウェーハの適用範囲も大きくなりつつあ
る。
[Prior Art] In recent years, after performing pretreatment on semiconductor substrates (wafers) such as silicon that have been polished to a mirror surface, the mirror surfaces of two wafers are bonded together and heat treated to form a strong bonded wafer. The technology that forms them is attracting attention. This method not only makes it easy to create a dielectric isolation substrate by bonding wafers with oxidized surfaces, but also uses a silicon substrate on the side where the elements are formed, so it has good crystallinity and is relatively This is an excellent method that has features such as less warping, and has been put into practical use in recent years. Conventionally, P-
N-junction isolation and dielectric isolation are known, but dielectric isolation does not cause latch-up. ■High voltage resistance can be obtained. ■High-speed operation is possible with low parasitic capacitance. Due to these characteristics, applications such as high-speed ICs and high-voltage PW-ICs are expanding. Therefore, the scope of application of bonded wafers is also increasing.

【0004】第8図に接着ウェーハの外周部の断面図を
示す。同図(a)は研削前の図、同図(b)は従来の研
削法による研削後の図である。同図において、1は活性
層側基板、3は台側基板、5は活性層側基板1及び台側
基板3を一体化してなる接着ウェーハ、7は接着界面、
21は未接着部分、W1は未接着部21の幅、W2は従
来の研削法に於ける研削しろである。
FIG. 8 shows a sectional view of the outer periphery of a bonded wafer. FIG. 4(a) is a diagram before grinding, and FIG. 2(b) is a diagram after grinding by a conventional grinding method. In the figure, 1 is an active layer side substrate, 3 is a stand side substrate, 5 is an adhesive wafer formed by integrating the active layer side substrate 1 and the stand side substrate 3, 7 is an adhesive interface,
21 is the unbonded portion, W1 is the width of the unbonded portion 21, and W2 is the grinding margin in the conventional grinding method.

【0005】接着ウェーハは2枚の半導体基板の鏡面同
士を貼り合わせることから、その面の平坦度が大きく影
響する。近年の半導体装置の微細化に伴い、その精度は
向上しているが、周辺3〜5mmはウェーハ固有の外周
部面ダレがある為、第8図(a)に示す様に、この部分
(A−A’より外側)は接着されない(隙間が残る)。 この為、この部分にゴミが溜まり、工程に於ける汚染、
発塵源となる為、除去する必要がある。
[0005] Since bonded wafers are made by bonding the mirror surfaces of two semiconductor substrates together, the flatness of the surfaces has a large effect. With the miniaturization of semiconductor devices in recent years, their precision has improved, but since there is surface sagging on the outer periphery of the wafer in the 3 to 5 mm periphery, as shown in Figure 8 (a), this area (A - outside A') are not bonded (a gap remains). For this reason, dust accumulates in this area, causing contamination during the process.
It is a source of dust and must be removed.

【0006】除去する方法としては、第8図(b)に示
す様に、少なくともA−A’より外側のウェーハ外周部
分を砥石等を用いて削る方法が一般的である。ところが
、この方法では、ウェーハの直径を減ずることになり、
材料ロスが大きいという問題がある。即ち、一般的に、
半導体基板は25mm(1インチ)ステップ(但し、1
50mmφ以上は50mm(2インチ)ステップ)で口
径が決まっており、従って、125mmφ(5インチφ
)の接着ウェーハは150mmφ(6インチφ)のウェ
ーハ2枚を接着一体化した後、外周を削って125mm
φに成形することになる。しかし、この方法で150m
mφウェーハを作製するには(175mmφというのは
一般的には入手不可能である為)200mmφウェーハ
を接着し、150mmφに成形しなくてはならず、約4
4%を削り落とすことになり、材料ロスが非常に大きく
なる。更に、前述したように、取り除かねばならない未
接着部は周辺から3mm程度なので、前述の方法では、
接着部即ち素子形成が可能な領域を大きく削り込んでい
ることになり材料ロスが大きくなる。  逆に、接着に
用いる2枚のウェーハの口径を最終加工外径より未接着
部分の大きさのみ大きく(+6mm程度以上)すること
も考えられるが、この場合、125mmφ接着ウェーハ
作製の為には、131mmφ程度の鏡面ウェーハを用意
すれば最も材料ロスは少ない。しかしながら、131m
mφという特殊な形のウェーハは一般には入手できず、
特注で作製することになる為、治具等も専門のものを使
用しなければならなくなり、ウェーハのコストが高くつ
き、また、ウェーハ入手までの納期がかかる等の問題が
あり、実用化されていない。
As shown in FIG. 8(b), a common method for removing the wafer is to use a grindstone or the like to grind at least the outer peripheral portion of the wafer beyond the line A-A'. However, this method reduces the diameter of the wafer,
There is a problem of large material loss. That is, in general,
Semiconductor substrate is 25mm (1 inch) step (however, 1 inch)
For diameters larger than 50mmφ, the diameter is determined in 50mm (2 inch) steps.
) bonded wafer is made by bonding two wafers of 150mmφ (6 inchφ) together and then cutting the outer periphery to 125mm.
It will be formed into φ. However, with this method, 150m
To make mφ wafers (because 175 mmφ is generally not available), 200 mmφ wafers must be bonded and molded to 150 mmφ, which takes about 4
4% will be removed, resulting in a very large material loss. Furthermore, as mentioned above, the unbonded part that must be removed is about 3 mm from the periphery, so with the above method,
Since the adhesive portion, that is, the area where the element can be formed, is largely cut away, material loss increases. Conversely, it is also possible to make the diameter of the two wafers used for bonding larger than the final processed outer diameter by only the size of the unbonded part (about +6 mm or more), but in this case, in order to produce a 125 mmφ bonded wafer, If a mirror-finished wafer with a diameter of about 131 mm is prepared, material loss will be the least. However, 131m
Wafers with a special shape of mφ are not generally available,
Since it is custom-made, specialized jigs and other equipment must be used, resulting in high wafer costs and long delivery times, so it has not been put into practical use. do not have.

【0007】そこで、外形を減ずることなく、周辺の未
接着部21を取り除く為の対策として、第9図に示す様
に、接着した2枚の基板の内台側基板3の外周を残し、
活性層側基板1を周辺未接着部分まで削ることが考えら
れる。これにより、実際に素子を作る領域は最大限にし
つつ、外形は前述の25mmステップの径に合わせるこ
とが可能となる。尚、第9図は接着ウェーハの外周部の
断面図を示し、最外周の直径を減じないで未接着部を研
削したものである。
Therefore, as a measure to remove the peripheral unbonded portion 21 without reducing the external shape, as shown in FIG. 9, the outer periphery of the inner board 3 of the two bonded boards is left,
It is conceivable to shave the active layer side substrate 1 to the peripheral unbonded portion. This makes it possible to maximize the area in which the element is actually fabricated while adjusting the outer shape to the diameter of the aforementioned 25 mm step. Incidentally, FIG. 9 shows a cross-sectional view of the outer periphery of the bonded wafer, in which the unbonded portion has been ground without reducing the diameter of the outermost periphery.

【0008】ここで、活性層側基板1の周辺部分の除去
法としては、次の方法がある。
Here, as a method for removing the peripheral portion of the active layer side substrate 1, there is the following method.

【0009】1)エッチングにより除去する方法2)研
削により除去する方法 先ず、第10図を用いて、1)の方法を説明する。第1
0図はエッチングを用いて最外周の直径を減じないで未
接着部を除去する方法を示したもので、同図(a)は接
着ウェーハの断面図、同図(b)は保護膜形成後の断面
図、同図(c)はエッチング後の断面図、同図(d)は
保護膜除去後の断面図、同図(e)は活性層側基板1を
研磨した後の断面図をそれぞれ示す。尚、同図において
、23は表面の保護膜、25は裏面及び側面の保護膜、
27はエッチング除去によるコーナー部の”ダレ”であ
る。
1) Method of removing by etching 2) Method of removing by grinding First, method 1) will be explained using FIG. 10. 1st
Figure 0 shows a method of removing the unbonded part without reducing the diameter of the outermost periphery using etching. , (c) is a cross-sectional view after etching, (d) is a cross-sectional view after removing the protective film, and (e) is a cross-sectional view after polishing the active layer side substrate 1. show. In the figure, 23 is a protective film on the front surface, 25 is a protective film on the back and side surfaces,
Reference numeral 27 indicates "sag" at the corner portion due to etching removal.

【0010】第10図に示す様に、本方法では、600
μm近くのエッチングを行なうので、除去したくない部
分(表面及び裏面)は全て何らかの膜で保護する必要が
ある。膜としてはSiO2やレジストが考えられるが、
いずれにしても、膜を付ける工程(第10図(b))と
、エッチング(同図(c))後剥がす工程(同図(d)
)が必要となるばかりでなく、膜そのものの耐エッチン
グ液性も要求される。更に、エッチング液も600μm
とエッチング代が大きいので、エッチング速度が大きい
ことが必要であり、主にHF−HNO3系エッチング液
が適しているが、エッチング時に有毒なNO2ガスを発
生する為、除害設備等が必要となる。また、断面も第1
0図に示すように大幅なダレ27が生じ、寸法精度が悪
く、一定の形状にコントロールするのは困難である。
As shown in FIG. 10, in this method, 600
Since etching is performed in the vicinity of μm, all portions (front and back surfaces) that are not desired to be removed must be protected with some kind of film. SiO2 or resist can be considered as the film, but
In any case, the process of applying the film (FIG. 10(b)) and the process of peeling it off after etching (FIG. 10(c)) (FIG. 10(d))
) is required, and the film itself is also required to have resistance to etching solutions. Furthermore, the etching solution is also 600 μm.
Since the etching cost is large, it is necessary to have a high etching speed, and HF-HNO3-based etching solutions are mainly suitable, but since toxic NO2 gas is generated during etching, detoxification equipment is required. . Also, the cross section is also the first
As shown in Figure 0, a large sag 27 occurs, the dimensional accuracy is poor, and it is difficult to control the shape to a constant shape.

【0011】次に、第11図から第13図を用いて、2
)の方法を説明する。第11図は従来の研削装置を用い
て最外周の直径を減じないで未接着部の研削を行なうと
きの様子を示した図で、同図(a)は研削前の断面図、
同図(b)は研削中の断面図、同図(c)は研削前の上
面図、同図(d)は研削中の上面図をそれぞれ示す。尚
、同図において、9はウェーハチャック、11は砥石、
29は研削により除去された部分を示す。また、第12
図は従来の研削装置で研削中の砥石に働く力を示した図
で、31はコーナー、33は研削面である。更に、第1
3図は従来の研削装置でテーパー付きの砥石を使用した
場合の研削中の砥石に働く力を示した図である。
Next, using FIGS. 11 to 13, 2
). Fig. 11 is a diagram showing the state of grinding the unbonded part without reducing the diameter of the outermost periphery using a conventional grinding device, and Fig. 11 (a) is a cross-sectional view before grinding;
FIG. 5(b) is a cross-sectional view during grinding, FIG. 2(c) is a top view before grinding, and FIG. 4(d) is a top view during grinding. In the figure, 9 is a wafer chuck, 11 is a grindstone,
29 indicates a portion removed by grinding. Also, the 12th
The figure shows the force acting on a grindstone during grinding with a conventional grinding device, where 31 is a corner and 33 is a grinding surface. Furthermore, the first
FIG. 3 is a diagram showing the force acting on the grindstone during grinding when a tapered grindstone is used in a conventional grinding device.

【0012】第11図に示す様に、本方法では、断面形
状は砥石の形状で決まるので、前述の1)の方法より寸
法精度は良い。しかしながら、研削を行なう場合に、研
削されるウェーハの回転軸と砥石の回転軸とがおおむね
平行である為、砥石は同図(a)及び(b)のように横
方向から入ることになる。この場合、第12図に示すよ
うに砥石に上方向に逃げようとする力が働く為に、角の
部分31にテーパーが付くことになる。更に、角の部分
31が直角である為、工程中にこの部分31にゴミが溜
まりやすい。この問題に対する対策として、第13図に
示す様に砥石11の先端にテーパーを付ける方法が知ら
れているが、この方法では、更に前述の逃げの力が大き
くなり、寸法精度の悪化を招くばかりでなく、砥石11
の回転軸受への負荷も大きくなる。また、砥石11の内
、研削を行なっているのは第12図及び第13図の研削
面33の部分であるが、角の部分31の磨耗が最も激し
い為に砥石11の形状が図中の波線のように変化してい
くこととなり、寸法精度を保つ為に砥石11の交換を頻
繁に行なう必要がある。このことは、結果としてコスト
アップにつながる。また更に、磨耗した砥石11では、
未接着部21が取りきれずに残ってしまう可能性もある
As shown in FIG. 11, in this method, the cross-sectional shape is determined by the shape of the grindstone, so the dimensional accuracy is better than in the method 1) described above. However, when grinding is performed, the rotation axis of the wafer to be ground and the rotation axis of the grindstone are approximately parallel, so the grindstone enters from the side as shown in FIGS. In this case, as shown in FIG. 12, a force acting on the grindstone that tends to escape upwardly causes the corner portion 31 to be tapered. Furthermore, since the corner portion 31 is a right angle, dust tends to accumulate in this portion 31 during the process. As a countermeasure to this problem, a method is known in which the tip of the grinding wheel 11 is tapered as shown in FIG. Whetstone 11
The load on the rotating bearing also increases. In addition, the part of the grinding wheel 11 that performs grinding is the grinding surface 33 shown in FIGS. 12 and 13, but since the corner parts 31 are worn most severely, the shape of the grinding wheel 11 is not as shown in the figures. It will change like a wavy line, and it is necessary to frequently replace the grindstone 11 in order to maintain dimensional accuracy. This results in an increase in costs. Furthermore, in the worn whetstone 11,
There is also a possibility that the unbonded portion 21 cannot be removed and remains.

【0013】[0013]

【発明が解決しようとする課題】以上の様に、半導体基
板の周辺部分の除去において、(1) エッチングによ
る方法では、工程数が多く特種設備が必要である等コス
ト高で、またダレが生じ寸法精度が悪い。
[Problems to be Solved by the Invention] As mentioned above, in removing the peripheral portion of a semiconductor substrate, (1) the etching method requires a large number of steps and special equipment, resulting in high cost and also causes sagging. Poor dimensional accuracy.

【0014】(2) 従来の研削装置による方法では、
砥石を頻繁に交換する必要がある等コスト高で、また寸
法精度が悪い。
(2) In the method using a conventional grinding device,
The cost is high, as the grindstone needs to be replaced frequently, and the dimensional accuracy is poor.

【0015】という欠点があった。[0015] There was a drawback.

【0016】本発明は、上記問題点を解決するもので、
その目的は、より低コストで寸法精度の良い半導体基板
の研削装置及び研削方法を提供することである。
[0016] The present invention solves the above problems.
The purpose is to provide a semiconductor substrate grinding device and grinding method that is lower in cost and has better dimensional accuracy.

【0017】[発明の構成][Configuration of the invention]

【0018】[0018]

【課題を解決するための手段】前記課題を解決するため
に、本発明の第1の特徴は、第1図に示す如く、回転軸
RGと、回転軸RGを中心に取付けられた円盤状の砥石
11と、半導体基板5を水平に保持する基板固定治具9
とを具備し、少なくとも前記砥石11或いは前記基板固
定治具9が半導体基板5の表面に対して平行及び垂直方
向へ移動できる半導体基板の研削装置において、前記基
板固定治具9の上面と砥石11の回転軸RGが平行であ
ることである。
[Means for Solving the Problems] In order to solve the above problems, the first feature of the present invention, as shown in FIG. A grindstone 11 and a substrate fixing jig 9 that holds the semiconductor substrate 5 horizontally.
In a semiconductor substrate grinding apparatus, the grinding wheel 11 or the substrate fixing jig 9 can move in parallel and perpendicular directions with respect to the surface of the semiconductor substrate 5. The rotation axes RG of the two are parallel to each other.

【0019】また、本発明の第2の特徴は、請求項1に
記載の半導体基板の研削装置において、第1図に示す如
く、前記基板固定治具9は、固定される半導体基板5の
中心RCを軸にして回転することにより半導体基板5の
外周部を研削し、前記砥石11或いは前記基板固定治具
9は、砥石の回転軸RGに対して垂直に移動し且つ半導
体基板5に対して平行に移動することである。
A second feature of the present invention is that in the semiconductor substrate grinding apparatus according to claim 1, as shown in FIG. The outer periphery of the semiconductor substrate 5 is ground by rotating around the RC, and the grindstone 11 or the substrate fixing jig 9 moves perpendicularly to the rotation axis RG of the grindstone and grinds against the semiconductor substrate 5. It is to move in parallel.

【0020】更に、本発明の第3の特徴は、2枚の半導
体ウェーハを張り合わせて加熱一体化した接着ウェーハ
のウェーハ外周部の未接着部分を除去する半導体基板の
研削方法において、第1図に示す如く、前記接着ウェー
ハ5の表面と平行である回転軸RGを有する砥石11を
該回転軸RGを中心に回転させながら、少なくとも前記
接着ウェーハ5の下側の基板3を該基板の厚さの2分の
1以上を残し、尚且つ未接着部より内側まで入れ、次い
で、前記接着ウェーハ5の中心を回転軸RCとして、前
記接着ウェーハ5或いは砥石11を前記接着ウェーハ5
の外周に沿って回転させることである。
Furthermore, the third feature of the present invention is a semiconductor substrate grinding method for removing the unbonded portion of the wafer outer periphery of a bonded wafer obtained by bonding two semiconductor wafers together and heating them together, as shown in FIG. As shown, while rotating a grindstone 11 having a rotation axis RG parallel to the surface of the bonded wafer 5, the substrate 3 on the lower side of the bonded wafer 5 is at least as thick as the substrate. Insert the bonded wafer 5 or the grindstone 11 into the bonded wafer 5 with the center of the bonded wafer 5 set as the rotation axis RC, leaving one-half or more of the bonded wafer 5 or more inside the unbonded part.
rotation along the outer periphery of the

【0021】[0021]

【作用】本発明の半導体基板の研削装置では、接着ウェ
ーハ5の表面と平行である回転軸RGを有する砥石11
を該回転軸RGを中心に回転させながら、少なくとも接
着ウェーハ5の下側の基板3を該基板の厚さの2分の1
以上を残し、尚且つ未接着部より内側まで入れ、次いで
、接着ウェーハ5の中心を回転軸RCとして、接着ウェ
ーハ5或いは砥石11を接着ウェーハ5の外周に沿って
回転させる。
[Operation] In the semiconductor substrate grinding apparatus of the present invention, the grinding wheel 11 has a rotation axis RG that is parallel to the surface of the bonded wafer 5.
While rotating about the rotation axis RG, at least the substrate 3 on the lower side of the bonded wafer 5 is removed by half the thickness of the substrate.
Leaving the above-described portions intact, the wafer is inserted to the inside of the unbonded portion, and then the bonded wafer 5 or the grindstone 11 is rotated along the outer periphery of the bonded wafer 5 with the center of the bonded wafer 5 as the rotation axis RC.

【0022】[0022]

【実施例】以下、本発明に係る実施例を図面に基づいて
説明する。
Embodiments Hereinafter, embodiments of the present invention will be explained based on the drawings.

【0023】第1図に本発明の第1実施例を示す。同図
は本発明による半導体基板の研削装置を用いて外周研削
を行なっているところの模式図を示したものである。
FIG. 1 shows a first embodiment of the present invention. This figure shows a schematic view of the outer periphery being ground using the semiconductor substrate grinding apparatus according to the present invention.

【0024】同図において、半導体基板の研削装置は、
砥石11と基板固定治具9とから構成されており、砥石
11は、基板固定治具9の上面と平行である回転軸RG
を中心に取付けられた円盤状のもので、半導体基板5に
対して平行及び垂直方向へ移動でき、また、基板固定治
具9は、半導体基板5を水平に保持し、固定される半導
体基板5の中心を軸にして回転し、半導体基板5に対し
て平行及び垂直方向へ移動できる。尚、同図に示す半導
体基板5は、活性層側基板1と台側基板3とを張り合わ
せて加熱一体化した接着ウェーハである。
In the figure, the semiconductor substrate grinding device is
It is composed of a grindstone 11 and a substrate fixing jig 9, and the grindstone 11 has a rotation axis RG that is parallel to the upper surface of the substrate fixing jig 9.
The substrate fixing jig 9 is a disk-shaped device that is attached around the semiconductor substrate 5 and can move in parallel and perpendicular directions with respect to the semiconductor substrate 5. The substrate fixing jig 9 holds the semiconductor substrate 5 horizontally, and The semiconductor substrate 5 rotates around the center and can move in parallel and perpendicular directions with respect to the semiconductor substrate 5. Incidentally, the semiconductor substrate 5 shown in the figure is a bonded wafer in which the active layer side substrate 1 and the stand side substrate 3 are pasted together and integrated by heating.

【0025】次に、本実施例の半導体基板の研削装置に
よる研削方法を説明する。第1図に於て、先ず、回転軸
RGを中心に回転する砥石11を、砥石の回転軸RGに
対して垂直に移動して、少なくとも接着ウェーハ5の下
側の基板3を該基板の厚さの2分の1以上を残し、尚且
つ未接着部より内側まで入れ、次いで、接着ウェーハ5
の中心を回転軸RCとして基板固定治具9を接着ウェー
ハ5の外周に沿って回転させ接着ウェーハ5の外周部を
研削する。
Next, a method of grinding using the semiconductor substrate grinding apparatus of this embodiment will be explained. In FIG. 1, first, the grindstone 11 rotating around the rotation axis RG is moved perpendicularly to the rotation axis RG of the grindstone, so that at least the substrate 3 below the bonded wafer 5 is removed by the thickness of the substrate. Insert the wafer into the bonded wafer 5, leaving more than half of the wafer, and inserting it to the inside of the unbonded part.
The substrate fixing jig 9 is rotated along the outer periphery of the bonded wafer 5 with the center of the rotation axis RC, and the outer periphery of the bonded wafer 5 is ground.

【0026】次に、本実施例の寸法精度の良さを、従来
例と比較した実際のデータを用いて説明する。
Next, the dimensional accuracy of this embodiment will be explained using actual data compared with the conventional example.

【0027】先ず、使用した接着ウェーハについて説明
する。ウェーハ形状が同一(直径150.0mm、厚さ
625μm、縁に半径200μmのラウンド加工が施さ
れたもの)であるρ= 2〜3Ω・cm、Nタイプの6
インチφウェーハ100枚、及びρ= 1〜10Ω・c
m、Pタイプの6インチφウェーハ100枚を用意し、
両方のウェーハを洗浄、乾燥の後、鏡面同士を清浄な雰
囲気下で接触させ、密着させた。次いで、1100℃で
1時間、小量のO2を含むN2雰囲気中で熱処理を行な
い、両ウェーハを直接接着した。このようにして作成し
た100枚の接着ウェーハを赤外線透過法により観察し
たところ、従来技術の項で述べた理由により、周辺部2
〜3mmは未接着であった。
First, the bonded wafer used will be explained. Wafer shape is the same (diameter 150.0 mm, thickness 625 μm, rounded edge with radius 200 μm) ρ = 2 to 3 Ω cm, N type 6
100 inch φ wafers, and ρ = 1 to 10Ω・c
Prepare 100 6-inch φ wafers of m and P types,
After cleaning and drying both wafers, the mirror surfaces were brought into contact with each other in a clean atmosphere and brought into close contact. Next, heat treatment was performed at 1100° C. for 1 hour in an N 2 atmosphere containing a small amount of O 2 to directly bond both wafers. When 100 bonded wafers thus prepared were observed using an infrared transmission method, it was found that the peripheral area 2
~3 mm was not bonded.

【0028】次に、これら接着ウェーハを50枚ずつ2
組に分け、1組は従来の研削装置(第14図参照)を用
いて、またもう1組は本発明による研削装置(第1図参
照)を用いて外周研削を行なった。また、使用した砥石
11の直径は110mmで、平均粒度11μmのもので
、接着ウェーハ5の外周部より5mm内側までを残し、
厚620μmで研削を行なうこととした。
Next, 50 of these bonded wafers were
Divided into groups, one group used a conventional grinding device (see FIG. 14) and the other group used a grinding device according to the present invention (see FIG. 1) to perform outer periphery grinding. The diameter of the grinding wheel 11 used was 110 mm, and the average grain size was 11 μm, leaving 5 mm inside the outer periphery of the bonded wafer 5.
It was decided to perform grinding at a thickness of 620 μm.

【0029】比較のために、研削された基板について、
周辺の研削部の厚さを測定した。即ち、第2図に示すコ
ーナー部の厚さt1、及び外周部の厚さt2を測定し、
第3図に示す表にまとめた。この結果、従来の研削装置
では、コーナー部と外周部で10μm近い差があるのに
対し、本発明の研削装置では2μm程度の差であった。
For comparison, for the ground substrate,
The thickness of the surrounding grinding area was measured. That is, the thickness t1 of the corner portion and the thickness t2 of the outer peripheral portion shown in FIG. 2 were measured,
The results are summarized in the table shown in Figure 3. As a result, in the conventional grinding device, there is a difference of approximately 10 μm between the corner portion and the outer peripheral portion, whereas in the grinding device of the present invention, the difference is approximately 2 μm.

【0030】また、同様の研削を継続して行ない、砥石
11の寿命を調べたところ、本発明による研削装置では
、従来の研削装置に比べ、20倍近い寿命を持つことが
判明した。
Further, when similar grinding was continued and the life of the grindstone 11 was investigated, it was found that the grinding device according to the present invention had a lifespan nearly 20 times longer than that of the conventional grinding device.

【0031】更に、コーナー部に45°のテーパーが付
くようにした場合では、従来の研削装置との寸法精度の
良さの差が更に大きくなり、従来の研削装置では、コー
ナー部と外周部の差は15μmになったが、本発明の研
削装置では2μmの差で変化はなかった。
Furthermore, when the corner portion is tapered at 45°, the difference in dimensional accuracy from the conventional grinding device becomes even larger. was 15 μm, but with the grinding device of the present invention, there was no change with a difference of 2 μm.

【0032】以上の結果から、本発明の研削装置を用い
ることにより、長期間にわたり寸法精度の良い外周研削
ができることが実証された。
From the above results, it was demonstrated that by using the grinding apparatus of the present invention, outer periphery grinding with good dimensional accuracy can be performed for a long period of time.

【0033】また、第4図に示すような粒度の異なる砥
石を組み合わせた砥石を使用すれば、粗さの異なる砥石
による多段階研削も砥石位置の移動のみで容易に可能で
ある。ここで、同図において、13は仕上研削用砥石、
15は粗研削用砥石である。一般に、粗い砥石の方が寿
命が長く、精度も出しやすいが、反面、被研削物へのダ
メージが大きくなり、破砕層も深くなる。そこで、先ず
第5図(a)に示す様に、粗い砥石15で第1の研削を
行ない、次に第5図(b)に示す様に、第1の研削で入
った破砕層を第1の研削より細かい砥石13にて研削す
ることにより、残留する破砕層を低減できるだけでなく
、研削面の粗さも低減できるので、後工程で不具合を引
き起こす可能性をも低減できる。
Furthermore, by using a grindstone that combines grindstones with different grain sizes as shown in FIG. 4, multi-step grinding using grindstones with different roughness can be easily achieved by simply moving the position of the grindstone. Here, in the same figure, 13 is a grindstone for finishing grinding;
15 is a rough grinding wheel. In general, coarse grinding wheels have a longer lifespan and are easier to achieve accuracy, but on the other hand, they cause more damage to the object to be ground and create a deeper fracture layer. Therefore, first, as shown in FIG. 5(a), first grinding is performed with a coarse grindstone 15, and then, as shown in FIG. 5(b), the crushed layer created by the first grinding is By grinding with a grindstone 13 that is finer than the grinding process described above, it is possible to not only reduce the remaining crushed layer but also reduce the roughness of the ground surface, thereby reducing the possibility of causing defects in the subsequent process.

【0034】また、第6図に示す様に、外周研削を斜め
研削で行なう場合においても適用可能である。
Further, as shown in FIG. 6, the present invention is also applicable to a case where the outer circumferential grinding is performed by diagonal grinding.

【0035】更に、以上の説明では、接着ウェーハの未
接着部除去に適用した例について述べたが、接着でない
単体ウェーハ、或いはエピタキシャルウェーハ等の膜付
きのウェーハ、更には半導体ウェーハ以外のものにも適
用できることはいうまでもない。例えば、第7図は、エ
ピタキシャルウェーハ17の外周部にできるクラウンを
本発明による研削装置を用いて研削を行なっているとこ
ろを示している。
Furthermore, in the above explanation, an example has been described in which the application is applied to removing the unbonded portion of a bonded wafer, but it can also be applied to a single wafer that is not bonded, a wafer with a film such as an epitaxial wafer, and even other things other than semiconductor wafers. Needless to say, it is applicable. For example, FIG. 7 shows a state in which a crown formed on the outer periphery of an epitaxial wafer 17 is being ground using the grinding apparatus according to the present invention.

【0036】[0036]

【発明の効果】以上の様に本発明によれば、(1) 外
周研削部の内側と外側の差が少なく、外周研削部の残し
厚精度が良い等、寸法精度が良い研削装置を実現できる
[Effects of the Invention] As described above, according to the present invention, (1) it is possible to realize a grinding device with good dimensional accuracy, such as a small difference between the inside and outside of the outer periphery grinding part and good remaining thickness accuracy of the outer periphery grinding part; .

【0037】(2) 粗さの異なる砥石による多段階研
削が容易に実現できる。
(2) Multi-stage grinding using grindstones with different roughness can be easily realized.

【0038】(3) 砥石の寿命が長い。(3) The life of the grindstone is long.

【0039】(4) 有毒なガスを発生するエッチング
工程が不要、またはエッチング量が少ないのでエッチン
グ時間も短くガスの発生量も大幅に低減できる等、公害
防止の面でも効果大である。
(4) Since no etching step that generates toxic gas is required or the amount of etching is small, the etching time is short and the amount of gas generated can be significantly reduced, which is highly effective in preventing pollution.

【0040】(5) 工程数が比較的少なく、特殊設備
が不要で、砥石交換も少ない等、低コストの研削装置を
実現できる。
(5) A low-cost grinding device can be realized with a relatively small number of steps, no special equipment required, and fewer grindstone replacements.

【0041】等々の効果があり、本発明の半導体基板の
研削装置及び研削方法を適用することにより、産業上種
々の有益な効果が得られる。
By applying the semiconductor substrate grinding apparatus and grinding method of the present invention, various industrially beneficial effects can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の実施例に係る半導体基板の研削装置に
よる外周研削の模式図。
FIG. 1 is a schematic diagram of outer periphery grinding performed by a semiconductor substrate grinding apparatus according to an embodiment of the present invention.

【図2】研削後の接着ウェーハの断面図。FIG. 2 is a cross-sectional view of a bonded wafer after grinding.

【図3】従来の研削装置と本発明の実施例に係る研削装
置の寸法精度の比較表。
FIG. 3 is a comparison table of dimensional accuracy between a conventional grinding device and a grinding device according to an embodiment of the present invention.

【図4】粒度の異なる砥石を組み合わせた砥石の断面図
FIG. 4 is a cross-sectional view of a grindstone that combines grindstones with different grain sizes.

【図5】第4図の砥石を本発明の実施例に係る研削装置
に適用した場合の外周研削の模式図。
FIG. 5 is a schematic diagram of outer periphery grinding when the grindstone of FIG. 4 is applied to the grinding device according to the embodiment of the present invention.

【図6】本発明の実施例に係る研削装置により外周研削
を斜め研削で行なう場合の模式図、
FIG. 6 is a schematic diagram of the case where outer circumferential grinding is performed by diagonal grinding using the grinding device according to the embodiment of the present invention;

【図7】本発明の実施例に係る研削装置によりエピタキ
シャルウェーハの研削を行なう場合の模式図。
FIG. 7 is a schematic diagram when an epitaxial wafer is ground by the grinding apparatus according to the embodiment of the present invention.

【図8】接着ウェーハの外周部の断面図、FIG. 8 is a cross-sectional view of the outer periphery of the bonded wafer;

【図9】接着
ウェーハの外周部の研削後の断面図、
FIG. 9 is a cross-sectional view of the outer periphery of the bonded wafer after grinding;

【図10】エッチ
ングを用いて最外周の直径を減じないで未接着部を除去
する方法を示した図。
FIG. 10 is a diagram showing a method of removing an unbonded portion without reducing the diameter of the outermost periphery using etching.

【図11】従来の研削装置を用いて最外周の直径を減じ
ないで未接着部の研削を行なうときの様子を示した図。
FIG. 11 is a diagram illustrating how an unbonded portion is ground using a conventional grinding device without reducing the diameter of the outermost periphery.

【図12】従来の研削装置で研削中の砥石に働く力を示
した図。
FIG. 12 is a diagram showing the force acting on a grindstone during grinding with a conventional grinding device.

【図13】従来の研削装置で研削中のテーパー付きの砥
石に働く力を示した図。
FIG. 13 is a diagram showing the force acting on a tapered grindstone during grinding with a conventional grinding device.

【図14】従来の研削装置による外周研削の模式図であ
る。
FIG. 14 is a schematic diagram of outer periphery grinding by a conventional grinding device.

【符号の説明】[Explanation of symbols]

1  活性層側基板 3  台側基板 5  半導体基板(接着ウェーハ) 7  接着界面 9  基板固定治具(ウェーハチャック)11  砥石 RG  砥石の回転軸 RC  基板固定治具の回転軸 1 Active layer side substrate 3 Base side board 5 Semiconductor substrate (adhesive wafer) 7 Adhesive interface 9 Substrate fixing jig (wafer chuck) 11 Whetstone RG grindstone rotation axis RC board fixing jig rotation axis

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】  回転軸と、回転軸を中心に取付けられ
た円盤状の砥石と、半導体基板を水平に保持する基板固
定治具とを有し、少なくとも前記砥石或いは前記基板固
定治具が半導体基板の表面に対して平行及び垂直方向へ
移動できる研削装置において、前記基板固定治具の上面
と砥石の回転軸がおおむね平行であることを特徴とする
半導体基板の研削装置。
1. A rotating shaft, a disc-shaped grindstone mounted around the rotating shaft, and a substrate fixing jig for horizontally holding a semiconductor substrate, wherein at least the grindstone or the substrate fixing jig is attached to a semiconductor substrate. What is claimed is: 1. A semiconductor substrate grinding device capable of moving in parallel and perpendicular directions to the surface of the substrate, wherein the top surface of the substrate fixing jig and the rotation axis of the grindstone are approximately parallel to each other.
【請求項2】  前記基板固定治具は、固定される半導
体基板の中心を軸にして回転することにより半導体基板
の外周部を研削し、前記砥石或いは前記基板固定治具は
、砥石の回転軸に対して垂直に移動し且つ半導体基板に
対して平行に移動することを特徴とする請求項1に記載
の半導体基板の研削装置。
2. The substrate fixing jig grinds the outer periphery of the semiconductor substrate by rotating around the center of the semiconductor substrate to be fixed, and the grindstone or the substrate fixing jig is arranged such that the grinding wheel or the substrate fixing jig rotates around the center of the semiconductor substrate to be fixed. 2. The semiconductor substrate grinding apparatus according to claim 1, wherein the semiconductor substrate grinding apparatus moves perpendicularly to the semiconductor substrate and parallel to the semiconductor substrate.
【請求項3】  2枚の半導体ウェーハを張り合わせて
加熱一体化した接着ウェーハのウェーハ外周部の未接着
部分を除去する半導体基板の研削方法において、前記接
着ウェーハの表面と平行である回転軸を有する砥石を該
回転軸を中心に回転させながら、少なくとも前記接着ウ
ェーハの下側の基板を該基板の厚さの2分の1以上を残
し、尚且つ未接着部より内側まで入れ、次いで、前記接
着ウェーハの中心を回転軸として、前記接着ウェーハ或
いは砥石を前記接着ウェーハの外周に沿って回転させる
ことを特徴とする半導体基板の研削方法。
3. A semiconductor substrate grinding method for removing an unbonded portion of a wafer outer periphery of a bonded wafer obtained by bonding and heating two semiconductor wafers together, the grinding method having a rotation axis parallel to the surface of the bonded wafer. While rotating the grindstone around the rotating shaft, insert at least the substrate below the bonded wafer, leaving at least half of the thickness of the substrate, and inside the unbonded part, and then A method for grinding a semiconductor substrate, comprising rotating the bonded wafer or the grindstone along the outer periphery of the bonded wafer with the center of the wafer serving as a rotation axis.
JP2346191A 1991-02-18 1991-02-18 Grinding device for semiconductor substrate and method thereof Pending JPH04263425A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2346191A JPH04263425A (en) 1991-02-18 1991-02-18 Grinding device for semiconductor substrate and method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2346191A JPH04263425A (en) 1991-02-18 1991-02-18 Grinding device for semiconductor substrate and method thereof

Publications (1)

Publication Number Publication Date
JPH04263425A true JPH04263425A (en) 1992-09-18

Family

ID=12111157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2346191A Pending JPH04263425A (en) 1991-02-18 1991-02-18 Grinding device for semiconductor substrate and method thereof

Country Status (1)

Country Link
JP (1) JPH04263425A (en)

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