JPH04262376A - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPH04262376A JPH04262376A JP3022521A JP2252191A JPH04262376A JP H04262376 A JPH04262376 A JP H04262376A JP 3022521 A JP3022521 A JP 3022521A JP 2252191 A JP2252191 A JP 2252191A JP H04262376 A JPH04262376 A JP H04262376A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- hybrid integrated
- integrated circuit
- holes
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005476 soldering Methods 0.000 claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 claims description 7
- 238000003780 insertion Methods 0.000 claims description 2
- 230000037431 insertion Effects 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 abstract description 6
- 238000002844 melting Methods 0.000 abstract description 2
- 230000008018 melting Effects 0.000 abstract description 2
- 239000002184 metal Substances 0.000 abstract description 2
- 229910052751 metal Inorganic materials 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3447—Lead-in-hole components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は混成集積回路装置に関し
、特に表面実装技術の一つであるリフロー半田付け実装
に適した混成集積回路装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly to a hybrid integrated circuit device suitable for reflow soldering, which is one of the surface mounting techniques.
【0002】0002
【従来の技術】従来のこの種の混成集積回路装置は、混
成集積回路基板の側面に端面電極を形成する方法や、混
成集積回路基板の上下面方向に基板を挟み込むクリップ
構造を有する端子を各対向辺に取付けフラットリードを
形成する構造、さらには、DIP構造で組立てた後、最
終組立工程において外部端子リード部分を基板に対して
水平方向に整形し、所望の長さに切断する構造等が一般
的でああった。2. Description of the Related Art Conventional hybrid integrated circuit devices of this type include a method of forming end face electrodes on the side surfaces of a hybrid integrated circuit board, and a method of forming terminals having a clip structure for sandwiching the board in the upper and lower directions of the hybrid integrated circuit board. There are structures in which flat leads are formed by attaching them to opposite sides, and structures in which, after assembly using a DIP structure, the external terminal leads are shaped horizontally to the board in the final assembly process and cut to the desired length. It was common.
【0003】また、リフロー半田付け実装に対応するた
めには、回路基板に対する端子の接続方法は半田接続後
、リフロー時の離脱を防止する目的で、樹脂により固着
する手法や、端子および端子ランドを金めっきし、熱圧
着法により半田を用いずに取付ける手法が一般的であっ
た。In addition, in order to support reflow soldering mounting, methods for connecting terminals to circuit boards include methods of fixing them with resin after soldering, and methods of attaching terminals and terminal lands to prevent them from coming off during reflow. The common method was to plate it with gold and attach it using thermocompression bonding without using solder.
【0004】0004
【発明が解決しようとする課題】上述した従来の混成集
積回路装置は、回路基板の側面に端面電極を設ける方法
では、部品の実装が可能であるのは回路基板の一面にの
みであるので実装効率が低いという欠点があった。また
、クリップ構造を有する外部端子によりフラットリード
を形成する方法の場合は、端子ピッチが1mm以下のク
リップ構造の実現が困難であるので、多数の入出力端子
を有する混成集積回路には不適であるという欠点があっ
た。さらに、リードの固定を半田接続に頼っていたため
、リフロー工程中におけるクリップ部の離脱を防止する
ため半田ごてによる手作業を必要とし、したがって、実
装コストが大幅に増大するという問題点があった。[Problems to be Solved by the Invention] In the conventional hybrid integrated circuit device described above, with the method of providing end electrodes on the side surface of the circuit board, it is possible to mount components only on one side of the circuit board. It had the disadvantage of low efficiency. In addition, in the case of the method of forming flat leads using external terminals having a clip structure, it is difficult to realize a clip structure with a terminal pitch of 1 mm or less, so it is not suitable for hybrid integrated circuits having a large number of input/output terminals. There was a drawback. Furthermore, since the lead fixation relied on solder connections, manual work using a soldering iron was required to prevent the clip part from coming off during the reflow process, resulting in a significant increase in mounting costs. .
【0005】[0005]
【課題を解決するための手段】本発明の混成集積回路装
置は、絶縁基板に形成した回路パターン上に半導体素子
および受動素子を搭載し信号および電源の外部接続用の
端子をスルーホールにより形成した第一の回路基板と、
前記第一の回路基板に上下に重ねて配置され絶縁基板の
端面に前記信号および電源の外部接続用の端面電極を形
成し、前記端面電極に接続され前記スルーホールに嵌合
し半田付にて接着するピン状の接続電極を有する第二の
回路基板とを備えて構成されている。[Means for Solving the Problems] A hybrid integrated circuit device of the present invention has semiconductor elements and passive elements mounted on a circuit pattern formed on an insulating substrate, and terminals for external connection of signals and power supply formed by through holes. a first circuit board;
An end surface electrode for external connection of the signal and power supply is formed on the end surface of the insulating substrate, which is arranged vertically over the first circuit board, and is connected to the end surface electrode and fitted into the through hole, and is soldered. and a second circuit board having pin-shaped connection electrodes to be bonded.
【0006】[0006]
【実施例】次に、本発明の実施例について図面を参照し
て説明する。Embodiments Next, embodiments of the present invention will be described with reference to the drawings.
【0007】図1は本発明の混成集積回路装置の一実施
例を示す概念図であり、(A)は斜視図、(B)は部分
断面図である。FIG. 1 is a conceptual diagram showing an embodiment of a hybrid integrated circuit device of the present invention, in which (A) is a perspective view and (B) is a partial sectional view.
【0008】本実施例の混成集積回路装置は、図1に示
すように、メイン回路基板1と、メイン回路基板1に上
下に重ねて配置されているサブ回路基板4とを備えて構
成されている。As shown in FIG. 1, the hybrid integrated circuit device of this embodiment includes a main circuit board 1 and a sub-circuit board 4 arranged vertically overlapping the main circuit board 1. There is.
【0009】メイン回路基板1は、絶縁基板に形成した
回路パターン3上に半導体素子および受動素子を搭載し
、信号および電源の外部接続用の端子をスルーホール2
により形成している。サブ回路基板4は、絶縁基板の端
面に信号および電源の外部接続用の端面電極5を形成し
、回路パターン6により端面電極5に接続されスルーホ
ール2に嵌合し半田8による半田付にて接着するピン状
の接続電極7を有する。The main circuit board 1 has semiconductor elements and passive elements mounted on a circuit pattern 3 formed on an insulating substrate, and terminals for external connection of signals and power are provided through through holes 2.
It is formed by The sub-circuit board 4 has an end face electrode 5 for external connection of signals and power supply formed on the end face of the insulating board, is connected to the end face electrode 5 by a circuit pattern 6, is fitted into the through hole 2, and is soldered with solder 8. It has a pin-shaped connection electrode 7 to be bonded.
【0010】次に、本実施例の適用の実際について説明
する。Next, the actual application of this embodiment will be explained.
【0011】一例として、本実施例のメイン回路基板1
は、絶縁基板の厚さ1.0mmであり、これに直径1m
mのスルーホール2をピッチ2.54mmで形成してい
る。また、サブ回路基板4は、絶縁基板の厚さ1.0m
mであり、これに円錐ピン状の金属製の接続電極7がス
ルーホール2にそれぞれ対応する位置に、すなわち、ピ
ッチ2.54mmで設けられ回路パターン6によりピッ
チ2.54mmの端面電極5に接続されている。As an example, the main circuit board 1 of this embodiment
The thickness of the insulating substrate is 1.0 mm, and the diameter of the insulating substrate is 1 m.
The through holes 2 are formed with a pitch of 2.54 mm. Moreover, the sub-circuit board 4 has an insulating board thickness of 1.0 m.
m, and conical pin-shaped metal connection electrodes 7 are provided at positions corresponding to the through holes 2, that is, at a pitch of 2.54 mm, and are connected to the end surface electrodes 5 with a pitch of 2.54 mm by a circuit pattern 6. has been done.
【0012】メイン回路基板1とサブ回路基板4との組
立は以下のような手順で行なう。The main circuit board 1 and sub-circuit board 4 are assembled in the following steps.
【0013】まず、メイン回路基板1のスルーホール2
に、230℃の高融点半田ペーストをディスペンサによ
り注入する。次に、サブ回路基板4の接続電極7をスル
ーホール2に嵌入し、高周波加熱されたヒータブロック
を押し当てることにより半田付けされる。以上により、
混成集積回路装置は外部接続端子として端面電極5を備
えて、表面実装に対応することができる。First, the through hole 2 of the main circuit board 1
Then, a high melting point solder paste of 230° C. is injected using a dispenser. Next, the connection electrodes 7 of the sub-circuit board 4 are fitted into the through holes 2, and soldered by pressing a high-frequency heated heater block against them. Due to the above,
The hybrid integrated circuit device is equipped with end face electrodes 5 as external connection terminals and can be used for surface mounting.
【0014】次に、本発明の第二の実施例について説明
する。Next, a second embodiment of the present invention will be explained.
【0015】図2は本発明の混成集積回路装置の第二の
実施例を示す図であり、(A)は斜視図、(B)は部分
断面図である。FIG. 2 is a diagram showing a second embodiment of the hybrid integrated circuit device of the present invention, in which (A) is a perspective view and (B) is a partial sectional view.
【0016】前述の第一の実施例に対する本実施例の相
違点は、サブ回路基板4の接続電極7に段等のストッパ
部9を設け、メイン回路基板1のスルーホール2への嵌
入を制限したことである。これにより、メイン回路基板
1とサブ回路基板4との間隔をたとえば3mmに設定す
ることが可能となる。その結果、メイン回路基板1は、
部品の両面実装が可能となるので実装密度を大幅に向上
できる。The difference between this embodiment and the first embodiment described above is that a stopper portion 9 such as a step is provided on the connection electrode 7 of the sub-circuit board 4 to restrict insertion into the through-hole 2 of the main circuit board 1. That's what I did. This makes it possible to set the distance between the main circuit board 1 and the sub-circuit board 4 to, for example, 3 mm. As a result, the main circuit board 1 is
Since components can be mounted on both sides, mounting density can be greatly improved.
【0017】これに対応して、本実施例では、スルーホ
ール2およびこれに対応する接続電極7をピッチ1.2
7mmで2列に配置した例を示している。この場合の端
面電極のピッチは0.65mmとなり、したがって、端
子数を大幅に増加することが可能となる。Correspondingly, in this embodiment, the through holes 2 and the corresponding connection electrodes 7 are arranged at a pitch of 1.2.
An example of 7 mm arranged in two rows is shown. In this case, the pitch of the end face electrodes is 0.65 mm, so it is possible to significantly increase the number of terminals.
【0018】[0018]
【発明の効果】以上説明したように、本発明の混成集積
回路装置は、半導体素子および受動素子を搭載し外部接
続用のスルーホールを有する第一の回路基板とスルーホ
ールに嵌合する接続電極および端面電極を有する第二の
回路基板とを備えることにより、外部端子のピッチを1
mm以下に高密度化でき、端子数を大幅に増大できると
いう効果がある。また、部品の両面実装が可能となるの
で、実装密度を向上することができるという効果がある
。さらに、クリップ構造は使わないのでリフロー工程中
におけるクリップ部の離脱という問題点も回避でき、し
たがって、実装コストが大幅に低減できるという効果が
ある。As explained above, the hybrid integrated circuit device of the present invention has a first circuit board on which a semiconductor element and a passive element are mounted and has a through hole for external connection, and a connecting electrode that fits into the through hole. and a second circuit board having end surface electrodes, the pitch of the external terminals can be reduced to 1.
It has the effect of increasing the density to less than mm and greatly increasing the number of terminals. Furthermore, since components can be mounted on both sides, the mounting density can be improved. Furthermore, since no clip structure is used, the problem of detachment of the clip part during the reflow process can be avoided, and therefore the mounting cost can be significantly reduced.
【図1】本発明の混成集積回路装置の一実施例を示す概
念図である。FIG. 1 is a conceptual diagram showing an embodiment of a hybrid integrated circuit device of the present invention.
【図2】本発明の混成集積回路装置の第二の実施例を示
す概念図である。FIG. 2 is a conceptual diagram showing a second embodiment of the hybrid integrated circuit device of the present invention.
1 メイン回路基板 2 スルーホール 3,6 回路パターン 4 サブ回路基板 5 端面電極 7 接続電極 8 半田 9 ストッパ部 1 Main circuit board 2 Through hole 3,6 Circuit pattern 4 Sub circuit board 5 End electrode 7 Connection electrode 8 Solder 9 Stopper part
Claims (2)
半導体素子および受動素子を搭載し信号および電源の外
部接続用の端子をスルーホールにより形成した第一の回
路基板と、前記第一の回路基板に上下に重ねて配置され
絶縁基板の端面に前記信号および電源の外部接続用の端
面電極を形成し、前記端面電極に接続され前記スルーホ
ールに嵌合し半田付にて接着するピン状の接続電極を有
する第二の回路基板とを備えることを特徴とする混成集
積回路装置。1. A first circuit board, in which semiconductor elements and passive elements are mounted on a circuit pattern formed on an insulating substrate, and terminals for external connection of signals and power sources are formed by through holes; and the first circuit board. An end surface electrode for external connection of the signal and power supply is formed on the end surface of the insulating substrate, and a pin-shaped connection is connected to the end surface electrode, fits into the through hole, and is bonded by soldering. A hybrid integrated circuit device comprising: a second circuit board having electrodes.
基板と予め定めた間隔で上下に重ねて配置され、前記接
続電極は前記第二の回路基板の面から前記間隔と同一の
長さの部分に前記スルーホールへの嵌入を制限する突出
部を有することを特徴とする請求項1記載の混成集積回
路装置。2. The second circuit board is arranged one above the other at a predetermined distance from the first circuit board, and the connection electrode has a length equal to the distance from the surface of the second circuit board. 2. The hybrid integrated circuit device according to claim 1, further comprising a protruding portion on a circumferential portion thereof for restricting insertion into said through hole.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3022521A JPH04262376A (en) | 1991-02-18 | 1991-02-18 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3022521A JPH04262376A (en) | 1991-02-18 | 1991-02-18 | Hybrid integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04262376A true JPH04262376A (en) | 1992-09-17 |
Family
ID=12085082
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3022521A Pending JPH04262376A (en) | 1991-02-18 | 1991-02-18 | Hybrid integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04262376A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004241187A (en) * | 2003-02-04 | 2004-08-26 | Alps Electric Co Ltd | Connector, and connecting method therefor |
JP2007134169A (en) * | 2005-11-10 | 2007-05-31 | Matsushita Electric Works Ltd | Connector assembly for substrate connection |
CN102625595A (en) * | 2011-01-31 | 2012-08-01 | 博大科技股份有限公司 | Method for using high frequency induction heating technology to weld electronic component |
JP2013025961A (en) * | 2011-07-19 | 2013-02-04 | Pioneer Electronic Corp | Organic el module |
-
1991
- 1991-02-18 JP JP3022521A patent/JPH04262376A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004241187A (en) * | 2003-02-04 | 2004-08-26 | Alps Electric Co Ltd | Connector, and connecting method therefor |
JP2007134169A (en) * | 2005-11-10 | 2007-05-31 | Matsushita Electric Works Ltd | Connector assembly for substrate connection |
JP4613799B2 (en) * | 2005-11-10 | 2011-01-19 | パナソニック電工株式会社 | Board connector assembly |
CN102625595A (en) * | 2011-01-31 | 2012-08-01 | 博大科技股份有限公司 | Method for using high frequency induction heating technology to weld electronic component |
JP2013025961A (en) * | 2011-07-19 | 2013-02-04 | Pioneer Electronic Corp | Organic el module |
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