JPH0426231A - Adpcm encoding system - Google Patents

Abstract

PURPOSE:To enable bit selection at a real time by deciding the number of bits in ADPCM algorithm by using a differential signal, quantization differential signal from a bit decision circuit, or linear signals from an adaptive predicting device and a code conversion circuit. CONSTITUTION:In a code conversion circuit 2, code conversion is executed from an inputted PCM signal 1a to a linear signal 2a for a signal processing and the signal is outputted to a difference calculation circuit 3 and a bit number decision circuit 8. The difference calculation circuit 3 calculates difference between the linear signal 2a and apredict signal 7a to be outputted from an adaptive predicting device 7 and outputs a differential signal 3a to a quantizing circuit 4 and the bit number decision circuit 8. In the quantizing circuit 4, code conversion is executed from the differential signal 3a to an ADPCM 4a, and the signal is transmitted to an inverse quantizing circuit 6 and simultaneously outputted from an ADPCM signal output terminal 5 to the outside. Then, according to the integral value of the differential signal and a threshold value to be calculated from the input PCM signal, the number of bits is decided for the ADPCM encoding algorithm. Thus, the number of bits for ADPCM encoding can be selected in real time corresponding to an error signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an ADPCM encoding system, and particularly to an ADPCM encoding system for code-converting a PCM signal into an ADPCM signal.

[Conventional technology]

In the conventional ADPCM encoding system, the PCM signal is
D (adaptive differential
) The ADPCM encoding circuit for converting into a PCM signal has been implemented by keeping the number of bits of the encoding algorithm constant or by specifying it in advance from the outside.

[Problem to be solved by the invention]

In the conventional ADPCM encoding method described above, ADPCM
Since the number of bits is set in advance in the encoding circuit, it is not possible to change the number of bits in real time, or there is a problem in that the hardware size increases if a special external circuit for signal discrimination is added and changed. .

[Means to solve the problem]

In the ADPCM encoding method of the present invention, the difference signal between the input PCM signal and the estimated signal output from the adaptive predictor is
An AD that generates an adaptive predictor input by quantizing into a PCM signal and dequantizing this ADPCM signal.
In the PCM encoding method, ADPC is
An ADPCM encoding method characterized by determining the number of bits of the M encoding algorithm; 2. AD from the input PCM signal and the reproduced signal output from the adaptive predictor.
The feature is that the number of bits of the PCM encoding algorithm is determined.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the ADPCM encoding method of the present invention, in which 1 is a PCM signal input terminal, 2 is a code conversion circuit, and 3 is a difference calculation circuit.

4 is a quantization circuit, 5 is an ADPCM signal output terminal, 6 is an inverse quantization circuit, 7 is an adaptive predictor, and 8 is a bit number determining circuit.

Next, the operation of this embodiment will be explained. The code conversion circuit 2 converts the PCM signal 1a inputted from the input terminal 1 into a linear signal 2a for signal processing, and converts the PCM signal 1a input from the input terminal 1 into a linear signal 2a for signal processing.
and output to the bit number determining circuit 8. The difference calculation circuit 3 calculates the difference between the code-converted linear signal 2a and the estimated signal 7a output from the adaptive predictor 7, and outputs the difference signal 3a to the quantization circuit 4 and the bit number determination circuit 8. In the quantization circuit 4, the AD outputted by the bit number determination circuit 8
The difference signal 3a is code-converted into an ADPCM signal 4a using the bit number according to the request signal 8a for requesting the number of encoding bits of the PC, M encoding algorithm, and sent to the inverse quantization circuit 6. At the same time, the ADPCM signal output terminal Output from 5 to the outside.

The inverse quantization circuit 6 uses the bit number according to the encoding bit number request of the ADPCM encoding algorithm of the request signal 8a output from the bit number determination circuit 8 to convert the ADPCM signal 4a output from the quantization circuit 4. is decoded into a linear signal to generate a quantized difference signal 6a. In the adaptive predictor 7,
The estimated signal 7a and the reproduced signal 7b are generated by the quantized difference signal 6a.
and outputs the estimated signal 7a to the difference calculation circuit 3.

The bit number determination circuit 8 inputs the difference signal 3a or the quantized difference signal 6a and the linear signal 2a, and requests to determine the number of bits of the ADPCM encoding algorithm used in the quantization circuit 4 and the inverse quantization circuit 6. A signal 8a is output.

When the linear signal 2a and the differential signal 3a are not input to the bit number determination circuit 8, this implementation can be achieved by using, for example, Recommendation G, 723 from the Commission International Telegraph and Telephone Telecommunications (CCITT) as the ADPCM encoding algorithm. For example, 5IGNAL ESTIMATE can be applied as the estimated signal, DIFFERENCE 5IGNAL can be applied as the difference signal, and the circuit shown in FIG. 2 can be applied as the bit number determining circuit 8.

FIG. 2 is a detailed block diagram of the bit number determination circuit of this embodiment. In the square integration circuit 82, the difference signal inputted from the first input terminal 81 is squared and integrated to obtain the difference signal power, and the first threshold value judgment is performed. It is output to the circuit 84 and the second threshold determination circuit 85. On the other hand, the threshold value calculation circuit 83 generates a first threshold value 88 and a second threshold value 89 from the input signal that is a linear signal inputted from the second input terminal 9o, and generates a first threshold value 88 and a second threshold value 89, and are output to the threshold value determination circuit 85, respectively. The first threshold value determination circuit 84 compares the output from the square integration circuit 82 and the first threshold value 88 and outputs the result to the bit number determination circuit 86 . Similarly, the second threshold value determination circuit 85 compares the output from the square integration circuit 82 and the second threshold value 89 and outputs the result to the bit number determination circuit 86 .

The bit number determination circuit 86 inputs the outputs from the first threshold determination circuit 84 and the second threshold determination circuit 85, and determines the ADPCM based on the magnitude relationship between the differential signal power and the first threshold 88 and second threshold 89. Determine the number of bits of the encoding algorithm. For example, two thresholds THI, TH2 (THI,
TH2:TH1 >TH2) and allocating the number of bits as shown below depending on the magnitude relationship with the differential signal power, the number of bits for ADPCM encoding can be selected in real time in accordance with the differential signal power.

5 bits: differential signal power≧THI 4 bits: TH1≧differential signal power≧TH23 bits: T
H2≧Differential signal power By the way, if the differential signal power fluctuates above and below the dark value due to noise or the like, the number of bits of the ADPCM encoding algorithm is changed more than necessary, which causes a practical problem. Therefore, in this example, as shown in FIG.
The hysteresis characteristic of this threshold value will be explained using FIG. 3. For example, consider a comparison of the magnitude relationship between the input signal and THI shown in FIG. In this case, first, a comparison is made with the larger threshold value THIU, and the result is output as a threshold value determination result. And the threshold value THIU for the one with larger input signal
In the following cases, the larger threshold THIU is used, and the smaller threshold THIL is used only when the input signal exceeds the larger threshold 7810. Then, while the input signal is greater than or equal to the smaller threshold THIL, the smaller threshold THIL
A comparison judgment is carried out using the threshold value T for which the input signal is smaller.
Comparative determination is performed using the larger threshold THIU only after the threshold value THIU is equal to or lower than HIL. The same applies to TH2. This difference allows the section from THIU to TUIL to exist as a buffer area, thereby reducing unnecessary changes in the number of bits.

Further, the bit number determination circuit 8 inputs the reproduced signal 7b and the linear signal 2a from the code conversion circuit, and determines the number of bits of the ADPCM encoding algorithm used in the quantization circuit 4 and the inverse quantization circuit 6. For example, ADP
If recommendation 0.723 from the Consultative Committee on International Telegraph and Telephone (CCITT) is used as the CM encoding algorithm,
The estimated signal of the present invention is 5IGNAL ESTIMA.
TE also uses an integral value obtained by integrating the error signal between the reproduced signal and the input signal and two predetermined large and small thresholds (THI, TH2).
:THI>T)12), and by allocating the number of bits as shown below according to the magnitude relationship between the two, the number of bits for ADPCM encoding can be selected in real time in response to the error signal as follows: .

5-bit binary value ≧ THI 4-bit: TH1 ≧ integral value ≧ TH2 3-bit: TH2 ≧ integral value Note that this embodiment has explained the ADPCM encoder, but the ADPCM decoder does not have a stopper. The input is the ADPCM signal, the output is the PCM signal, and one input of the bit number determining circuit 8 is the output PCM signal, and the same implementation is possible. Furthermore, in this embodiment, the quantized difference signal (QtjANTIZED DIFFERENCE
5IGNAL) and estimated signal (SIGNAL ESTI)
MATE) Playback signal from Toka (RECONSTRUCTE)
A block that generates D5IGNAL) is also included in the adaptive predictor.

〔Effect of the invention〕

As explained above, in the present invention, the bit determination circuit determines the number of bits of the ADPCM encoding algorithm based on the difference signal, quantized difference signal, or linear signal from the adaptive predictor and code conversion circuit, so that it can be performed in real time. Since bit selection is possible and some blocks of the ADPCM encoding algorithm can be shared, an ADPCM encoder that can automatically vary bits can be realized by adding a simple circuit.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a detailed block diagram of the bit number determination circuit of this embodiment, and FIG. 3 is a diagram for explaining the operation of the threshold value determination circuit of this embodiment. It is. 1... PCM input terminal, 2... code conversion circuit, 3.
...Difference calculation circuit, 4...Quantizer, 5...ADP
CM output terminal, 6... Inverse quantizer, 7... Adaptive predictor, 8... Bit number determination circuit, 81... First input terminal, 82... Square integration circuit, 83. ...Threshold value calculation circuit, 84...First dark value judgment circuit, 85...Second threshold value judgment circuit, 86...Bit number judgment circuit, 87...
・Judgment output, 88...first threshold value output, 89...second dark value output, 9°...second input terminal・

Claims (1)

[Claims] 1. Quantizing the difference signal between the input PCM signal and the estimated signal output from the adaptive predictor into an ADPCM signal and inversely quantizing the ADPCM signal to generate the adaptive predictor input. An ADPCM encoding method, characterized in that the number of bits of an ADPCM encoding algorithm is determined based on an integral value of the difference signal and a threshold value calculated from the input PCM signal. 2. The ADP according to claim 1, wherein the number of bits of the ADPCM encoding algorithm is determined from the input PCM signal and the reproduced signal output from the adaptive predictor.
CM encoding method. 3. The integral value of the input from the adaptive predictor and the input PCM
Claim 1, characterized in that the number of bits of the ADPCM encoding algorithm is determined from a threshold value calculated from the signal.
ADPCM encoding method described.