JPH0425760B2 - - Google Patents

Info

Publication number
JPH0425760B2
JPH0425760B2 JP58156120A JP15612083A JPH0425760B2 JP H0425760 B2 JPH0425760 B2 JP H0425760B2 JP 58156120 A JP58156120 A JP 58156120A JP 15612083 A JP15612083 A JP 15612083A JP H0425760 B2 JPH0425760 B2 JP H0425760B2
Authority
JP
Japan
Prior art keywords
switch
switches
communication path
output terminals
lattice
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58156120A
Other languages
Japanese (ja)
Other versions
JPS6047589A (en
Inventor
Kazuhiro Hiraide
Hideki Kataoka
Yoshinori Oikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP15612083A priority Critical patent/JPS6047589A/en
Publication of JPS6047589A publication Critical patent/JPS6047589A/en
Publication of JPH0425760B2 publication Critical patent/JPH0425760B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Description

【発明の詳細な説明】 発明の技術分野 本発明は広帯域通話路方式、さらに詳しく言え
ば漏話低減が可能な広帯域通話路方式に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a broadband channel system, and more particularly to a broadband channel system capable of reducing crosstalk.

従来技術と問題点 従来、入出力端子数の多い1段の集線通話路を
構成する場合等においては、小規模なスイツチマ
トリツクス(以下では1次スイツチと略すること
とする)を多数用いて、出線をマルチ接続する、
すなわち、直接、1次スイツチの出力端子側を接
続する構成が一般的である。しかし、これら1次
スイツチの叉点が開放状態であつても、スイツチ
間に微小のキヤパシタンスが存在し、信号の漏洩
があることから、微小のキヤパシタンスにより、
同一の1次スイツチで通話中となつている接続さ
れた入力端子と出力端子が複数ある場合に漏話の
可能性がある。したがつて、出力端子側をマルチ
接続すると、他の1次スイツチからの漏話が相加
する可能性も生じる。このため、従来の構成法は
出線のマルチ接続により漏話が囲り込み多重漏話
が大きくなるので、広帯域通話路例えばビデオ信
号用通話路等に適用するには1次スイツチに対す
る漏話特性を厳しくする必要があり、その実現
性・経済性に問題があつた。これを改良するため
第1図に示す広帯域通話路構成が提案されている
(例えば信学技報CS75−100.1975)。
Conventional technology and problems Conventionally, when configuring a single-stage concentrator communication line with a large number of input/output terminals, a large number of small-scale switch matrices (hereinafter abbreviated as primary switches) were used. , connect multiple outgoing lines,
That is, a configuration in which the output terminal side of the primary switch is directly connected is common. However, even when the crossing points of these primary switches are open, there is a small capacitance between the switches and signal leakage occurs.
There is a possibility of crosstalk when there are multiple connected input and output terminals that are active on the same primary switch. Therefore, when multiple output terminals are connected, crosstalk from other primary switches may be added. For this reason, in the conventional configuration method, crosstalk is surrounded by multiple connections of outgoing lines and multiple crosstalk becomes large. Therefore, in order to apply it to a wideband communication path, for example, a communication path for video signals, the crosstalk characteristics for the primary switch must be made strict. There was a need for this, and there were problems with its feasibility and economy. In order to improve this, a wideband channel configuration as shown in FIG. 1 has been proposed (for example, IEICE Technical Report CS75-100.1975).

第1図において、LCは集線通話路装置、A11
〜A1n,〜,Al1〜Alnはその入力端子、B1,〜Bo
は同じくその出力端子、Q11〜,Ql1はm入力n出
力(以下m×nと略す)のスイツチマトリツクス
であつて1次スイツチを構成し、S1,Soはl×1
のスイツチ列(以下2次スイツチと略す)、Mは
集線通話路装置LCの入力端子数、Nは同じく出
力端子数であり、第1図の例ではN=nである。
なお、1次スイツチQ11〜Ql1はそれぞれ、m個の
入力端子に連るm個の導体とn個の出力端子に連
るn個の導体とを交さ配置し、その交さ点にスイ
ツチを設けたスイツチマトリツクスで構成され
る。また、2次スイツチS1〜Soはそれぞれがn個
の入力端子に連るn個の導体と1個の出力端子に
連る1個の導体とを交さ配置し、その交さ点にス
イツチ(S11,〜S1l等)を設けたスイツチ列であ
る。上記の各スイツチはオン・オフ動作をするも
のであればよく、機械的のものでも電子的のもの
でもよい。しかし、これ等スイツチはオフ状態で
あつてもスイツチ間に微小のキヤパシタンスが存
在し、信号の漏洩を皆無とすることは困難であ
る。第1図において111,〜11n,〜1m
1,〜1mn等は1次スイツチQ11の交さ点スイツ
チを例示し、S11〜S1lは2次スイツチS1の交さ点
スイツチを例示する。
In Figure 1, LC is a concentrator channel device, A 11 ,
~A 1n , ~, A l1 ~A ln is its input terminal, B 1 , ~B o
are the same output terminals, Q 11 ~, Q l1 are switch matrices with m inputs and n outputs (hereinafter abbreviated as m x n) and constitute primary switches, and S 1 and S o are l x 1
(hereinafter referred to as secondary switches), M is the number of input terminals of the line concentrator LC, and N is the number of output terminals, and in the example of FIG. 1, N=n.
In addition, each of the primary switches Q 11 to Q l1 is arranged so that m conductors connected to m input terminals and n conductors connected to n output terminals intersect, and the intersection point is It consists of a switch matrix with switches. In addition, each of the secondary switches S 1 to S o is arranged so that n conductors connected to n input terminals and one conductor connected to one output terminal intersect, and a conductor is connected to the intersection point. This is a switch row provided with switches (S 11 , ~S 1l , etc.). Each of the above-mentioned switches may be a switch that performs on/off operation, and may be a mechanical switch or an electronic switch. However, even when these switches are in the off state, there is a small amount of capacitance between them, making it difficult to completely eliminate signal leakage. 111, ~11n, ~1m in Figure 1
1, .about.1mn, etc. exemplify the cross point switches of the primary switch Q11 , and S11 to S1l exemplify the cross point switches of the secondary switch S1 .

ここにmは各1次スイツチQ11〜Ql1の入力端子
の数、nは同じく出力端子の数、lは1次スイツ
チQ11〜Ql1の数である。集線通話路装置LCの入
力端子数Mはm×l、2次スイツチS1〜Soはそれ
ぞれ1次スイツチQ11〜Ql1の第f番目(1≦f≦
n)の出力端子から入力するものでその入力端子
数はnに等しい。
Here, m is the number of input terminals of each of the primary switches Q 11 to Q l1 , n is the number of output terminals, and l is the number of primary switches Q 11 to Q l1 . The number of input terminals M of the line concentrator LC is m×l, and the secondary switches S 1 to S o are the f-th (1≦f≦
The number of input terminals is equal to n.

第1図の構成で漏話低減が可能な理由は、1次
スイツチQ11〜Ql1の出側がマルチ接続されずに2
次スイツチS1〜Soに接続されているためである。
すなわち集線通話路装置LCの所要の入力端子A11
〜Alnと出力端子B1〜Boとを接続する場合、上記
両端子を接続する1次スイツチおよび2次スイツ
チの交さ点スイツチを閉成するが2次スイツチ内
の他の交さ点は全て開放状態に保つため、漏話と
なる信号は開放状態にある1次スイツチ、2次ス
イツチを2段に通ることになり、オフ状態でスイ
ツチ間に存在する微小キヤパシタンスは直列状態
になることから、他のスイツチマトリクスからの
漏話のレベルは低くなり多重漏話は低減される。
The reason why crosstalk can be reduced with the configuration shown in Figure 1 is that the output sides of the primary switches Q 11 to Q l1 are
This is because they are connected to the next switches S 1 to S o .
That is, the required input terminal A 11 of the line concentrator LC
When connecting ~A ln and output terminals B 1 ~ B o , the intersection point switch of the primary switch and secondary switch that connects both terminals is closed, but other intersection points within the secondary switch are closed. Since all switches are kept open, the crosstalk signal will pass through the open primary switch and secondary switch in two stages, and the minute capacitance that exists between the switches in the off state will be in series. , the level of crosstalk from other switch matrices is reduced and multiple crosstalk is reduced.

しかし、第1図の構成を実現する場合、1次ス
イツチQ11〜Ql1,および2次スイツチS1〜Soをそ
れぞれLSI化し、プリント板に搭載するか、1次
スイツチQ11〜Ql1および2次スイツチS1〜So
各々プリント基板に実装し、バツクワイヤリング
ボート等により接続する方法が考えられる。いず
れも、1次スイツチから2次スイツチへの引込線
はl×n本必要となり、集線通話装置LCの入力
端子数Mおよび出力端子数Nの数が大きくなると
その並行布線間の漏話が無視できなくなるので、
これらの布線スペースを広くするなどにより漏話
減少を図る必要がある。そのため実装密度を低下
させたり、布線部に多層化パターンを用いること
などが必要となり、実装上の問題がある。
However, when realizing the configuration shown in Fig. 1, the primary switches Q 11 to Q l1 and the secondary switches S 1 to S o are each made into LSIs and mounted on a printed board, or the primary switches Q 11 to Q l1 are A conceivable method is to mount the secondary switches S 1 to S o on a printed circuit board and connect them using a back wiring board or the like. In either case, l×n lead-in wires are required from the primary switch to the secondary switch, and when the number M of input terminals and the number N of output terminals of the line concentrator LC become large, crosstalk between the parallel wiring can be ignored. Because it will disappear,
It is necessary to reduce crosstalk by widening the wiring space. Therefore, it is necessary to lower the packaging density or use a multilayer pattern in the wiring portion, which poses problems in packaging.

また、導入初期等の加入者が少ない段階でも2
次スイツチはある程度固定的に搭載しておく必要
があり、増設性の点でも難点がある。
In addition, even at a stage when there are few subscribers such as in the initial stage of introduction, 2
The next switch must be installed in a fixed manner to some extent, which poses a problem in terms of expandability.

発明の目的 本発明はこれ等の欠点を解決するために、前記
1次スイツチを構成するスイツチマトリツクスの
出側の全端子に各々漏話低減用のスイツチを付加
して構成した格子形スイツチを複数個設け、上記
の格子形スイツチの出線マルチ接続を可能とした
もので、その目的は、通話路の漏話特性を劣化さ
せることなしに布線数を大幅に減少し、増設性の
よい通話路を実現することにある。
Purpose of the Invention In order to solve these drawbacks, the present invention provides a plurality of lattice-type switches each having a crosstalk reduction switch added to each terminal on the output side of the switch matrix constituting the primary switch. The purpose of this is to significantly reduce the number of wires without deteriorating the crosstalk characteristics of the communication path, and to create a communication path with good expandability. The aim is to realize this.

発明の実施例 以下、本発明の実施例を図面について詳細に説
明する。
Embodiments of the Invention Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

第2図は本発明の第1の実施例の接続図であ
る。この実施例は集線通話路として構成されてい
る。
FIG. 2 is a connection diagram of the first embodiment of the present invention. This embodiment is configured as a concentrator channel.

第2図において、LCは集線通話路装置、A11
〜Aln,〜,Al1〜Alnはその入力端子、B1,〜Bo
は同じく出力端子、Q11〜Ql1はm×nのスイツチ
マトリツクスで1次スイツチを構成し、P11〜Pl1
は格子形スイツチであつて、それぞれ1次スイツ
チQ11〜Ql1を構成するスイツチマトリツクスを内
蔵し、その入力端子側は互に同一であるが、スイ
ツチマトリツクスQ11〜Ql1の各出力端子側にそれ
ぞれオン・オフ可能なスイツチ(第2図X11
X1o)を付加して格子形スイツチP11〜Pl1の出力
端子を構成している。P11〜Pl1を他のスイツチマ
トリツクス例えばQ11〜Ql1と区別するため格子形
スイツチと称することとする。Mは集線通話路装
置LCの入力端子数、Nは同じく出力端子数であ
り、第2図の例では第1図と同様にN=nであ
る。なお、1次スイツチQ11〜Ql1はそれぞれm個
の入力端子に連るm個の導体とn個の出力端子に
連るn個の導体とを交さ配置し、その交さ点にス
イツチを設けたスイツチマトリツクスである。格
子形スイツチP11〜Pl1は、それぞれ1次スイツチ
Q11〜Ql1を内蔵し、P11に例示するように、その
n個の出力端子は、それぞれスイツチX11〜X1o
を介して集線通話路装置LCの出力端子B1〜Bo
に接続されている。上記のスイツチはオン・オフ
動作をするものであればよく、機械的のものでも
電子的のものでもよい。しかし、これ等スイツチ
はオフ状態であつてもスイツチ間に微小のキヤパ
シタンスが存在し信号の漏洩を皆無とすることは
困難である。第2図において111,〜11n,
〜1m1,〜1mn等は1次スイツチQ11の交さ点
スイツチを例示している。
In Figure 2, LC is a concentrator channel device, A 11 ,
~A ln , ~, A l1 ~A ln is its input terminal, B 1 , ~B o
are the same output terminals, Q 11 to Q l1 constitute a primary switch with an m×n switch matrix, and P 11 to P l1
is a lattice type switch, and each has a built-in switch matrix that constitutes the primary switches Q 11 to Q l1 , and their input terminals are the same, but each output of the switch matrix Q 11 to Q l1 Switches that can be turned on and off on the terminal side (Figure 2
X 1o ) are added to form the output terminals of the lattice type switches P 11 to P l1 . In order to distinguish P 11 to P l1 from other switch matrices such as Q 11 to Q l1 , they will be referred to as lattice type switches. M is the number of input terminals of the line concentrator LC, and N is the number of output terminals. In the example of FIG. 2, N=n as in FIG. 1. In addition, each of the primary switches Q 11 to Q l1 is arranged by intersecting m conductors connected to m input terminals and n conductors connected to n output terminals, and a switch is placed at the intersection point. This is a switch matrix with Grid type switches P 11 to P l1 are each primary switch.
Q 11 to Q l1 are built in, and as illustrated in P 11 , its n output terminals are connected to switches X 11 to X 1o , respectively.
are connected to the output terminals B 1 to B o of the line concentrator LC via the line concentrator LC. The above-mentioned switch may be a switch that performs an on/off operation, and may be a mechanical switch or an electronic switch. However, even when these switches are in the off state, there is a small amount of capacitance between them, making it difficult to completely eliminate signal leakage. In Fig. 2, 111, ~ 11n,
~1m1, ~1mn, etc. illustrate the intersection point switches of the primary switch Q11 .

ここにmは1次スイツチQ11〜Ql1あるいは格子
形スイツチP11〜Pl1の入力端子の数、nは同じく
出力端子の数、lは1次スイツチQ11〜Ql1あるい
は格子形スイツチP11〜Pl1の数である。集線通話
路装置LCの入力端子数Mはm×lである。また
集線通話路装置LCの出力端子数Nは、各出力端
子B1〜Boをそれぞれ1次スイツチQ11〜Ql1ある
いは格子形スイツチP11〜Pl1の第f番目(1≦f
≦n)の出力端子をマルチ接続して構成するた
め、第1図と同様nに等しい。
Here, m is the number of input terminals of the primary switches Q 11 to Q l1 or grid type switches P 11 to P l1 , n is the number of output terminals, and l is the number of primary switches Q 11 to Q l1 or grid type switches P. 11 ~ P l1 is the number. The number M of input terminals of the line concentrator LC is m×l. In addition , the number N of output terminals of the line concentrator LC is such that each output terminal B 1 to B o is connected to the f- th (1≦ f
≦n) is configured by connecting multiple output terminals, so it is equal to n as in FIG.

なお第1図の集線通話路装置LCの2次スイツ
チS1のうちその1次スイツチQ11の出力を接続す
るスイツチは第2図の集線通話路装置LCの格子
形スイツチP11のスイツチX11と等価な機能を持
つと見なすことができ、そのためスイツチによる
漏話低減効果は第1図と第2図の集線通話路装置
LCでは同等であるが、出線マルチ部が、第1図
ではl×n本であるのに比べ第2図の実施例では
n本であるため、出線マルチ布線数は、第1図に
示す従来のものの1/lとなり、第1図の従来例
における集線通話路装置LCの入力端子数Mおよ
び出力端子数Nの数が多くなることによる1次ス
イツチと2次スイツチ間の並行布線間の漏話に対
しても効果的となり、布線部の実装効率向上にき
わめて有効である。また本実施例では布線部のプ
リント枚層数の減少による経済化効果も大きく、
さらに、布線部と格子スイツチ部は単純なマルチ
接続でよいためスイツチの増設が容易であり、集
線比の変更はl(1次スイツチあるいは格子形ス
イツチの数)を増加するだけで容易に対処でき
る。
Of the secondary switches S 1 of the concentrator LC in FIG. 1, the switch that connects the output of the primary switch Q 11 is the switch X 11 of the lattice switch P 11 of the concentrator LC in FIG. 2. Therefore, the crosstalk reduction effect of the switch can be considered to be equivalent to that of the concentrator communication path device shown in Figures 1 and 2.
Although the same is true for LC, the number of outgoing multi-wires is n in the embodiment shown in Fig. 2, compared to l x n in Fig. 1, so the number of outgoing multi-wires is as shown in Fig. 1. The number of input terminals M and the number of output terminals N of the concentrator LC in the conventional example shown in Fig. 1 are increased, and the parallel fabric between the primary switch and secondary switch is It is also effective against crosstalk between lines, and is extremely effective in improving the mounting efficiency of the wiring section. In addition, in this example, there is a large economical effect due to the reduction in the number of printed layers in the wiring section.
Furthermore, since the wiring section and grid switch section require simple multi-connections, it is easy to add switches, and changing the concentration ratio can be easily handled by simply increasing l (the number of primary switches or grid switches). can.

本実施例において、1次スイツチQ11〜Ql1の入
力端子数m出力端子数nおよびその数lを適当に
選定することにより、集線形のみならず非集線形
の通話路装置を構成することもできる。
In this embodiment, by appropriately selecting the number m of input terminals m the number n of output terminals and the number l of the primary switches Q 11 to Q l1 , it is possible to configure not only a concentrating line but also a non-concentrating line communication path device. You can also do it.

上記第2図の実施例は、その出力端子数Nが1
次スイツチの出力端子数nに等しい(N=n)も
のであつたが、第3図は、N>nとすることが可
能な本発明の第2の実施例の接続図である。第3
図においてLC′は通話路装置、L1〜Lrは、それぞ
れ第2図に示した集線通話路装置LCと同一構成
のr個の部分的通話路装置、A11〜A1n,〜Al1
Alnは通話路装置LC′の入力端子、B11〜B1o〜Br1
〜Broは同じく出力端子である。入力端子A11
A1nよりの入力は分岐し、それぞれバツフア・ア
ンプBAを介して部分的通話路装置L1〜Lrの対応
する入力端子に入力する。部分的通話路装置L1
〜Lrのそれぞれの出力端子B11〜B1o,〜,Br1
Broは本通話路装置LC′の出力端子を構成する。
従つて、通話路装置LC′の出力端子数Nはn×r
となりn(格子スイツチP11,〜Pl1,〜,P1r〜Plr
等の出力端子数)より多くなし得る。
In the embodiment shown in FIG. 2 above, the number of output terminals N is 1.
Although the number of output terminals of the next switch is equal to n (N=n), FIG. 3 is a connection diagram of a second embodiment of the present invention in which N>n can be satisfied. Third
In the figure, LC' is a channel device, L 1 to L r are r partial channel devices having the same configuration as the concentrator channel device LC shown in FIG. 2, and A 11 to A 1n , to A l1 , respectively. ~
A ln is the input terminal of the communication path device LC′, B 11 ~B 1o ~ B r1
~B ro is also an output terminal. Input terminal A 11 ~
The inputs from A 1n are branched and input to corresponding input terminals of partial channel devices L 1 to L r , respectively, via buffer amplifiers BA. Partial channel device L 1
~L r 's respective output terminals B 11 ~B 1o , ~, B r1 ~
B ro constitutes the output terminal of the present communication channel device LC'.
Therefore, the number N of output terminals of the communication line device LC' is n×r
Next n (lattice switch P 11 , ~P l1 , ~, P 1r ~P lr
(number of output terminals, etc.) can be increased.

第3図の通話路装置LC′において、バツフアア
ンプBAは、入力側で各格子形スイツチP11〜Pl1
〜,P1r〜Plrの入力端子に分岐するときのインピ
ーダンス低下を抑えると共に、バツフア・アンプ
BA内では信号に方向性があることを利用して、
他の格子形スイツチからの漏話信号を遮断し、漏
話を自らの格子形スイツチに限定することができ
る。なおバツフアアンプBAは1入力多出力の分
岐アンプでもよい。これにより漏話は、通話路装
置LC′の入力端子および出力端子の数M,Nには
無関係となり、また交さ点スイツチ当りに要求さ
れる漏話規格は変らない。第3図の格子形スイツ
チP11〜Pl1,〜P1r〜PlrはLSI化により、パツケー
ジ内で第3図の構成となるように実装することも
可能であり、この場合は出力マルチ線はパツケー
ジ内布線となる。また、格子形スイツチP11等を
パツケージにのせた場合は出力マルチ線は、バツ
クワイヤリングボード等で実現できる。
In the communication path device LC′ of FIG. 3, the buffer amplifier BA has grid type switches P 11 to P l1 ,
〜、P 1r 〜P lr In addition to suppressing the impedance drop when branching to the input terminal, the buffer amplifier
In BA, taking advantage of the fact that the signal has directionality,
It is possible to block crosstalk signals from other grid switches and limit crosstalk to its own grid switch. Note that the buffer amplifier BA may be a branch amplifier with one input and multiple outputs. This makes crosstalk independent of the number M, N of the input and output terminals of the channel device LC', and the crosstalk standard required per crosspoint switch remains unchanged. The lattice type switches P 11 ~ P l1 , ~P 1r ~P lr in Figure 3 can be implemented in the package as shown in Figure 3 by converting them into LSI, and in this case, the output multi-wire is the wiring inside the package cage. Furthermore, when a lattice type switch P11 or the like is mounted on a package, output multi-wires can be realized using a back wiring board, etc.

発明の効果 以上説明したように、本発明によれば広帯域通
話路装置の規模がその構成要素である格子形スイ
ツチの出線数に等しい出力数の場合は第1の実施
例のように、出力端子の単純なマルチ接続で実現
でき、また格子形スイツチの出線数よりも多い場
合は第2の実施例のように入側にバツフアアンプ
を設け、バツフアアンプを介した格子形スイツチ
の出線をマルチ接続することによつて増設が容易
で、かつ漏話が少なく、任意のスイツチサイズの
広帯域通話路を経済的に実現できる効果がある。
Effects of the Invention As explained above, according to the present invention, when the scale of the wideband channel device is equal to the number of output lines of the lattice type switch that is its component, the output power is reduced as in the first embodiment. This can be achieved by simple multi-connection of terminals, and if the number of output lines is greater than the number of output lines of the grid type switch, a buffer amplifier is installed on the input side as in the second embodiment, and the output lines of the grid type switch can be connected multiple times via the buffer amplifier. By connecting, expansion is easy, crosstalk is small, and a wideband communication path of any switch size can be realized economically.

また、本発明によつて、実現した通話路装置を
用いて公知の技術により多段リンク構成しても漏
話の少ない広帯域通話路を容易に実現できる利点
がある。
Further, the present invention has the advantage that a wideband communication path with little crosstalk can be easily realized even when a multi-stage link is configured using a known technology using the communication path device realized.

なお、本発明は構成を工夫することによつて漏
話特性の改善を図りつつ、各種利点を生かしたも
のであるため、スイツチの構造、スイツチの種類
には制限はない。
It should be noted that since the present invention utilizes various advantages while improving the crosstalk characteristics by devising the configuration, there are no restrictions on the structure of the switch or the type of switch.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の広帯域通話路装置の構成を示す
図、第2図は本発明の第1の実施例の構成図、第
3図は本発明の第2の実施例の構成図である。 M……入力端子数、N……出力端子数、P11
Pl1〜P1r〜Plr……格子形スイツチ、m……格子形
スイツチ入力端子数、n……格子形スイツチ出力
端子数、A11〜A1n,〜,Al1〜Aln……入力端子、
B1〜Bo,B11〜B1o,〜,Br1〜Bro……出力端子、
l,r……スイツチ個数、111〜11n,〜,
1m1〜1mn;X11〜X1o……スイツチ、BA…
…バツフアアンプ、Q11,Ql1……m×nのスイツ
チマトリツクス(1次スイツチ)、S1〜So……l
×1のスイツチ列(2次スイツチ)。
FIG. 1 is a diagram showing the configuration of a conventional broadband channel device, FIG. 2 is a configuration diagram of a first embodiment of the present invention, and FIG. 3 is a configuration diagram of a second embodiment of the present invention. M...Number of input terminals, N...Number of output terminals, P 11 ~
P l1 ~P 1r ~ P lr ...Grid type switch, m...Number of grid type switch input terminals, n...Number of grid type switch output terminals, A11 ~A 1n , ~, A l1 ~A ln ...Input terminal,
B 1 ~ B o , B 11 ~ B 1 o , ~, B r1 ~ B ro ... Output terminal,
l, r...Number of switches, 111~11n, ~,
1m1~1mn;X 11 ~X 1o ...Switch, BA...
…Buffer amplifier, Q 11 , Q l1 …m×n switch matrix (primary switch), S 1 ~ S o …l
×1 switch row (secondary switch).

Claims (1)

【特許請求の範囲】 1 m入力n出力(m,nは2以上の整数)のス
イツチマトリツクスの各出力端子側にそれぞれオ
ン・オフ可能なスイツチを出力端子として付加し
て構成した通話路を形成する格子形スイツチを複
数個設け、上記の各格子形スイツチの同一位置の
前記オン・オフ可能なスイツチの出力端子を必要
個数分だけマルチ接続を行うことを特徴とする広
帯域通話路方式。 2 m入力n出力(m,nは2以上の整数)のス
イツチマトリツクスの各出力端子側にそれぞれオ
ン・オフ可能なスイツチを出力端子として付加し
て構成した通話路を形成する格子形スイツチを複
数個設け、上記の各格子形スイツチの同一位置の
前記オン・オフ可能なスイツチの出力端子を必要
個数分だけマルチ接続を行つて構成した通話路装
置を複数個用い、該通話路装置間には各入力端子
対応にバツフアアンプまたは分岐アンプを挿入し
て1個の通話路装置を構成することを特徴とする
広帯域通話路方式。
[Claims] 1. A communication path configured by adding a switch that can be turned on and off as an output terminal to each output terminal side of a switch matrix with m inputs and n outputs (m and n are integers of 2 or more). 1. A wideband communication channel system characterized in that a plurality of lattice-type switches are provided to form a plurality of lattice-type switches, and a necessary number of output terminals of the switches capable of being turned on and off at the same position of each of the lattice-type switches are connected in multiple ways. 2. A lattice-type switch that forms a communication path by adding a switch that can be turned on and off as an output terminal to each output terminal side of a switch matrix with m inputs and n outputs (m and n are integers of 2 or more). A plurality of communication path devices are provided, and the output terminals of the above-mentioned on/off switches located at the same position of each of the above-mentioned lattice type switches are connected in multiple ways as many times as necessary, and a plurality of communication path devices are used, and a plurality of communication path devices are used. is a wideband communication line system characterized by configuring one communication line device by inserting a buffer amplifier or a branch amplifier corresponding to each input terminal.
JP15612083A 1983-08-26 1983-08-26 Wide-band channel system Granted JPS6047589A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15612083A JPS6047589A (en) 1983-08-26 1983-08-26 Wide-band channel system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15612083A JPS6047589A (en) 1983-08-26 1983-08-26 Wide-band channel system

Publications (2)

Publication Number Publication Date
JPS6047589A JPS6047589A (en) 1985-03-14
JPH0425760B2 true JPH0425760B2 (en) 1992-05-01

Family

ID=15620753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15612083A Granted JPS6047589A (en) 1983-08-26 1983-08-26 Wide-band channel system

Country Status (1)

Country Link
JP (1) JPS6047589A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2732843B2 (en) * 1987-12-16 1998-03-30 日本電信電話株式会社 Space division switch
US5345228A (en) * 1991-10-31 1994-09-06 International Business Machines Corporation Very large scale modular switch

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5043808A (en) * 1973-08-21 1975-04-19
JPS52111305A (en) * 1976-03-16 1977-09-19 Nec Corp Switch for line concentration
JPS52153606A (en) * 1976-06-16 1977-12-20 Nec Corp Large scale grid type switch
JPS5493312A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Matrix circuit distribution system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5043808A (en) * 1973-08-21 1975-04-19
JPS52111305A (en) * 1976-03-16 1977-09-19 Nec Corp Switch for line concentration
JPS52153606A (en) * 1976-06-16 1977-12-20 Nec Corp Large scale grid type switch
JPS5493312A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Matrix circuit distribution system

Also Published As

Publication number Publication date
JPS6047589A (en) 1985-03-14

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