JPH04256743A - Ultrasonic diagnostic device - Google Patents

Abstract

PURPOSE:To execute an operation for transferring display data to a recorder 19, and transferring and inputting it from the recorder without suspending a scan, in the ultrasonic diagnostic device. CONSTITUTION:The objective device is provided with a recorder 19 and a display memory 12 which can execute a data transfer. Also, the device is provided with a display memory write control 11 for inhibiting write to a display memory 12 executed by a read-out control selection superposing circuit 10 at the time of data transfer and at the time data of reproducing display. Moreover, the device is provided with a display control circuit for displaying the output of the read-out control selection superposing circuit on a CRT 16 at the time of regular scan and at the time of data transfer, and displaying the output of the display memory 12 on the CRT 16 at the time of data reproducing display.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention superimposes and displays ultrasonic image data obtained by transmitting and receiving ultrasonic waves, graphic data representing characters and graphic figures, etc., and also displays the superimposed display data on other The present invention relates to an ultrasonic diagnostic apparatus that transfers display data to a circuit and reproduces and displays display data transferred from another circuit.

0002

2. Description of the Related Art A conventional ultrasonic diagnostic apparatus will be explained with reference to FIG. In the figure, 1 is a probe that transmits and receives ultrasonic waves, and the echo signal detected by the probe 1 is processed by a transmission/reception processing circuit 2 and a Doppler signal processing circuit 3, and is processed by a B-mode frame memory 6 and M, D. The data is written into the mode frame memory 7 as various ultrasound image data. Reference numeral 4 denotes a biosignal sensor for detecting the state of heartbeat or pulse, and the detected signal is processed by a biosignal processing circuit 5 and written into a biosignal frame memory 8 as biosignal waveform image data. In this way, each frame memory 6, 7 is used for each image data.
, 8 are provided because these image data are images that change every moment and are written in real time, and the signal acquisition timing is different depending on each image data. Reference numeral 9 denotes a graphic memory, into which graphic data such as predetermined characters and figures and graphic data input from the input device 18 are written by the CPU 17 . The image data read from each frame memory 6 , 7 , 8 is superimposed by a read control selection superimposition circuit 20 . Note that the outputs of the B-mode frame memory 6 and the M, D-mode frame memory 7 are subjected to brightness conversion using look-up tables (LUTs) 21 and 22 in accordance with the display characteristics of the display unit and the type of image. The video signal generation circuit 15 generates display data by superimposing the output of the read control selection superimposition circuit 20 and the graphic data from the graphic memory 9, converts it into a video signal, and outputs it to the CRT 16, which is a display section.

By the way, in such a configuration, when outputting a displayed image to another transfer in order to record it on a recording device such as a floppy disk, the following procedure has been performed. That is, each memory 6, 7, 8,
9 stops writing (freezes), and the CPU 17 reads each image data in the frame memories 6, 7, and 8, the graphic data in the graphic memory 9, and the luminance conversion data in the LUTs 21 and 22, and sends them all together to the recording device. 19
was being transferred to. In addition, when the data is transferred from other circuits such as the recording device 19 and reproduced and displayed,
The CPU 17 takes in data from the recording device 19, and each frame memory 6, 7, 8 receives data from each signal processing circuit 2, 3, 5.
After stopping the writing from the side, the CPU 17 divides the transferred data into each image data and luminance conversion data, writes them to the frame memories 6, 7, 8, the graphic memory 9, and the LUTs 21, 22, respectively, and restores the original data. The situation was reproduced and the image was then reproduced and displayed on the CRT 16.

0004

[Problems to be Solved by the Invention] However, in such a conventional ultrasonic diagnostic apparatus, when transferring display data with other circuits such as the recording device 19, each signal processing circuit 2
, 3, 5 side to each memory 6, 7, 8, 9 had to be suspended (frozen) for a while. That is, there is a problem in that scanning must be virtually interrupted while data is being exchanged with other circuits. Furthermore, since the CPU 17 is required to compile various types of data to be transferred and to sort the transferred data, there is a problem in that a large burden is placed on the CPU 17 and processing takes time.

The present invention has been made in view of the above, and its purpose is to realize an ultrasonic diagnostic apparatus that can exchange display data with other circuits without interrupting scanning. It is in.

[0006]

[Means for Solving the Problems] An ultrasound diagnostic apparatus of the present invention that solves the above problems includes a frame memory that stores ultrasound image data obtained by transmitting and receiving ultrasound waves, and a frame memory that stores characters and graphic figures. A graphic memory, a read control selection superimposition circuit that reads and superimposes data to be displayed from the frame memory and the graphic memory, and display data output from the read control selection superimposition circuit that can be written and under the control of the CPU. A display memory that can transfer data with other circuits, a display memory write control circuit that prohibits writing from the read control selection superimposition circuit to the display memory during data transfer, and a read control selection during normal scan and data transfer. The configuration includes a display selection circuit that displays display data from the superimposition circuit on the display section and displays display data in the display memory on the display section during playback display.

Furthermore, the ultrasonic diagnostic apparatus of the present invention preferably includes a graphic superimposition circuit that superimposes data in the graphic memory on display data output from the display memory.

[0008]

[Operation] The ultrasonic diagnostic apparatus of the present invention has the above configuration.
During normal scanning, display data from the read control selection superimposition circuit is displayed on the display section and written into the display memory. When transferring display data to another circuit, the display data from the read control selection superimposition circuit is not written to the display memory, but the display data written in the display memory in advance is transferred to the other circuit. When taking in data transferred from another circuit, the data transferred from the other circuit is written into the display memory as display data. When display data transferred from another circuit is to be reproduced and displayed as a reproduced image, the output from the read control selection superimposition circuit is cut off, and the display data from the display memory is read out and displayed from the display section.

[0009]

Embodiment FIG. 1 shows the configuration of an embodiment of the present invention. In FIG. 1, the same symbols as in FIG. 6 have the same meanings, and the differences from the conventional example shown in FIG. 6 are as follows. That is, in this embodiment, the display memory write control circuit 11, the display memory 1
2, a display selection circuit 14, a graphic superimposition circuit 13, etc. This display memory 12 can be written with the same display data as the image output from the read control selection superimposition circuit 10 and displayed on the CRT 16 during normal scanning, and can be written to other devices such as the recording device 19 under the control of the CPU 17. It is possible to transfer data between the circuits. The display memory write control circuit 11 controls the CPU 17 to determine whether or not to write the display data from the read control selection superimposition circuit 10 into the display memory 12.
, and prohibits writing from the read control selection superimposition circuit 10 to the display memory 12 during data transfer and playback display. Display selection circuit 1
Reference numeral 4 selects under the control of the CPU 17 whether to display the display data from the read control selection superimposition circuit 10 on the display section or the display data from the display memory 12 on the display section. The display data from the read control selection superimposition circuit is displayed on the CRT 16 during data transfer, and the display data in the display memory is displayed on the CRT 16 when the transferred display data is reproduced and displayed. The graphic superimposition circuit 13 is located between the display memory 12 and the display selection circuit 14, and superimposes display data from the display memory 12 and graphic data from the graphic memory 9. Note that the read control selection superimposition circuit 10
In addition to the image data from each frame memory 6, 7, and 8, graphic data from the graphic memory 9 is also superimposed.

FIG. 2 shows the operation during normal scanning in such an embodiment, and FIG. 3 shows the operation when transferring display data to other circuits such as the recording device 19.
4, and the operation when reproducing and displaying the transferred display data will be described below with reference to FIG. 5. Figure 2~
In FIG. 5, solid lines indicate valid data paths and dashed lines indicate invalid data paths. In addition, in FIGS. 2 to 5, FIG.
The same symbols indicate the same meaning, but each signal processing circuit 2, 3
, 5, LUT 21, 22, video signal generation circuit 15, C
Descriptions of RT16 and the like are omitted.

During normal scanning, as shown in FIG.
The display selection circuit 14 selects the display data output from the read control selection superimposition circuit 10 and outputs it to the video signal generation circuit 15, and the display data is displayed from the CRT 16. The display memory write control circuit 11 permits writing of display data from the read control selection superimposition circuit 10 to the display memory 12. Therefore, the display data from the read control selection superimposition circuit 10 is C
It is written into the display memory at the same time as it is displayed in RT16. Graphic memory 9 contains figures accompanying the scan,
Data such as a cursor and characters are written via the CPU 17 by a ROM or an input device 19 (not shown).

When outputting display data to the recording device 19 etc., as shown in FIG.
prohibits writing from the read control selection superimposition circuit 10 to the display memory 12. Then, during normal scanning, display memory 1
The display data stored in the CPU 17 is transferred to other circuits such as the recording device 19 under the control of the CPU 17. Since the CPU 17 only needs to exchange data with the display memory 12 that stores the display data that has already been luminance-converted by the LUTs 21 and 22 and superimposed by the readout control selection superimposition circuit 10, the amount of data processing is reduced and the processing time is shortened. It's short. Meanwhile, during this time, the display selection circuit 14 continues to select the display data from the read control selection superimposition circuit 10, and the display data from the read control selection superimposition circuit 10 is still CR.
It is displayed from T16. That is, the display memory 12
→ CPU 17 → data transfer path of recording device 19 and each signal processing circuit 2, 3, 5 → each memory 6, 7, 8, 9 → read control selection superimposition circuit 10 → video signal generation circuit 15 → C
Since the scanning paths of the RT 16 are independent, there is no interruption of scanning even when display data is transferred to other circuits.

When display data transferred from the recording device 19 or the like is taken in, as shown in FIG.
Transfer display data to. Display memory write control circuit 11
The operation of the display selection circuit 14 is the same as that when transferring display data to the recording device 19 etc. (FIG. 3), and the data transfer route and the scan route from signal processing to display are independent as described above. Therefore, there is no interruption in scanning.

When reproducing display data transferred from the recording device 19 or the like, the display selection circuit 14 selects the display data output from the display memory 12 and sends it to the video signal generation circuit 15, as shown in FIG. The display data is reproduced and displayed on the CRT 16. Here, the graphic superimposition circuit 13 superimposes graphic data such as the date, a cursor for measuring the reproduced and displayed image, and accompanying figures and characters on the display data output from the display memory 12. Note that when reproducing display data, the display memory write control circuit 11 prohibits writing from the read control selection superimposition circuit 10 to the display memory 12. Although scanning is interrupted during this period, since the display data in the display memory 12 is being reproduced and displayed on the CRT 16 of the display section, there is no need to perform scanning.

The present invention is not limited to the above embodiments. In the embodiment, display memory write control circuit 1 is used during playback display.
1 prohibits writing from the read control selection superimposition circuit 10 to the display memory 12. However, if the operation of the read control selection superimposition circuit 10 itself is stopped during playback display and the output of display data is stopped, the display memory write control circuit 11 will write data from the read control selection superposition circuit 10 to the display memory 12 during playback display. There is no need to go out of your way to prohibit it.

[0016]

Effects of the Invention As described above, the ultrasound diagnostic apparatus of the present invention includes a frame memory for storing ultrasound image data obtained by transmitting and receiving ultrasound waves, a graphic memory, and images to be displayed from these memories. A read control selection superimposition circuit that reads and superimposes data; a display memory into which display data from the read control selection superimposition circuit can be written and data transferable to other circuits; and a read control selection superimposition circuit that reads and superimposes data. A display memory write control circuit that prohibits writing from the circuit to the display memory, and a read control selection superimposition circuit that displays display data on the display section during normal scanning and data transfer, and displays data in the display memory during playback display. and a display selection circuit for displaying on the display section. Therefore,
Scanning can be continued even while display data is being transferred to/from other circuits, so the diagnosis is not interrupted and the operator or patient is not kept waiting.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing the flow of data during normal scanning in the above embodiment.

FIG. 3 is a diagram showing the flow of data when writing to the recording device in the above embodiment.

FIG. 4 is a diagram showing the flow of data when reading from the recording device in the above embodiment.

FIG. 5 is a diagram showing the flow of data during playback and display in the above embodiment.

FIG. 6 is a configuration diagram showing a conventional example.

[Explanation of symbols]

11 Display memory write control circuit 12 Display memory 13 Graphic superimposition circuit 14 Display selection circuit 19 Recording device

Claims (2)

[Claims] Claim 1: A frame memory that stores ultrasound image data obtained by transmitting and receiving ultrasound; a graphics memory that stores characters and graphic figures; and a frame memory that reads and superimposes data to be displayed from the frame memory and the graphics memory. It is possible to write the display data output from the read control selection superimposition circuit and the read control selection superimposition circuit, and the CP
A display memory that can transfer data with other circuits under the control of U, a display memory write control circuit that prohibits data transfer, especially writing from the read control selection superimposition circuit to the display memory, and An ultrasonic diagnostic apparatus comprising: a display selection circuit that displays display data from a read control selection superimposition circuit on a display section during data transfer, and displays display data in a display memory on a display section during playback display. 2. The ultrasonic diagnostic apparatus according to claim 1, further comprising a graphic superimposition circuit that superimposes data in the graphic memory on display data output from the display memory.