JPH04255101A - Automatic gain control circuit - Google Patents

Abstract

PURPOSE:To improve the reliability and to simplify the control circuit by setting the gain so that an averaged output of a 2nd amplifier circuit is a prescribed level and fixing the gain to the unity gain or below when an input level to a 1st circuit exceeds a prescribed level. CONSTITUTION:An output of a variable gain amplifier circuit 7 is averaged by an averaging circuit 3, and the output of the circuit 3 is given to an arithmetic circuit 4 and a gain setting circuit 5 to control the gain of the circuit 7 thereby making the output of the circuit 7 constant. In this case, when the gain of the circuit 7 reaches a prescribed value, it is decided that an input signal AIN reaches a prescribed level and the output suppresses the gain of a fixed gain amplifier circuit 9 from the unity to 1/2. Thus, the signal AIN is suppressed to reduce the range of an input level to an A/D converter circuit 8 thereby reducing the fluctuation width of the gain of the circuit 7 simultaneously. Thus, the gain setting of the circuit 7 is made fine and precise without decreasing conversion precision of the circuit 8, the reliability of the control circuit is improved and the circuit is simplified.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic gain control circuit (AGC circuit) that stabilizes the level of an output signal by changing the gain according to the level of an input signal.

0002

2. Description of the Related Art In an AGC circuit that outputs a digital value for an input signal of an analog value, the analog value is converted into a digital value in the signal processing process within the AGC circuit. D conversion order, i.e. A/D
The characteristics of the circuit differ depending on whether conversion or gain adjustment is performed first.

FIG. 3 shows an AGC circuit configured to perform A/D conversion after gain adjustment. The analog value input signal AIN is first input to the voltage-controlled variable gain amplifier circuit 1, where the level is adjusted, and then converted to a digital value by the A/D conversion circuit 2, and this digital value is output. It is output as a signal to the next stage circuit. Also, the output signal is
The signal is input to an averaging circuit 3 that averages the level over an appropriate period, and the average value is input to an arithmetic circuit 4. This arithmetic circuit 4 calculates the level of the output signal based on the average value of the output signal and the gain set in the variable gain amplifier circuit 1. A gain setting circuit 5 receiving the output of the arithmetic circuit 4 outputs a control voltage for setting the gain of the variable gain amplifier circuit 1, and is configured to change the gain according to the level of the input signal. That is, the arithmetic circuit 4 and the gain setting circuit 5 constitute a negative feedback circuit, and the gain setting circuit 5 controls the variable gain amplifier circuit 1 so that the arithmetic output of the arithmetic circuit 4 matches the reference potential VR corresponding to the target level. Setting the gain stabilizes the level of the output signal.

[0004] In such an AGC circuit, since the variable gain amplifier circuit 1 is composed of an analog circuit, it is difficult to set the gain with high accuracy and finely, and highly reliable circuit operation is not expected. Can not. Furthermore, while the variable gain amplifier circuit 1 is composed of an analog circuit with a relatively large circuit scale, the averaging circuit 3, arithmetic circuit 4, and gain setting circuit 5 are composed of digital circuits. This results in a circuit that is a mixture of the two, making it unsuitable for fabrication into a monolithic IC.

[0005] Therefore, it is conceivable to perform A/D conversion before gain adjustment as shown in FIG. The input signal AIN is first input to the A/D conversion circuit 6 and converted into a digital value, and this digital value is input to the variable gain amplifier circuit 7. The variable gain amplifier circuit 7 is constructed of a digital circuit, and provides a gain corresponding to the output of the gain setting circuit 5 to the input signal converted into a digital value by the A/D conversion circuit 6, thereby stabilizing the level. The digital value of is output to the next stage circuit as an output signal. If the variable gain amplifier circuit 7 is configured as a digital circuit in this way, the analog circuit section can be significantly reduced and most of the circuits will be digital circuits, so that it can be easily implemented as a monolithic IC. Further, according to the variable gain amplifier circuit 7 configured with a digital circuit, it is possible to finely set the gain, so highly accurate circuit operation can be expected.

[0006]

[Problems to be Solved by the Invention] However, if the input signal AIN is configured to be input to the variable gain amplifier circuit 7 after being converted into a digital value, it becomes necessary to widen the input range of the A/D conversion circuit 6. , the accuracy of conversion in the A/D conversion circuit 6 becomes a problem. That is, when the output of the variable gain amplifier circuit 1 is input to the A/D conversion circuit 2 as shown in FIG. 3, the level of the analog value is limited to a predictable range. While the input range can be narrowed down to a narrow range, when inputting the input signal AIN directly to the A/D conversion circuit 6, the input signal AI
The input range must be set to accommodate the range in which the N level changes, and the input range cannot be narrowed down. Therefore, when the number of bits is the same, the resolution of the A/D conversion circuit 6 is coarser than that of the A/D conversion circuit 2, and even if the gain of the variable gain amplifier circuit 7 is finely set,
High accuracy cannot be expected. Therefore, if the number of bits of the A/D conversion circuit 6 is increased to make the resolution finer, it is possible to increase the accuracy, but as the number of bits is expanded, the conversion speed becomes slower and the number of bits is increased. Since there is a certain limit to the refinement of resolution, it cannot be said to be an effective means.

SUMMARY OF THE INVENTION An object of the present invention is to provide a highly reliable automatic gain control circuit that simplifies the circuit configuration by reducing the number of analog circuits and prevents deterioration in accuracy.

[0008]

[Means for Solving the Problems] The present invention has been made to solve the above-mentioned problems, and is characterized by a fixed gain type that provides a specific gain for input analog values. A first amplifier circuit, an A/D conversion circuit that converts the output of the first amplifier circuit into a digital value, and a variable gain type second amplifier circuit that provides an arbitrary gain to the converted digital value. and a level determination circuit that determines the level of the output of the second amplifier circuit, and a gain setting circuit that sets the gain of the second amplifier circuit based on the determination of the determination circuit. The gain of the second amplifier circuit is set so that the average output of the amplifier circuit becomes a constant level, and when the analog value input to the first amplifier circuit exceeds a predetermined level, The first amplifier circuit provides a specific gain.

[0009]

[Operation] According to the present invention, when the level of the input signal becomes high, the first amplifier circuit is configured to give a specific gain to the input signal to suppress the level, so that the level of the input signal is suppressed. The analog value obtained is input to the A/D conversion circuit. Therefore, the input range of the A/D conversion circuit can be set to a range narrower than the range in which the level of the input signal changes, allowing high-precision A/D conversion without increasing the circuit scale of the A/D conversion circuit. becomes possible.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be explained based on the drawings. The automatic gain control circuit of the present invention is shown in FIG. In this figure, the averaging circuit 3, the arithmetic circuit 4, and the gain setting circuit 5 are as follows:
This is the same as FIG. 3, and the same parts are given the same reference numerals. The feature of the present invention is that the input signal AIN is
At a stage before being input to the D conversion circuit 8, the input signal AIN
The fixed gain amplifier circuit 9 provides a specific gain G2. That is, the fixed gain amplifier circuit 9 has a gain G2 of 1.
The settings are as follows, and the input signal AIN is configured to be suppressed by applying a gain to the input signal AIN only when the level of the input signal AIN exceeds a predetermined level. The timing at which the fixed gain amplifier circuit 9 starts giving gain to the input signal AIN is determined based on the output of the gain setting circuit 5.
When the gain G1 of the variable gain amplifier circuit 7 reaches a certain value, it is determined that the input signal AIN has reached a predetermined level, and the level is suppressed. Although it is possible to control the operation of the fixed gain amplifier circuit 9 by directly detecting the level of the input signal AIN, this is not preferable because it increases the number of analog circuits. Therefore, the gain G of the variable gain amplifier circuit 1 changes as the level of the input signal AIN increases.
When the fixed gain amplifier circuit 9 operates based on 2, the input signal AIN is suppressed and the input level of the A/D conversion circuit 8 is lowered.

Here, when the gain G2 of the fixed gain amplifier circuit 9 is set to 1/2, FIG. 2 shows changes in the input level of the A/D conversion circuit 8 with respect to the input signal AIN. Level V0 at which the fixed gain amplifier circuit 9 begins to give gain to the input signal AIN
The fixed gain amplifier circuit 9 does not operate until the level of the input signal AIN reaches the level of the input signal AIN, the gain G2 of the fixed gain amplifier circuit 9 becomes 1 apparently, and the input level of the A/D conversion circuit 9 reaches the level of the input signal AIN. , along the line G2=1. After the level of the input signal AIN reaches V0, the gain G2 of the fixed gain amplifier circuit 9 becomes 1/2, so the A/D
The input of the conversion circuit 8 is G2=1 for the input signal AIN.
/2 line. Therefore, the A/D conversion circuit 8
The range in which the level of the analog value input to the input signal AIN fluctuates is narrower than that of the original input signal AIN. For example, if the level V0 at which the fixed gain amplifier circuit 9 starts operating is set near the upper limit of the input range of the A/D conversion circuit 8, as is clear from FIG. It becomes possible to set the input range to twice the input range of the conversion circuit 8.

Furthermore, since the range of the input level to the A/D conversion circuit 8 is reduced by the fixed gain amplifier circuit 9, the fluctuation range of the gain G1 of the variable gain amplifier circuit 7 is also reduced at the same time, and the circuit scale is reduced. I hope it will shrink. At this time, the fixed gain amplifier circuit 9 that does not require gain fluctuation can be realized with a simple analog circuit, so even when mixed with other digital circuits, the variable gain amplifier circuit 1 of FIG. As such, there is no obstacle to monolithic IC implementation. Therefore, by setting the gain variation width of the fixed gain amplifier circuit 9 and the gain of the variable gain amplifier circuit 7 according to the needs of the circuit, the design conditions of the analog circuit section can be greatly relaxed, and the monolithic This is extremely advantageous for IC implementation.

According to the above configuration, even though the variable gain amplifier circuit 7 is configured with a digital circuit,
It is not necessary to make the input range of the A/D conversion circuit 8 compatible with the range in which the level of the input signal AIN changes;
It becomes possible to finely set the resolution of the A/D conversion circuit 8. In this embodiment, the gain G2 of the fixed gain amplifier circuit 9 was set to 1/2 (-6 dB) for convenience.
In this case, assuming that the resolution is the same, the number of bits in the A/D conversion circuit 8 is only 1 bit different from the number of bits in the A/D conversion circuit 6, so in reality it is even smaller. It is preferable to set it to a value. For example, set the gain G2 to -3
If it is 0 dB (1/31), A with the same resolution
The /D conversion circuit 8 can be realized with 5 bits less than the A/D conversion circuit 6.

[0014]

According to the present invention, since the input range of the A/D converter circuit is reduced, the conversion accuracy of the A/D converter circuit does not deteriorate, and furthermore, the variable gain amplifier circuit can be configured digitally. Therefore, the gain of the variable gain amplifier circuit can be set finely and accurately, and the reliability of the circuit can be improved. Furthermore, by simplifying the analog circuit section, the degree of freedom in design is expanded, making it suitable for monolithic IC implementation.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an automatic gain control circuit of the present invention.

FIG. 2 is a characteristic diagram of the input part of the automatic gain control circuit of the present invention.

FIG. 3 is a circuit diagram of a conventional automatic gain control circuit.

FIG. 4 is a circuit diagram of a conventional automatic gain control circuit in which a variable gain amplifier circuit is configured with a digital circuit.

[Explanation of symbols]

1 Variable gain amplifier circuit 2 A/D conversion circuit 3 Averaging circuit 4 Arithmetic circuit 5 Gain setting circuit 6 A/D conversion circuit 7 Variable gain amplifier circuit 8 A/D conversion circuit 9 Fixed gain amplifier circuit

Claims (3)

[Claims] 1. A fixed gain type first amplifier circuit that provides a specific gain for an input analog value;
an A/D conversion circuit that converts the output of the amplifier circuit into a digital value, a variable gain type second amplifier circuit that gives an arbitrary gain to the converted digital value, and an output of the second amplifier circuit. and a gain setting circuit that sets the gain of the second amplifier circuit based on the determination of the determination circuit, wherein the average output of the second amplifier circuit is at a constant level. The gain of the second amplifier circuit is set so that the first amplifier circuit has a specific gain when the analog value input to the first amplifier circuit exceeds a predetermined level. An automatic gain control circuit characterized by giving. 2. The automatic gain control circuit according to claim 1, wherein the first amplifier circuit provides a gain of 1 or less to the analog value. 3. The level of the analog value input to the first amplifier circuit is detected from the gain value set by the gain setting circuit to the second amplifier circuit, and the level of the analog value input to the first amplifier circuit is detected according to this level. 2. The automatic gain control circuit according to claim 1, wherein the operation of the amplifier circuit is determined.