JPH04253227A - Virtual computer system - Google Patents

Abstract

PURPOSE:To easily operate a virtual computer by a service processor without using any special input 1' output device for control program control at the virtual computer system to operate the virtual computer on a processor under the control of a control program. CONSTITUTION:With the operation of a console 103 at a service processor 102, a virtual computer mode is set to a local storage 106 of an instruction processor 105. In the virtual computer mode, the control program instructs an operation request to the service processor 102 according to a specified instruction, and the service processor 102 executes a processing according to the instruction between a main memory 109 and the console 103 or a filing device 104 and announces the completion of the operation to the control program by interruption. Then, complete state information is stored in the main memory 109.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a virtual computer system, and more particularly to a virtual computer system that uses a service processor to operate a virtual computer.

0002

2. Description of the Related Art A virtual computer is realized by a virtual computer control program (hereinafter simply referred to as a control program) allocating and simulating processor resources. Conventionally, when operating such a virtual machine, the virtual machine is controlled by communicating with a control program using an input/output device connected to an input/output channel of a processing device.

[0003] Known documents related to this type of technology include, for example, Japanese Unexamined Patent Application Publication No. 142424/1983 entitled ``Screen division method for virtual computer console device''.

0004

[Problems to be Solved by the Invention] In the above conventional technology, it is necessary to prepare an input/output device for the control program and define the input/output device for the control program. The problem is that it cannot be operated.

[0005] An object of the present invention is to eliminate the need to prepare special input/output devices for a control program, and to enable a user to easily operate a virtual computer.

Another object of the present invention is to enable a user to use a virtual computer without being aware of the program, such as when starting up a system.

[0007]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides communication between a control program that controls a virtual machine running on a processing device and a service processor that performs maintenance operations on the processing device. The main feature is that a means is provided.

[0008]

[Operation] The service processor is equipped with nonvolatile storage devices such as a console device and a disk device, and these devices are used in place of conventional input/output devices.

[0009] Only in the virtual machine mode, the control program instructs the service processor to request an operation using a specific command (hereinafter referred to as a virtual machine command). The virtual machine instruction is for causing the service processor to start an operation equivalent to an input/output channel. Furthermore, the reason why this virtual machine instruction is valid only in the virtual machine mode is to prevent a program from using the service processor for purposes other than using the virtual machine.

[0010] The service processor that has been instructed to perform an operation request reads and writes information between the main memory of the processing unit and the console device or non-volatile storage device of the service processor (in other words, controls the The service processor controls information prepared in the main memory by the program by accessing the main memory),
Completion of the operation is notified to the control program by a completion interrupt. Additionally, upon completion of this operation, the service processor stores completion status information in main memory. The control program learns of the completion of the operation of the virtual machine instruction through a completion interrupt, and its status can be known by reading the completion state information on the main memory.

[0011] Furthermore, the service processor transmits a user's command to the control program from the console device to the control program using an asynchronous interrupt, and at the same time stores the contents of the request in the main memory. The control program learns the request content by accessing the main memory, issues an instruction for the virtual machine, and the service processor executes the instruction, thereby displaying a message from the control program on the screen of the console device of the service processor. can do.

Furthermore, when a reset operation is executed on the processing device, the service processor loads the control program previously stored in the non-volatile storage device onto the main memory, and then transfers a part of the control program to the program state of the processing device. word (PSW
) and start the control program. Thereby, when starting up the system, the control program can be loaded and started without operator intervention, and the virtual machine can be used.

[0013]

Embodiment FIG. 1 is a schematic block diagram of an embodiment of a virtual computer system to which the present invention is applied. In the figure, 101 is an information processing unit (CPU), and 102 is a service processor (
103 is a console display device (CD) of the SVP 102, and 104 is a non-volatile storage device (HD) of the SVP 102. 105-110
are components in the CPU 101, 105 is an instruction processor (IP), 106 is a local storage (LS) in the IP 106, 107 is a service processor communication unit (SVU), and 108 is a main storage controller (SC)
, 109 is a main memory (MS), 110 is an input/output processing unit (
IOP).

[0014] In this embodiment, the IP10 is installed in the CPU 101.
5 and one SVP 102 and one CD 103 are present, but of course the present invention is not limited to this. Further, an input/output device (I/O) is connected to the IOP 110, but is omitted here.

LS 106 is an internal memory used by hardware and microprograms that cannot be accessed from programs. SVU107 and SVP102 and IP
105, and the SVP 102 connects the SVU 10.
7, it is possible to generate a completion interrupt and an asynchronous interrupt as a service signal external interrupt to the IP105, and also write data to the LS106,
Data can be read from 6. moreover,
The SVP 102 can access the MS 109 via the SVU 107 and SC 108.

[0016] SVP102 is CD103 and HD10
4, and is capable of writing screen data to and reading screen data from the CD 103, as well as writing and reading data to and from the HD 104. The HD 104 is, for example, a disk device, and its interior is partitioned to realize a plurality of nonvolatile files.

FIG. 2 shows an example of the format of a virtual machine instruction (hereinafter referred to as HVACTL) and its operand (hereinafter referred to as HCW) newly added according to the present invention. 201 is the HVACTL instruction format, the instruction code is (8350) 16, and the base register field B2
and displacement D2 indicate the leading absolute address of the HCW 202 which is the operand. Here, the operand address is an absolute address because the SVP 102
This is to access the CW 202, and is because the SVP 102 can only access the MS 109 using an absolute address. 202 is the HCW format, 203 is the sub-operation code (SOP), and 204 is the device identifier (
HDID), 205 is the command (CMD), 206 is the transfer data amount (CNT), 207 is the transfer data MS10
Shows the absolute address on 9.

[0018] HVACTL 201 is a command for requesting an operation from SVP 102, and the details of the operation are explained in HCW 20.
Indicated by 2. In the HCW 202, the SOP 203 indicates the target of the requested operation.
1) 16 is a request for CD 103, (0002) 16
It is assumed that this is an operation request to the HD 104. The HDID 204 is a serial number starting from 0, and is used as an identifier when a plurality of CDs 103 or HDs 104 exist. In this embodiment, the HD 104 is divided into sections, so that although there is physically one HDD 104, it is logically made to appear as multiple HDs. CMD205 indicates the type of operation; here, (02)16 is the command from SVP102 to MS
109, and (01) 16 means data transfer from the MS 109 to the SVP 102. C
The NT 206 specifies the amount of data to be transferred in bytes. DADR 207 indicates the starting address of MS 109 from which data should be read when CMD 205 is (02) 16, and indicates the starting address of MS 109 where data to be transferred to SVP 102 is stored when CMD 205 is (01) 16. .

FIG. 3 shows the type and use of LS 106. Here, each LS106 has two 4-byte
It is assumed that the system is made up of 56 entries, each entry is given a unique consecutive number starting from 0, and each entry is addressed in units of 4 bytes. In this embodiment, entries 0 to 3 of this LS 106 are used for the present invention.

301 is the 0th entry of the LS 106, and when bit 0 (hereinafter referred to as H bit 301) is 1, it means the virtual machine mode. H bit 301 is set by SVP 102. That is, S.V.
When the virtual machine mode is specified by the operator through the CD 103, the P102 is sent to the L through the SVU 107.
Access S106 and set H bit 301 to 1.

[0021] 302 is an entry that stores the leading absolute address of HCW 202 specified by HVACTL 201. It is set by the microprogram during instruction processing of HVACTL 201, and the SVP 102
When request 01 is accepted, the contents are read by SVP 102. That is, the SVP 102 has HCW address 3.
02 allows the address of the HCW 202 on the MS 109 to be known.

303 is a virtual machine instruction completion status word (H
SW) is set by the SVP 102 after the request operation by the HVACTL 201 is completed. The reason why the SVP 102 temporarily stores the HSW 303 in the LS 106 instead of directly storing it in the MS 109 is to take into account the case where there are multiple IPs 105, and the SVP 102
Even if a service signal external interrupt is generated in a different IP than the IP105 that issued ACTL201, the IP10
5 reads HSW303 and writes to the prefix area of MS109 using the real address, all I
This is to enable the HSW 303 to be stored at a common real address in P.

[0023] 304 in HSW303 is HCW2
This is the same as specified in SOP203 of 02. However, at the time of a service signal external interrupt from the asynchronous SVP 102 that is unrelated to the requested operation of the HVACTL 201, (
FFFF)16 is stored. 305 is the same as that specified by HDID 204 of HCW 202. 306
indicates the operation completion status bust (HSTA), where (0400) 16 indicates normal completion, (8000) 1
6 means an attention interruption from the CD 103, and anything else means an abnormal end. 307 is HCW2
Indicates the remaining number of bytes (RCNT) when the number of bytes of data actually transferred is smaller than the number of transfer bytes specified by CNT 206 of 02.

FIG. 4 shows virtual machine instructions (HVACTL)
This figure collectively shows the processing flow of the completion interrupt and asynchronous interrupt of the SVP 102.

401a is a virtual machine instruction, that is, HV
This is the starting point of the microprogram in IP 105 when ACTL 201 is issued. 405a is SVP10
405b is the starting point of the processing request by the HVACTL 201 of No. 2, and 405b is the starting point of the processing by the asynchronous attention from the CD 103. 412a is the starting point of the microprogram in the IP105 due to a service signal external interrupt from the SVP102. In this example, the HVAC
Completion interrupt of SVP102 in response to TL operation request and C
Both asynchronous interrupts from D103 are served by service signal external interrupts, and the distinction is made by the SO of HSW303.
This is done by P304.

When the HVACTL 201 is issued, the IP 105 determines the H bit 301 of the LS 106 (step 401), and when the H bit 301 is 0, that is, when the mode is not virtual machine mode, the IP 105 treats the HVACTL 201 as an instruction exception. This is for HVA in other than virtual machine mode.
The purpose is to guard the use of CTL201. If the H bit 301 is 1, that is, in virtual machine mode, the IP
105 are fields B2 and D of the HVACTL 201.
2, the HCW address 302 is generated and set in the LS 106 (step 402), and then a processing request signal is sent to the SVP 102 via the SVU 107 (step 40).
4). This completes the processing of the HVACTL 201 in the IP 105.

When the SVP 102 receives a processing request from the IP 105, the SVP 102 sends the request to the HC from the LS 106 via the SVU 107.
Read the W address 302 and read the HCW address 302.
It is determined whether or not is 0 (step 405). And H
If the CW address 302 is 0, other conventional SVP processing is executed. In other words, the HCW address 302 of the LS 106 is guaranteed to be 0 except for the HVACTL 201. HCW address 302 is 0
If not, SVP102, SVU107, SC10
8, the MS 10 indicated by the HCW address 302
9 (step 406);
The processing indicated by the HCW 202 is carried out by the MS 109 and the CD 10.
3 or HD 104 (step 407
). Then, the HCW address 302 of the LS 106 is cleared to 0 (step 408). This step 408 is
This is to prevent the determination in step 405 from malfunctioning when the next SVP processing request is not made by the HVACTL 201. SVP102 is HCW2
When the process indicated by 02 is executed, the execution result status is set to LS.
106 HSW 303 (step 409),
HV as a service signal external interrupt to IP105
Generate a completion interrupt for ACTL 201 (step 41
1). Now, SVP102 by HVACTL201
operation is completed.

On the other hand, when the SVP 102 receives an attention request from the CD 103, the SVP 102 writes (FFFF
) 16 (step 410) and generates a service signal external interrupt to the IP 105 (step 41).
1). At this time, (8000) 16 is set in HSTA 306 of HSW 303. This is because, in this embodiment, the only asynchronous interrupt is an attention request from the CD 103, but if other interrupts become necessary in the future,
The purpose is to set the HSTA 306 to a value other than (8000)16 to distinguish between them.

[0029] IP105 is
Upon receiving a service signal external interrupt via 07, LS
106 H bit 301 is determined (step 41
2) When the H bit 301 is 0, normal service signal external interrupt processing is executed (step 416). LS1
If the H bit 301 of 06 is 1, the contents of the HSW 303 are checked (step 413), and if it is 0, the process branches to normal service signal external interrupt processing. this is,
It is intended to process service signal external interrupts other than completion interrupts and attention request asynchronous interrupts by the HVACTL 201 without malfunction.

[0030] If the H bit 301 of LS106 is 1, HS
If the content of W303 is not 0, IP105 is LS10
6, the HSW 303 is read out and stored in a fixed address (prefix area) on the MS 109 (step 414).
. Then, clear HSW303 of LS106 to 0 (
step 415). This is to prevent the determination in step 413 from malfunctioning when a subsequent service signal external interrupt occurs.

Next, the processing method of the control program (hereinafter referred to as hypervisor) in this embodiment will be explained with reference to FIG.

In FIG. 5, a hypervisor monitor 501 manages hardware and controls other parts. A frame 502 manages instructions from the CD 103 to the hypervisor by the operator and message display from the hypervisor to the CD 103. 503 is a virtual machine on which a guest operating system runs. These monitor 501, frame 502, and virtual machine 503 are placed on the MS 109.

501a is HVACT from monitor 501
501b shows the dispatch of the frame 502 by the LPSW command of the monitor 501, and 501c shows the dispatch of the virtual machine 503 by the SIE command of the monitor 501. 50
2a is a monitor 501 based on the SVC command of the frame 502;
503a indicates an interception of an SIE instruction for simulation by the monitor 501. 503b indicates a timer interrupt for time slice processing, and 504a indicates a service signal external interrupt. Here, 501a and 504
a is added in place of the conventional input/output device processing according to the present invention.

Now, when the operator inputs a command to the hypervisor using the CD 103, 50
4a (asynchronous interrupt) is reported to the monitor 501. In response, the monitor 501 issues HVACTL 201, requests the SVP 102 to read input information from the CD 103 through 501a, and requests completion of the operation through 504a.
When it is known by (completion interrupt), 501b dispatches the frame 502 and causes the frame 502 to perform processing according to the input command. If the frame 502 requires a message to be output to the CD 103 based on the result, the frame 502 notifies the monitor 501 of this through 502a. The monitor 501 issues the HVACTL 201 and requests the SVP 102 to output a message to the CD 103 using the 501a, and when the completion of the operation is reported via the 504a, the monitor 501 issues a 50
1b, the frame 502 is dispatched again and message output completion is reported to the frame 502.

In the case of data preservation when a failure occurs, the preservation data is written to the HD 104 in the same manner as described above.

[0036] Furthermore, 501c, 503a, and 503b are S
Since this is the same as the conventional virtual machine processing method using IE instructions, the explanation will be omitted.

FIG. 6 shows the files on the HD 104 and the MS 10
9 shows the correspondence when loading onto 9. 601～
604 indicates a nonvolatile file in which the HD 104 is partitioned. 601 is a file (HYLOAD) in which the initial loader of the hypervisor is stored, and 602 is a file (HYCO) in which the normal processing section of the hypervisor is stored.
A), 603 is a file for storing hypervisor control information (HYCTL), and 604 is a file for collecting a dump for hypervisor failure analysis (HYDUMP). It is in load module format.

605 to 608 show the configuration of the MS 109 after loading the hypervisor. 605 is a PSW (startup PSW) for first passing control to the hypervisor;
HYLOAD601 is loaded up to 8 bytes from absolute address 0 of MS109. 606 is an area for a virtual machine such as a guest operating system (
SUA). That is, the starting PSW 605 is the SUA 6
It is placed at the beginning of 06. 607 is an area (EHSA) consisting of an area where HYCOA 602 is loaded and a work area used by the hypervisor. This EHSA607 S
Guarding access from programs on UA606 is as follows:
The hypervisor uses the function of the SIE command to perform this in software. Therefore, the EHSA 607 appears to be an unusable area from the perspective of the guest operating system. 608 is an area used by the hardware (HS
A), the hypervisor cannot use HSA608 either.

In the present invention, the initial loader of HYLOAD 601 in HD 104 is automatically loaded into MS 109 by SVP 102 without requiring any operation by an operator, and EHSA 607 is automatically loaded into MS 109 by the initial loader.
It is automatically loaded from HYCOA603 using TL201. Therefore, from the operator's perspective, the existence of the hypervisor is invisible, and it simply appears that the area that cannot be used by the program has increased by the amount of EHSA 607.

FIG. 7 shows a processing flow for starting the hypervisor when a reset operation is performed on the CPU 101. 701 to 703 are conventional reset operations, and 704 to 712 are processes added according to the present invention.

[0041] The SVP 102 includes the SVU 107 and the IP 10.
5. Perform reset operations such as loading the microprogram to the IOP 110 and sending a hardware reset signal (step 701), clear the contents of the MS 109 to 0 (step 702), and initialize the HSA 608 (step 703). . Thereafter, the virtual machine mode is determined (step 704), and the additional processing of the present invention starting from step 705 is performed only in the virtual machine mode. Here, the virtual machine mode is specified by the operator.

In the case of virtual machine mode, the SVP 101 first sets the H bit 301 of the LS 106 via the SVU 107 (step 705). By setting this H bit 301, the microprogram can also determine the virtual machine mode from now on. Next, the SVP 101 sends HYLOAD 601 of the HD 104 to the MS 109 via the SVU 107 and SC 108.
The data is loaded from absolute address 0 (step 706). Then, the activated PSW 605 in the loaded HYLOAD 601 is set to the PSW of the IP 105 (step 707), and the command execution process of the IP 105 is started using the set PSW (step 708). This starts the initial loader of the hypervisor.

[0043] The initial loader of the hypervisor first loads the HV
The ACTL 201 instructs the SVP 102 to request an operation, and loads the HYCOA 602 of the HD 104 into the EHSA 607 in the MS 109 (step 709). Next, the address constants of the EHSA 607 are relocated according to the address constant relocation parameters included in the HYCOA 602 (step 710). This is similar to a program on a normal operating system.
This is to enable programming of the 602. Next, control is passed to the normal processing section of the hypervisor in the HYCOA 602 loaded in step 709 (step 711), and the SUA 606 is cleared to 0 to erase the initial loader in the SUA 606 that is no longer needed (step 712). . After this, the hypervisor performs normal processing as described with reference to FIG.

[0044]

[Effects of the Invention] As explained above, according to the present invention,
By providing a logical communication means between the control program (hypervisor) and the service processor, it is possible to operate the virtual machine using the console device and non-volatile storage device provided in the service processor. A virtual computer system can be realized in which there is no need to prepare special input/output devices for controlling the computer and to define them for the control program.

Furthermore, since the control program is automatically started by the service processor, it is possible to realize an easy-to-operate virtual computer system in which the operator does not need to be aware of the hypervisor.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of an embodiment of a virtual computer system to which the present invention is applied.

FIG. 2 is a diagram showing the format of virtual machine instructions used in the present invention.

FIG. 3 is a diagram showing the format and usage of local storage.

FIG. 4 is a diagram showing a virtual machine instruction and a processing flow of a service processor.

FIG. 5 is a diagram showing a processing method of a control program (hypervisor) in the present invention.

FIG. 6 is a diagram showing the correspondence between files and main memory of a nonvolatile storage device.

FIG. 7 is a diagram showing a processing flow when resetting the processing device.

[Explanation of symbols]

1 Central processing unit 102 Service processor 103 Service processor console device 104
Service processor non-volatile storage 105
Instruction processing processor 106 Local storage 107 Service processor communication unit 108
Main storage control device 109 Main storage 110 Input/output processing device 201 Virtual computer instructions 501 Monitor 502 Frame 503 Virtual computer

Claims (5)

[Claims] 1. A virtual computer system in which a virtual machine operates on a processing device under the control of a control program, comprising a service processor for performing maintenance operations on the processing device, wherein the control program and the service processor A virtual computer system characterized by having a means of communication between them. 2. A control program instructs the service processor to request an operation using a specific instruction under virtual machine mode conditions, and upon receiving the instruction, the service processor executes processing based on the specific instruction and completes the operation. 2. The virtual computer system according to claim 1, wherein the control program is notified by an interrupt. 3. The service processor includes a console device and a nonvolatile storage device, and reads and writes information between the main memory of the processing device and the console device or the nonvolatile storage device according to specific instructions from the control program. 3. The virtual computer system according to claim 2, wherein: 4. The service processor provides instructions to the control program from the console device, and displays messages from the control program on the screen of the console device.
The virtual computer system described. 5. When a reset operation is performed on the processing device, the service processor loads a control program previously stored in the nonvolatile storage device onto main memory, and then transfers a part of the control program to the processing device. 4. The virtual computer system according to claim 3, wherein the control program is started by setting the control program to a program state word (PSW).