JPH04245681A - Vacuum electron wave interference transistor - Google Patents

Abstract

PURPOSE:To make it possible to hold an advantage that room temperature operation is possible and modulation efficiency is high and increase current flowing between an emitter and a collector at the same time. CONSTITUTION:A plurality of parallel plate capacitors C1 to C7 are arranged in parallel with each other between an emitter 1 and a collector 2 which face each other. The potential of electrodes 3 and 4 for the parallel plate capacitors C1 to C7 are optimized so that the converging capacity of electrons to the collector 2 may be excellent. The electron waves emitted from the emitter 1 are divided into tow electron waves by the parallel plate capacitor C1 which is used as a blocker while the differential phases between the electron waves are controlled by the parallel plate capacitors C1 to C7 which are used as a gate electrode, thereby performing transistor operation.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a vacuum electron wave interference transistor.

0002

[Background Art] With the recent progress in ultrafine structure fabrication technology, research on electronic wave interference devices that utilize the coherence of electron waves has been actively conducted.
onov)-Bohm effect (hereinafter referred to as "AB effect transistor") using an AlGaAs/GaAs double heterojunction has been proposed (for example, Techni
cal Digest of IEDM 86, pp.
．． 76-79). However, this conventional AB effect transistor requires cooling to an extremely low temperature below the liquid helium temperature (4.2 K) in order to maintain electron coherence, making it difficult to use easily. It is also disadvantageous in terms of cost.

In order to solve this problem, the present applicant proposed in Japanese Patent Application No. 2-173003 a vacuum AB effect transistor configured to allow electrons to travel in vacuum. In this vacuum AB effect transistor, an electron wave emitted from the emitter (cathode) into a vacuum is separated by a blocker that is negatively biased with respect to the emitter. It can be divided into passing electron waves. These electron waves then meet at the collector. By controlling the phase difference between these electron waves using a gate electrode provided outside the path of electrons from the emitter to the collector, interference between these electron waves at the collector is controlled and transistor operation is controlled. Have them do it. This special application Hei 2
According to the vacuum AB effect transistor proposed in No. 173003, since the electrons are configured to travel in a vacuum, unlike conventional AB effect transistors in which electrons travel in a semiconductor, the electrons are It is possible to maintain coherence regardless of the Therefore, it is possible to operate at temperatures much higher than the liquid helium temperature, and even at room temperature.

A vacuum AB effect transistor as shown in FIG. 4 is an advanced version of the vacuum AB effect transistor proposed in Japanese Patent Application No. 2-173003. As shown in FIG. 4, in this vacuum AB effect transistor, a quadrangular prism-shaped emitter 101 and a collector 102 having square pyramid-shaped pointed tips are formed such that their tips are opposed to each other. Reference numeral 103 indicates a gate electrode. This gate electrode 103 is made of n-type Ga
It has a parallel plate capacitor structure consisting of an As layer 103a, a semi-insulating GaAs layer 103b, and an n-type GaAs layer 103c. Here, the n-type GaAs layer 103
The a and n-type GaAs layers 103c constitute the electrodes of this capacitor. Reference numeral 104 indicates a blocker.

The operation of the vacuum AB effect transistor shown in FIG. 4 is as follows. That is, emitter 101
By applying a sufficiently high voltage between the emitter 101 and the collector 102, electron waves are emitted from the emitter 101 into a vacuum. This electron wave is divided by the blocker 104 negatively biased with respect to the emitter 101 into an electron wave passing above the blocker 104 in FIG. 4 and an electron wave passing below the blocker 104. These electron waves join together at collector 102 . By controlling the phase difference between these electron waves using the gate electrode 103, the collector 102
The interference between these electronic waves in the wafer is controlled to cause transistor operation. According to the vacuum AB effect transistor shown in FIG. 4, since the gate electrode 103 has a parallel plate capacitor structure, the n-type GaAs layer 103c forming the upper electrode of this parallel plate capacitor in FIG. The potentials of the constituent n-type GaAs layers 103a are constant. As a result, the n-type GaAs layer 1 in FIG.
Between the electron waves passing through the space above 03c and the n-type GaAs
Since no phase difference occurs between the electron waves passing through the space below the layer 103a, there is an advantage that the modulation efficiency by the gate electrode 103 is high.

[0006]

[Problems to be Solved by the Invention] However, in the vacuum AB effect transistor shown in FIG. As a result of the potentials of the n-type GaAs layers 103a constituting each becoming constant, the following problem occurs. That is, due to the potential difference between the gate electrode 103, the emitter 101, the blocker 104, and the collector 102, a strong electric field is generated near the ends of the parallel plate capacitor forming the gate electrode 103, as shown by the arrows in FIG. arise. Then, the electrons emitted from the emitter 101 are influenced by this strong electric field, and the probability of reaching the collector 102 becomes extremely small. For this reason, the emitter 101 and collector 10
The current flowing between 2 was small. Therefore, an object of the present invention is to provide a vacuum electron wave interference transistor that can operate at room temperature and increase the current flowing between the emitter and collector while maintaining the advantages of high modulation efficiency. be.

[0007]

[Means for Solving the Problems] In order to achieve the above object, the first invention divides an electron wave emitted into a vacuum from an emitter (1) into a plurality of electron waves, and then divides the electron wave into a plurality of electron waves. A vacuum electron wave interference transistor configured to combine a plurality of electron waves at a collector (2) and to control the phase difference between the plurality of electron waves by a gate electrode, wherein Multiple parallel plate capacitors (C1-C
7) are arranged parallel to each other.

[0008]

[Operation] According to the vacuum electron wave interference transistor of the present invention configured as described above, by optimizing the potentials of both electrodes of a plurality of parallel plate capacitors arranged in parallel between the emitter and the collector, , it is possible to improve the convergence of electrons to the collector, and therefore it is possible to increase the probability of electrons reaching the collector. This allows the current flowing between the emitter and collector to be increased. Furthermore, since these plural parallel plate capacitors can be used as gate electrodes, the modulation efficiency can be increased. Furthermore, since it is configured to allow electrons to travel in a vacuum, it can operate at room temperature.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view showing a vacuum AB effect transistor according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along line 2--2 in FIG. Figures 1 and 2
As shown in FIG. 1, in the vacuum AB effect transistor according to this embodiment, an emitter 1 and a collector 2, each having a rectangular pyramidal shape and having a pointed tip, are formed facing each other on a substrate (not shown). . These emitter 1 and collector 2 can be formed of various conductive materials such as semiconductors and metals. An example of the cross-sectional dimensions of the square columnar portions of the emitter 1 and collector 2 is, for example, about 0.5 μm×0.5 μm.

In this embodiment, for example, seven parallel plate capacitors C1 to C7 are arranged in parallel between the emitter 1 and collector 2. Here, the longitudinal direction of these parallel plate capacitors C1 to C7 is orthogonal to the direction connecting emitter 1 and collector 2. Symbols 3 and 4 are these parallel plate capacitors C1~
The C7 electrode is shown. Here, these electrodes 3 and 4 are supported by support parts (not shown) at both ends thereof,
The part between them is a floating structure. These electrodes 3 and 4 are made of aluminum (Al), for example. An example of the width of each of the parallel plate capacitors C1 to C7 in the direction connecting the emitter 1 and the collector 2 and the spacing between them is, for example, about several hundred Å.

In this embodiment, all of the parallel plate capacitors C1 to C7 are used as gate electrodes; for example, the parallel plate capacitor C1 is used as a blocker, and the parallel plate capacitor C2 is used as an extraction electrode. In this case, the electrodes 3 of these parallel plate capacitors C1 to C7,
The potential of No. 4 is determined as follows. In addition, in the following, the potentials of electrodes 3 and 4 of parallel plate capacitor Cm (m = 1 to 7) are respectively referred to as VCm (lower) and VCm (upper).
Expressed as A predetermined voltage is applied between the emitter 1 and the collector 2 so that the potential on the collector 2 side becomes high. Next, without applying a potential difference between electrodes 3 and 4 of parallel plate capacitors C1 and C2, which are used as blocker and extraction electrodes, respectively, VC1 (lower) = VC1
(top), VC2 (bottom) = VC2 (top), electron emission can be caused from emitter 1, and the electron wave emitted from emitter 1 hits the upper side of parallel plate capacitor C1 in Figures 1 and 2. It is divided into an electron wave passing through and an electron wave passing below, and in order to collect these electron waves into the collector 2 with good convergence, VC1 (bottom) = VC1 (top), VC2 (
Determine lower)=VC2(upper). At this time, no voltage is applied to the electrodes 3 and 4 of the remaining parallel plate capacitors C3 to C7.

As described above, the parallel plate capacitor C1
, C2, the potentials of the remaining five parallel plate capacitors C3 to C7 are determined so as not to disturb the potential distribution between the emitter 1 and the collector 2. However, at this time, no potential difference is applied between the electrodes 3 and 4 of these parallel plate capacitors C3 to C7. That is, VCm (lower) = VCm (upper) (m = 3
~7). From this state, the potentials of the electrodes 3 and 4 of all the parallel plate capacitors C1 to C7 are changed to, for example, VCm(
Bottom) → VCm (bottom) - ΔV/2, VCm (top) → VCm
(Top) Change as +ΔV/2 (m=1 to 7). As a result, these parallel plate capacitors C1 to C7
A potential difference ΔV occurs between the electrodes 3 and 4, and as a result, a phase difference corresponding to this potential difference ΔV occurs between the electron waves passing above and below these parallel plate capacitors C1 to C7. arise. By changing this ΔV and controlling the phase difference between these electronic waves, transistor operation can be performed. In addition, as mentioned above, VCm (top),
Even if VCm (bottom) is changed by ±ΔV/2,
The average potential between the electrodes 3 and 4 of the parallel plate capacitors C1 to C7 is maintained at the optimized potential as described above.

Next, a method for manufacturing the vacuum AB effect transistor according to this embodiment will be explained. First, the emitter 1 and collector 2 are formed by epitaxial growth, dry etching, or the like. Next, parallel plate capacitors C1 to C7 are formed as follows. That is, as shown in FIG. 3, for example, Si is deposited on a substrate (not shown).
An O2 film 5, an Al film 6, a SiO2 film 7 and an Al film 8 are sequentially formed. Here, the SiO2 films 5 and 7 are made of, for example, C
It can be formed by a VD method, and the Al films 6 and 8 can be formed by, for example, a vacuum evaporation method or a sputtering method. Next, the substrate is placed in an evacuated sample chamber of an electron beam irradiation device (not shown), and then a source gas such as alkylnaphthalene is introduced into the sample chamber. As a result, raw material molecules are adsorbed onto the surface of the Al film 8. Therefore, in this raw material gas atmosphere, Al
An electron beam with an extremely narrow beam diameter is irradiated onto the film 8, and the parallel plate capacitors C1 to C are connected by this electron beam.
7 patterns are drawn. By this electron beam irradiation, the raw material molecules adsorbed on the surface of the Al film 8 are decomposed, and an amorphous hydrocarbon-based substance is generated in the shape of the pattern drawn by the electron beam. In this way, the resist pattern 9 made of this amorphous hydrocarbon material is formed in the pattern of parallel plate capacitors C1 to C7. Note that the resist formed by such electron beam irradiation is EBIR.
(Electron Beam Induced Re
sist). This EBIR has excellent dry etching resistance. Next, using the resist pattern 9 formed as described above as a mask, the Al film 8 and the Si film are etched by, for example, reactive ion etching (RIE).
After sequentially etching the O2 film 7 and the Al film 6, the resist pattern 9 is removed. After this, SiO2 film 5,
7 is wet-etched using, for example, a hydrofluoric acid-based etching solution. As a result, as shown in FIGS. 1 and 2, parallel plate capacitors C1 to C7 having a suspended structure except for the support portions at both ends are formed, and the intended vacuum AB effect transistor is completed.

As described above, according to this embodiment, by optimizing the potentials of the electrodes 3 and 4 of the parallel plate capacitors C1 to C7 arranged between the emitter 1 and the collector 2, electrons can be transferred to the collector 2. Since convergence can be improved, the current flowing between the emitter 1 and the collector 2 can be increased. Moreover, since these parallel plate capacitors C1 to C7 can be used as gate electrodes, the modulation efficiency of the quantum mechanical transition probability of electrons from the emitter 1 to the collector 2 can be made sufficiently high. Furthermore, since the vacuum AB effect transistor according to this embodiment is configured to allow electrons to travel in a vacuum, it can operate at room temperature. Furthermore, since the parallel plate capacitors C1 to C7 can be formed fairly thin, the path of electrons from the emitter 1 to the collector 2 does not need to be so curved, and therefore the electrons emitted from the emitter 1 can be It can be collected into the collector 2 with collection efficiency.

Although one embodiment of the present invention has been specifically described above, the present invention is not limited to the above-described embodiment, and various modifications can be made based on the technical idea of the present invention. . For example, in the above embodiment, seven parallel plate capacitors C1 to C7 are arranged between the emitter 1 and the collector 2, but the number of parallel plate capacitors is arbitrary and can be determined as necessary. Is possible. However, in order to optimize the potential distribution between the emitter 1 and the collector 2, it is generally preferable that the number of parallel plate capacitors is large, and that their width and interval are small. Further, in the above embodiment, the parallel plate capacitor C1 of these parallel plate capacitors C1 to C7 is used as a blocker, and the parallel plate capacitor C2 is used as an extraction electrode. How to use each of these parallel plate capacitors C1 to C7 can be determined as necessary, such as using the parallel plate capacitors C3 and C4 as blockers and the parallel plate capacitors C3 and C4 as extraction electrodes. Furthermore, in the above embodiment, the electrodes 3 of the parallel plate capacitors C1 to C7
, 4 are formed of Al, but these electrodes 3, 4
Of course, it is possible to use other metals as the material, and it is also possible to use conductive materials other than metals.

[0016]

[Effects of the Invention] As explained above, according to the vacuum electron wave interference transistor of the present invention, since a plurality of parallel plate capacitors are arranged in parallel between the emitter and the collector, room temperature operation is possible. While maintaining the advantage of high modulation efficiency, the current flowing between the emitter and collector can be increased by improving the convergence of electrons to the collector.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing a vacuum AB effect transistor according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along line 2-2 in FIG. 1;

FIG. 3 is a cross-sectional view for explaining a method of manufacturing the vacuum AB effect transistor shown in FIG. 1;

FIG. 4 is a cross-sectional view showing a vacuum AB effect transistor that is a development of the vacuum AB effect transistor proposed in Japanese Patent Application No. 2-173003.

FIG. 5 is a cross-sectional view of the vicinity of the gate electrode and blocker of the vacuum AB effect transistor shown in FIG. 4;

[Explanation of symbols]

1 Emitter 2 Collector Ck parallel plate capacitor 3 Electrode 4 Electrode

Claims (1)

[Claims] Claim 1: After dividing an electron wave emitted into a vacuum from an emitter into a plurality of electron waves, the plurality of electron waves are combined at a collector, and the phase difference between the plurality of electron waves is adjusted by a gate electrode. A vacuum electron wave interference transistor configured to control a vacuum electron wave interference transistor, characterized in that a plurality of parallel plate capacitors are arranged parallel to each other between the emitter and the collector.