JPH04245476A - Photosemiconductor device - Google Patents

Abstract

PURPOSE:To form an extremely thick depletion layer by a method wherein a P-type epitaxial layer 14 is laminated while introducing impurities 19 for offsetting the impurity concentration in a substrate 13. CONSTITUTION:Phosphorus is ion-implanted as an offsetting impurity 19 in a P type substrate 13. Next, a P type epitaxial layer 14 is laminated on the substrate 13 and then separated to form the first and second insular regions 16, 17. Next, an N<+> type diffused region 18 to be a photodiode 11 is formed in the first insular region 16. Finally, an N type collector region 22 is formed in the second insular region 17 and then a P type base region 23 and an N<+> type emitter region 24 are formed to make an NPN transistor 12.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device that integrates a photodiode and a bipolar IC.

0002

[Prior Art] Optical semiconductor devices in which a light-receiving element and peripheral circuitry are integrated and formed monolithically are expected to reduce costs, unlike hybrid ICs in which the light-receiving element and circuit elements are made separately. , which has the advantage of being resistant to noise caused by external electromagnetic fields.

As a light receiving element of a conventional optical semiconductor device,
For example, the structure described in Japanese Unexamined Patent Publication No. 61-47664 is known. That is, as shown in FIG. 11, a P-type substrate (1)
The N type epitaxial layer (2) formed above, the island region (4) separated by the P+ type isolation region (3), the P type diffusion region (5) formed on the surface of the island region (4), and the N
+ type diffusion region (6), P type diffusion region (5) and N
- PN junction with type island region (4) as photodiode (7)
It is constructed as follows. (8) is an N+ type buried layer.

By the way, in terms of improving the performance of the photodiode (7), it is better to increase the resistivity of the island region (4) which becomes the cathode, thereby reducing the capacitance. Therefore, in the same Japanese Patent Application Laid-Open No. 61-47664, an N-type well region (10) is formed in an NPN transistor (9), and by supplementing the impurity concentration of the region that will become the collector, a photodiode (
An example of improving the performance of 7) has been disclosed.

[0005]

[Problems to be Solved by the Invention] However, when an epitaxial layer (2) is grown on a P-type substrate (1),
The epitaxial layer (2) is composed of boron (B) from the substrate (1).
) autodoping and unexpected impurities from the outside (mainly P
type impurities). Therefore, if the specific resistance of the N-type epitaxial layer (2) is increased, it becomes difficult to maintain the epitaxial layer (2) as an N-type, and there is a drawback that it is difficult to control the resistance value and conductivity type.

Furthermore, due to the above-mentioned situation, it is not possible to increase the specific resistance, so the width of the depletion layer formed at the PN junction of the photodiode (7) cannot be increased, and therefore the junction capacitance, which affects the characteristics of the photodiode (7), cannot be increased. There were some drawbacks that could not be reduced sufficiently. Furthermore, there is a drawback that the response speed of the photodiode (7) deteriorates due to the transit time of carriers generated outside the depletion layer, which are generated deep in the P-type diffusion region (5) or the epitaxial layer (2).

[0007]

[Means for Solving the Problems] The present invention has been made in view of the various drawbacks mentioned above, and includes a P-type epitaxial layer (14) formed on a P-type substrate (13), and an epitaxial layer (14) formed on a P-type substrate (13). The first and second island regions (16) (
17), the N+ type diffusion region (18) of the photodiode (11) formed on the surface of the first island region (16), and the first
An N-type impurity (19) is ion-implanted into the surface of the substrate (13) in the island region (16) to offset the impurity concentration of the substrate (13).
), an N-type collector region (22) that inverts the conductivity type of the second island region (17), a base region (23) formed on the surface of the collector region (22), and an N+-type emitter region (
24), thereby providing an IC with a built-in high-performance photodiode (11).

[0008]

[Operation] According to the present invention, a P-type epitaxial layer (1
4), there is no need for control to cancel and invert the autodoped P-type impurity from the substrate (13).
A nearly intrinsic high resistivity layer can be easily obtained. Therefore, the depletion layer (34) generated at the PN junction of the photodiode (11) can be expanded until it reaches the substrate (13), so the capacitance of the photodiode (11) can be reduced.

Further, the substrate (13) is coated on the surface of the substrate (13).
Since the N-type impurity (19) is introduced to offset the impurity concentration of , the depletion layer (34) can be expanded to the deep part of the substrate (13). Furthermore, by expanding the depletion layer until it reaches the substrate (13), the generation of carriers generated outside the depletion layer on the anode side can be reduced. N+ type diffusion region on the cathode side (1
In 8), since it can be formed in a shallow region with a high impurity concentration by emitter diffusion, generation of carriers generated outside the depletion layer can be suppressed and the transit time of the generated carriers can be shortened.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. Figure 1 shows the photodiode (11) and N
FIG. 2 is a cross-sectional view of an IC incorporating a PN transistor (12). (13) is a P-type single crystal silicon semiconductor substrate;
(14) is a P-type epitaxial layer with a thickness of 10 to 12 μm formed on the substrate (13) by vapor phase growth. The substrate (13) has a specific resistance of 40 to 60 Ω·cm, and the epitaxial layer (14) has a resistivity of 200 to 1500 Ω when completed.
・It has a specific resistance of cm.

The P-type epitaxial layer (14) has a separation region (15) extending from the surface of the epitaxial layer (14) to the substrate (13) to separate the photodiode (1).
1) It is divided into a first island region (16) for forming an NPN transistor (12) and a second island region (17) for forming an NPN transistor (12). The first and second island regions (16) and (17) are completely separated at the boundary between the isolation region (15) and the epitaxial layer (14) and the boundary between the substrate (13) and the epitaxial layer (14), respectively. being surrounded.

A photodiode (11) serving as an input section for optical signals is formed in the first island region (16). The photodiode (11) has an N+ type diffusion region (18) formed on almost the entire surface of the first island region (16).
8) forms a PN junction with the first island region (16). The diffusion depth of the N+ type diffusion region (18) is 0.
It is 8 to 1.0μ.

[0013] The substrate (
13) Phosphorus (P) of about 1 x 1011 to 5 x 1011 is introduced into the surface by ion implantation, and this impurity (19) increases the impurity concentration of the substrate (13) upon completion, resulting in a resistivity of 200 The thickness of the P-type layer with the above specific resistance can be increased by 2 to 10 microns. Second island area (17)
The NPN transistor (1
2) Form. An N+ type buried layer (20) is formed at the bottom of the second island region (17) so as to span the boundary between the substrate (13) and the epitaxial layer (14), and to overlap the buried layer (20). Then, a second buried layer (21) having a low impurity concentration is formed. The second buried layer (21) is formed by diffusion upward from the boundary between the substrate (13) and the epitaxial layer (14). Second island area (
An N-type collector region (22) is formed on the surface of 17),
By connecting the collector region (22) and the second buried layer (21), the conductivity type of the second island region (17) is inverted to N type. The NPN transistor (12) uses the collector region (22) and the second buried layer (21) as collectors, and the P-type base region (23) formed on the surface of the collector region (22). It consists of an N+ type emitter region (24) formed on the surface. (25) is an N+ type collector contact region. Furthermore, the separation region (15) that partitions the second island region (17) touches and completely surrounds the entire circumference of the collector region (22).

The surface of the epitaxial layer (14) is covered with an oxide film (26) and partially opened to form contact holes. Electrodes (27), (28), and (29) are provided on each region via this contact hole. The electrode (27) in contact with the N+ type diffusion region (18) of the photodiode (11) becomes the cathode electrode, and the isolation region (
The electrode (28) in contact with 15) is the anode electrode.

The above structure can be obtained by the following manufacturing method. First, phosphorus (P), which serves as a countervailing impurity (19), is applied to the entire surface of the P-type substrate (13) at a dose of 1×1011.
Ion implantation is performed at ~5×10 11 (FIG. 2). Note that it may be selectively introduced only to the planned area of the first island area (16). Next, the surface of the P-type substrate (13) is thermally oxidized to form an oxide film (30), and the oxide film (30) is photoetched to form a selective mask. Then, N on the surface of the substrate (13).
Antimony (Sb) is introduced to form the buried layer (20) of the PN transistor (12), and then phosphorus (P) is introduced to form the second buried layer (21) of the NPN transistor (12) using the same selection mask. ) is ion-implanted (Figure 3). After that, change the selection mask and select the substrate (13).
Boron (B) is introduced into the surface to form the lower isolation region (31) of the isolation region (15) (FIG. 4).

Next, an oxide film (3
0) is removed, the substrate (13) is placed on the susceptor of an epitaxial growth apparatus, and the substrate (13) is heated by lamp heating.
By applying a high temperature of about 1140°C to 13) and introducing SiH2Cl2 gas and H2 gas into the reaction tube, a non-doped epitaxial layer (14) is formed with a thickness of 10 to 15 μm.
Make it grow. When grown without doping in this way, the entire epitaxial layer (14) becomes a P-type layer with a specific resistance of 200 to 1500 Ωcm, which is close to intrinsic, when completed due to autodoping of boron (B) from the substrate (13). (Figure 5).

Next, an oxide film (32) is formed on the surface of the epitaxial layer (14), a selective mask is formed by photoetching, and a phosphorus (P) film is formed to form the N-type collector region (22) of the NPN transistor (12). ion implantation. Then, by applying heat treatment to the entire substrate (13), the N-type collector region (22), the second buried layer (21), and the lower isolation region (31) are driven in. This drive-in allows the collector area (22
) are diffused by 5 to 6μ, and the second buried layer (21) is diffused by 7 to 9μ and connected to each other (FIG. 6). Lower separation area (3
1) is diffused by 9-10μ.

Next, the upper isolation region (33) of the isolation region (15) is diffused from the surface of the epitaxial layer (14) and connected to the lower isolation region (31).
) into first and second island regions (16) and (17) (
Figure 7). Then, P from the surface of the epitaxial layer (14)
A type impurity is selectively diffused to form the base region (23) of the NPN transistor (12), and an N-type impurity is then selectively diffused to form the emitter region (23) of the NPN transistor (12).
24), a collector contact region (25), and an N+ type diffusion region (18) of the photodiode (11) are formed (FIG. 8).

Thereafter, the structure shown in FIG. 1 is obtained by disposing electrodes by depositing Al and photo-etching. next,
The operation of the photodiode (11) having the above configuration will be explained. When a ground potential (GND) is applied to the electrode (28) of the photodiode (11) and a reverse bias voltage such as +5V is applied to the electrode (27), a depletion layer (34 ) is formed. Depletion layer (
The width of the epitaxial layer (14) is 10μ or more due to the high specific resistance of the epitaxial layer (14).
4) and the isolation region (15) as well as the boundary between the epitaxial layer (14) and the substrate (13). Furthermore, by introducing the impurity (19) that cancels out the impurity of the substrate (13), the first island region (1
6) The surface of the substrate (13) has a high specific resistance of 100 to 1000 Ω·cm. Therefore, the depletion layer (34) spreads about 10μ deep into the substrate (13), and the depletion layer (34) has a thickness of about 20μ including the epitaxial layer (14).
34) is obtained.

[0020] Therefore, an extremely thick depletion layer (34) exceeding the thickness of the epitaxial layer (14) can be obtained, so that the capacitance of the photodiode (11) can be reduced and the response speed can be increased. In addition, the structure of the present application has an island region (1
6) and the isolation region (15), there is no junction capacitance between the N-type island region (4) and the P+-type isolation region (3), which was seen in the example of FIG. The capacity of the photodiode (11) can also be reduced at this point.

On the other hand, electron-hole pairs are generated by the incident light outside the depletion layer (34), and carriers generated outside the depletion layer (35)
and is involved in photocurrent. These carriers (35) generated outside the depletion layer diffuse through the P-type or N-type region as shown in FIG. 10 and then reach the depletion layer (34), so the diffusion time deteriorates the response speed of the photodiode (11). It becomes a factor that causes However, the N+ type diffusion region (
18) is a region with high impurity concentration due to the emitter diffusion of the NPN transistor (12), so the carriers (35) generated outside the depletion layer generated in the N+ type diffusion region (18) have an extremely short lifetime and disappear immediately. Moreover, the carriers (35) generated outside the depletion layer that could not be completely eliminated can reach the depletion layer (34) in an extremely short time because the N+ type diffusion region (18) is a shallow region. Therefore, carriers generated outside the depletion layer (35) generated in the N+ type diffusion region (18)
has almost no effect on the response speed of the photodiode (11).

Further, in the P type substrate (13), the substrate (13
) Since most of the incident light is absorbed by the depletion layer (34) which extends deep, there are almost no carriers (35) generated outside the depletion layer in the P-type substrate (13). Therefore, the delay current is small and the response speed of the photodiode (11) is not degraded. Further, on the cathode side, the series resistance can be reduced because the electrode (27) is taken out from the N+ type diffusion region (18) with high impurity concentration, and on the anode side, the electrode (28) is taken out from the P+ type isolation region (15) with high impurity concentration. Since it takes out the series resistance can be reduced. Therefore, the speed of the photodiode (11) can be improved.

In the second island region (17), the conductivity types of the collector region (22) and the second buried layer (21) are reversed, so that it is possible to form an NPN transistor (12). Moreover, since the second buried layer (21) formed by diffusion from the surface of the substrate (13) and the collector region (22) formed by diffusion from the surface of the epitaxial layer (14) are connected, the epitaxial layer (14) can be made thicker. Diffusion time can be shortened. Furthermore, since the impurity concentration of the second buried layer (21) increases as it approaches the substrate (13), the VC of the NPN transistor (12)
E(sat) can be reduced.

[0024]

[Effects of the Invention] As explained above, according to the present invention,
■ A P-type epitaxial layer (
14), a high resistivity layer can be stably obtained compared to stacking N-type inverted epitaxial layers.

■ A thick depletion layer (
34) is obtained, and since the depletion layer (34) can be expanded to the deep part of the substrate (13) by the canceling impurity (19), an extremely thick depletion layer (34) can be obtained. Therefore, the capacity of the photodiode (11) can be reduced and the speed can be improved. (2) Since no PN junction is formed between the island region (16) and the isolation region (15), the capacitor of the photodiode (11) can be reduced.

■ Since a PN junction is formed in the N+ type diffusion region (18) with a shallow high impurity concentration by emitter diffusion, the delay current due to carriers (35) generated outside the depletion layer is small and the response speed of the photodiode (11) is improved. can. (2) Since most of the incident light can be absorbed by the thick depletion layer (34), less carriers (35) are generated outside the depletion layer in the substrate (13).

■ PN in shallow N+ type diffusion region (18)
Since a junction is formed, it is possible to cope with light having a short wavelength such as a wavelength λ of 400 nm. It has this effect. Therefore,
A photodiode (11) with high sensitivity and excellent response speed can be incorporated into an IC.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a semiconductor device of the present invention.

FIG. 2 is a first drawing illustrating the manufacturing method of FIG. 1;

FIG. 3 is a second drawing illustrating the manufacturing method of FIG. 1;

FIG. 4 is a third drawing illustrating the manufacturing method of FIG. 1;

FIG. 5 is a fourth drawing illustrating the manufacturing method of FIG. 1;

FIG. 6 is a fifth drawing illustrating the manufacturing method of FIG. 1;

7 is a sixth drawing illustrating the manufacturing method of FIG. 1. FIG.

8 is a seventh drawing illustrating the manufacturing method of FIG. 1. FIG.

FIG. 9 is a sectional view showing a photodiode (11) section.

FIG. 10 is a band diagram of a photodiode (11).

FIG. 11 is a sectional view showing a conventional example.

Claims (6)

[Claims] 1. A semiconductor substrate of one conductivity type, a high-resistance epitaxial layer of one conductivity type formed on the surface of the semiconductor substrate, and an isolation region of one conductivity type reaching the substrate from the surface of the epitaxial layer. a first region for forming a photodiode surrounded by a boundary between the isolation region and the epitaxial layer and a boundary between the substrate and the epitaxial layer;
an island region and a second island region for transistor formation;
a low resistance diffusion region of opposite conductivity type formed on the surface of the first island region; and an impurity of opposite conductivity type implanted into the substrate surface of the first island region to offset the impurity concentration of the substrate; a collector region of an opposite conductivity type that inverts the conductivity type of the second island region formed on the surface of the second island region; a base region of one conductivity type formed on the surface of the collector region; and the base region. 1. An optical semiconductor device comprising: an emitter region of opposite conductivity type formed on a surface of the semiconductor device. 2. The semiconductor substrate has a specific resistance of 40 to 60.
2. The optical semiconductor device according to claim 1, wherein the resistance is Ω·cm. 3. The epitaxial layer has a specific resistance of 20
2. The optical semiconductor device according to claim 1, wherein the resistance is 0 to 1500 Ω·cm. 4. The optical semiconductor device according to claim 1, wherein the opposite conductivity type diffusion region of the first island region is formed by emitter diffusion of the second island region. 5. The optical semiconductor device according to claim 1, wherein the canceling impurity is introduced into the entire surface of the semiconductor substrate. 6. The optical semiconductor device according to claim 1, wherein the canceling impurity is selectively introduced into the substrate surface of the first island region.