JPH04239129A - Plasma processing method of semiconductor wafer - Google Patents

Plasma processing method of semiconductor wafer

Info

Publication number
JPH04239129A
JPH04239129A JP3001822A JP182291A JPH04239129A JP H04239129 A JPH04239129 A JP H04239129A JP 3001822 A JP3001822 A JP 3001822A JP 182291 A JP182291 A JP 182291A JP H04239129 A JPH04239129 A JP H04239129A
Authority
JP
Japan
Prior art keywords
temperature
plasma processing
wafer
electrode
semiconductor wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3001822A
Other languages
Japanese (ja)
Inventor
Hidefumi Tomiki
冨来 秀文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3001822A priority Critical patent/JPH04239129A/en
Publication of JPH04239129A publication Critical patent/JPH04239129A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE:To enhance the reproducibility of the process performances in the plasma processing step of semiconductor wafers by a method wherein an opposite electrode is heated so as to raise the temperature thereof at the value within a specific temperature range before starting the semiconductor wafer processing steps. CONSTITUTION:For example, within a dry-etcher of an oxide film, if the stand-by time exceeds 10 minutes, the opposite electrode 6 is cooled down at about 50 deg.C when the refrigerant temperature in a refrigerator is at 30 deg.C. When a wafer 1 is continuously processed, since the temperature of the opposite electrode 6 is normally raised up to about 110 deg.C, if 110+ or -10 deg.C is specified to be a rated value, the plasma processing step will not be started but to be advanced to the temperature stabilizing step. During the temperature stabilizing step, the plasma processing step is performed for two minutes meeting the requirements for the pressure at about 0.8Torr using Ar gas and the power of 500-700W. Resultantly, the temperature of the opposite electrode 6 is raised up to about 100-110 deg.C while the device 1 carries the first wafer 1 to a supporting electrode 2. Later the same processing steps as those of the conventional sequences are performed.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は半導体ウェハーのプラズ
マ処理方法に関し特に平行平板型プラズマ処理装置を用
いる半導体ウェハーのプラズマ処理方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing method for semiconductor wafers, and more particularly to a method for plasma processing semiconductor wafers using a parallel plate type plasma processing apparatus.

【0002】0002

【従来の技術】従来、平行平板型のプラズマ処理装置に
於ては、半導体ウェハー(以下単にウェハーという)を
載置する保持電極の温度(又はウェハー温度)は制御さ
れているが、保持電極と対向する対向電極については温
度制御は行われていなかった。以下図面を用いて説明す
る。
[Prior Art] Conventionally, in a parallel plate type plasma processing apparatus, the temperature (or wafer temperature) of a holding electrode on which a semiconductor wafer (hereinafter simply referred to as wafer) is placed is controlled; Temperature control was not performed on the opposing counter electrodes. This will be explained below using the drawings.

【0003】図3は従来の平行平板型プラズマ処理装置
の一例の断面図である。ウェハー1は保持電極2上に搬
送され保持される。次にチャンバー3内は、排気口4に
接続されたポンプにより排気され、さらに圧力がある限
度を下まわった段階でガス導入口5より反応ガスがチャ
ンバー3内に導入され圧力が安定するまで保たれる。そ
の後処理の目的に応じ対向電極6あるいは保持電極2の
いずれか又は両者に高周波電力が加えられ、エッチング
やCVD等の処理が行われる。
FIG. 3 is a sectional view of an example of a conventional parallel plate type plasma processing apparatus. The wafer 1 is transferred onto the holding electrode 2 and held there. Next, the inside of the chamber 3 is evacuated by a pump connected to the exhaust port 4, and when the pressure falls below a certain limit, the reaction gas is introduced into the chamber 3 through the gas inlet 5 and maintained until the pressure stabilizes. drooping Thereafter, high frequency power is applied to either or both of the counter electrode 6 and the holding electrode 2 depending on the purpose of the treatment, and a treatment such as etching or CVD is performed.

【0004】ウェハー1が保持電極2上に載せられた時
、チャンバー内の諸パラメータ(真空度,ガス流量,保
持電極の温度等)がチェックされる。諸パラメータに問
題が無ければ電極に高周波電力が印加され、所定時間処
理が行われる。高周波電力印加前のパラメータチェック
時には、保持電極2の温度はモニターされ、必要に応じ
処理を中止することは可能であるが、対向電極6に関し
てはモニターのみ又はモニターすら行われていないこと
が多い。
When the wafer 1 is placed on the holding electrode 2, various parameters within the chamber (degree of vacuum, gas flow rate, temperature of the holding electrode, etc.) are checked. If there are no problems with the various parameters, high frequency power is applied to the electrodes and processing is performed for a predetermined period of time. When checking parameters before applying high-frequency power, the temperature of the holding electrode 2 is monitored, and it is possible to stop the process if necessary, but the counter electrode 6 is often only monitored or not even monitored.

【0005】一般にプラズマ処理装置に於て高周波電力
を印加すると、電極の温度は急激に上昇してゆく。例え
ば酸化膜ドライエッチャーの場合、エッチングレートが
500nm/min程度の条件で処理を行うと、電極の
冷却機構中の冷媒の設定温度が30℃程度であっても、
2分間の処理で電極は100℃以上に達する。
[0005] Generally, when high frequency power is applied in a plasma processing apparatus, the temperature of the electrode rapidly rises. For example, in the case of an oxide film dry etcher, if the etching rate is about 500 nm/min, even if the set temperature of the coolant in the electrode cooling mechanism is about 30 °C,
The electrode reaches a temperature of over 100° C. after 2 minutes of treatment.

【0006】[0006]

【発明が解決しようとする課題】この従来のウェハーの
プラズマ処理方法では、対向電極の温度が全く制御され
ていない為、対向電極温度の変動によるプロセス性能の
変動を防ぐことが出来ないという問題点があった。
[Problem to be Solved by the Invention] In this conventional wafer plasma processing method, since the temperature of the counter electrode is not controlled at all, there is a problem in that it is not possible to prevent fluctuations in process performance due to fluctuations in the temperature of the counter electrode. was there.

【0007】プロセス性能の変動は例えば、エッチング
装置ではエッチングレートの変動として観測される。例
えば図4における破線Bに示されるように、従来のプラ
ズマエッチング装置に於るウェハーのエッチングレート
は最大10%程度にまで変動する。このため半導体装置
の歩留りが低下し、特性がばらつくという問題点があっ
た。
[0007] Fluctuations in process performance are observed, for example, in etching equipment as variations in etching rate. For example, as shown by the broken line B in FIG. 4, the etching rate of a wafer in a conventional plasma etching apparatus varies up to about 10%. For this reason, there have been problems in that the yield of semiconductor devices decreases and the characteristics vary.

【0008】[0008]

【課題を解決するための手段】本発明の半導体ウェハー
のプラズマ処理方法は、半導体ウェハーを保持する保持
電極とこの保持電極に対向して設けられた対向電極とを
有する平行平板型プラズマ処理装置を用い、両電極間に
プラズマを発生させて半導体ウェハーを処理する半導体
ウェハーのプラズマ処理方法において、前記対向電極を
加熱しその温度を一定の温度範囲内に上昇させたのち半
導体ウェハーの処理を行うものである。
[Means for Solving the Problems] The plasma processing method for semiconductor wafers of the present invention employs a parallel plate type plasma processing apparatus having a holding electrode for holding a semiconductor wafer and a counter electrode provided opposite to this holding electrode. A plasma processing method for semiconductor wafers in which the semiconductor wafer is processed by generating plasma between both electrodes, in which the semiconductor wafer is processed after heating the counter electrode and raising its temperature within a certain temperature range. It is.

【0009】[0009]

【実施例】次に本発明について図面を参照して説明する
。図1は本発明の一実施例を説明するためのプラズマ処
理装置の断面図である。装置の構成は基本的には図3に
示した従来の装置と同一であるが、対向電極6の温度を
モニターする温度センサー7が追加されている。図2は
本発明の一実施例を説明するための工程図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a sectional view of a plasma processing apparatus for explaining one embodiment of the present invention. The configuration of the device is basically the same as the conventional device shown in FIG. 3, but a temperature sensor 7 for monitoring the temperature of the counter electrode 6 is added. FIG. 2 is a process diagram for explaining one embodiment of the present invention.

【0010】待機状態にある装置に被処理のウェハーが
セットされ処理スタートを指示する。この状態で装置は
対向電極の温度をモニターする。
A wafer to be processed is set in an apparatus in a standby state, and a start of processing is instructed. In this state, the device monitors the temperature of the counter electrode.

【0011】例えば酸化膜のドライエッチャーの場合、
待機時間が10分以上であると対向電極6は、冷却機構
の冷媒の温度が30℃の場合、50℃程度まで冷却され
ている。連続してウェハーを処理した場合対向電極6の
温度は通常110℃程度に上昇するので、110±10
℃を規格としておけば処理は開始されずに温度安定化処
理へ進む。温度安定化処理では、Arガスを用い0.8
Torr程度の圧力,500〜700Wの条件で2分間
のプラズマ処理が行なわれる。この結果対向電極6の温
度は110〜110℃程度に上昇し、装置は1枚目のウ
ェハー1を保持電極2上へ搬送する。その後は従来の処
理シーケンスと同様に真空度,ガス流量等のパラメータ
がチェックされ処理が行われる。
For example, in the case of an oxide film dry etcher,
When the standby time is 10 minutes or more, the counter electrode 6 is cooled to about 50°C when the temperature of the refrigerant in the cooling mechanism is 30°C. When processing wafers continuously, the temperature of the counter electrode 6 usually rises to about 110°C, so
If °C is set as the standard, the process will not start and will proceed to the temperature stabilization process. In the temperature stabilization treatment, Ar gas was used to stabilize the temperature at 0.8
Plasma processing is performed for 2 minutes under conditions of a pressure of approximately Torr and a power of 500 to 700 W. As a result, the temperature of the counter electrode 6 rises to about 110 to 110° C., and the apparatus transports the first wafer 1 onto the holding electrode 2. Thereafter, parameters such as degree of vacuum and gas flow rate are checked and processing is performed in the same manner as in the conventional processing sequence.

【0012】このようにして処理されたウェハーのエッ
チングレートと処理枚数との関係は、図4の実線Aに示
したように、ばらつきの少いものとなった。
The relationship between the etching rate and the number of wafers processed in this way has little variation, as shown by the solid line A in FIG.

【0013】プラズマCVD装置の場合も酸化膜ドライ
エッチャーと基本的に同一の処理により対向電極温度を
上昇させる。プラズマCVDの場合対向電極は通常加熱
されており温度は200℃〜300℃に設定されている
。Arプラズマ処理により対向電極の温度を設定温度よ
り20〜40℃程度上昇させることにより、ウェハー間
の膜質のばらつきを低減させることが可能である。
In the case of a plasma CVD apparatus as well, the temperature of the opposing electrode is raised by basically the same process as in the oxide film dry etcher. In the case of plasma CVD, the counter electrode is usually heated and the temperature is set at 200°C to 300°C. By raising the temperature of the counter electrode by about 20 to 40° C. above the set temperature by Ar plasma treatment, it is possible to reduce variations in film quality between wafers.

【0014】上述した実施例では枚葉処理装置について
説明したが、バッチ処理装置に於ても同様の効果が得ら
れることは明らかである。又対向電極6の温度をウェハ
ー1枚処理毎にモニターすれば、処理能力は低下するが
ウェハー間の再現性はさらに向上する。
[0014] In the above-mentioned embodiment, a single wafer processing apparatus has been described, but it is clear that similar effects can be obtained also in a batch processing apparatus. Furthermore, if the temperature of the counter electrode 6 is monitored every time one wafer is processed, the reproducibility between wafers will be further improved, although the processing capacity will be lowered.

【0015】[0015]

【発明の効果】以上説明したように本発明は、従来制御
されていなかった対向電極の温度を制御することにより
、半導体ウェハーのプラズマ処理に於けるプロセス性能
の再現性を向上させる効果がある。
As described above, the present invention has the effect of improving the reproducibility of process performance in plasma processing of semiconductor wafers by controlling the temperature of the counter electrode, which has not been controlled in the past.

【0016】このため半導体装置の歩留りを向上させ、
特性のばらつきを小さくすることができる。
Therefore, it is possible to improve the yield of semiconductor devices,
Variations in characteristics can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例を説明するためのプラズマ処
理装置の断面図である。
FIG. 1 is a sectional view of a plasma processing apparatus for explaining one embodiment of the present invention.

【図2】本発明の一実施例を説明するための工程図であ
る。
FIG. 2 is a process diagram for explaining one embodiment of the present invention.

【図3】従来のプラズマ処理装置の一例の断面図である
FIG. 3 is a cross-sectional view of an example of a conventional plasma processing apparatus.

【図4】従来例及び実施例におけるエッチングレートの
変動を示す図である。
FIG. 4 is a diagram showing variations in etching rate in a conventional example and an example.

【符号の説明】[Explanation of symbols]

1    ウェハー 2    保持電極 3    チャンバー 4    排気口 5    ガス導入口 6    対向電極 7    温度センサー 1 Wafer 2 Holding electrode 3 Chamber 4 Exhaust port 5 Gas inlet 6 Counter electrode 7 Temperature sensor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  半導体ウェハーを保持する保持電極と
この保持電極に対向して設けられた対向電極とを有する
平行平板型プラズマ処理装置を用い、両電極間にプラズ
マを発生させて半導体ウェハーを処理する半導体ウェハ
ーのプラズマ処理方法において、前記対向電極を加熱し
その温度を一定の温度範囲内に上昇させたのち半導体ウ
ェハーの処理を行うことを特徴とする半導体ウェハーの
プラズマ処理方法。
1. Processing a semiconductor wafer by generating plasma between the two electrodes using a parallel plate plasma processing apparatus having a holding electrode for holding a semiconductor wafer and a counter electrode provided opposite to the holding electrode. A plasma processing method for a semiconductor wafer, characterized in that the semiconductor wafer is processed after heating the counter electrode and raising the temperature within a certain temperature range.
【請求項2】  不活性ガスのプラズマにより保持電極
を加熱する請求項1記載の半導体ウェハーのプラズマ処
理方法。
2. The method of plasma processing a semiconductor wafer according to claim 1, wherein the holding electrode is heated by an inert gas plasma.
JP3001822A 1991-01-11 1991-01-11 Plasma processing method of semiconductor wafer Pending JPH04239129A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3001822A JPH04239129A (en) 1991-01-11 1991-01-11 Plasma processing method of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3001822A JPH04239129A (en) 1991-01-11 1991-01-11 Plasma processing method of semiconductor wafer

Publications (1)

Publication Number Publication Date
JPH04239129A true JPH04239129A (en) 1992-08-27

Family

ID=11512257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3001822A Pending JPH04239129A (en) 1991-01-11 1991-01-11 Plasma processing method of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPH04239129A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002100577A (en) * 2000-09-26 2002-04-05 Toshiba Corp Method and system for processing wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002100577A (en) * 2000-09-26 2002-04-05 Toshiba Corp Method and system for processing wafer

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