JPH04233039A - Data saving system - Google Patents

Abstract

PURPOSE:To avoid inefficient system construction and to save a data without disabling sweeping-out by providing a mechanism on a duplex data processor so as to read out the designated contents of the main storage device of an active system from the central processing unit (CPU) of a standby system. CONSTITUTION:At duplex data processors 10 and 11, a reading means 211 of a CPU 21 of the standby system reads out the designated contents of a main storage device 30 of the active system through a bus 00. In the case of switching the system, the detecting means 212 of the CPU 21 of this standby system detects unprocessed data remaining at the main storage device 30 of the active system. The transferring means 213 of the CPU 21 of the above- mentioned standby system transfers this unprocessed data through the bus 00 to a main storage device 31 of the standby system. Thus, the system can avoids the difficulty in being constructed physically and economically according to a conventional duplex write system, and the data can be relieved without disabling sweeping-out in the case of a sweeping-out system.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data rescue method at the time of system switching in a data processing apparatus having dual processors including a main memory device and a central processing unit.

0002

[Prior Art] Conventionally, in a multiprocessor system that performs this type of system switching, the standby central processing unit and the active main memory are loosely coupled, so it is not possible to view the inside of any active main memory. If this is not possible, and in order to rescue the data, a method is adopted in which all operations are written twice in the active main memory and standby main memory, or a method is used in which all accumulated data is flushed out onto the line. has been done.

0003

[Problems to be Solved by the Invention] In the data rescue method in the conventional multiprocessor system described above, in the case of the former dual write method, the mechanism becomes significantly large and it is difficult to realize the system configuration physically and economically. In the latter method, for example, when the other party's exchange is congested, the problem is that it is impossible to purge the data, making it impossible to switch processors or rescue data.

0004

[Means for Solving the Problems] The data rescue method of the present invention provides a system for an active processor and a standby processor in a data processing device having dual processors including a main storage device and a central processing unit. In the data rescue method at the time of switching, a bus connecting the active processor and the standby processor is configured to transfer the specified contents of the main storage device of the active system to each of the central processing units by the central processing unit of the standby system. means for reading the unprocessed data remaining in the main storage device of the active system by the central processing unit of the standby system at the time of system switching; and means for reading the unprocessed data via the bus. The configuration also includes means for transferring data to the main storage device of the system.

[0005]

Embodiment FIG. 1 is a diagram for explaining a data processing system to which an embodiment of the present invention is applied. The data processing system shown in FIG. 1 includes a bus 00 that connects the active system, standby system, and their higher-level processors, a data bus 01 that mainly handles transactions, a control bus 02 that specifies which transaction to take over, and For example, the data processing device 10 that is the active system, its standby system 11, the central processing unit 20 of the active system, the main storage device 30 of the active system, the line processing device 40 of the active system, and the bus of the active system 00, each standby central processing unit 21, main storage unit 31, line processing unit 41, bus control unit 51, and the upper processor 60 of these duplex data processing units, It consists of a line level converter 70. Each of the central processing units 20 and 21 includes reading means 201 and 211 for reading out the specified contents of the main memory of the active system by the central processing unit of the standby system, and read means 201 and 211 for reading out the specified contents of the main memory of the active system by the central processing unit of the standby system. detection means 20 for detecting unprocessed data by a standby central processing unit;
2 and 212, and transfer means 203 and 213 for transferring this unprocessed data to a standby main storage device, and these are realized by a software program. Here, in the data processing device, data received from a line is once stored in the main memory, and after being subjected to processing such as checking, is transferred to a processor that accommodates the destination line. Therefore, at a certain moment, a plurality of transactions waiting to be processed or being processed remain in the main memory of any given processor.

An example of operation in a normal sequence will be described below based on FIG.

Data received from the line passes through the level converter 70, selects the route to the current working system, and enters the line processing unit 40. After performing header checking, updating, and other procedural processing, the central processing unit 2
The buffer in main storage 30 reserved by (
(not shown), and activates the bus control device 50 to pass it to the higher-level processor 60. At this time, if the bus control device 50 is already processing the data, it is queued in a specific area in the main storage device 30 and waits for processing.

Buffers in the main memory are managed by numbers, and are designed so that when a certain number is specified, the address will be the same for both active and standby processors. Here, when the bus control device 50 wants to transmit data in a certain buffer in the main storage device 30, it takes the following steps. Using the bus 02, a transmission is started to the destination data processing device with an identification number (ID) indicating a request to take over the buffer, the buffer number, and its own address on the bus 00. For example, if the other party is the upper processor 60, when a buffer for collection is ready, the upper processor 60 uses the data bus 01 to retrieve the buffer in the main storage device 30 of the data processing device 20.

Next, the sequence at the time of system switching will be described.

[0010] Switching is performed from the upper processor 60 to the bus 01.
The active data processing device 10 receives a signal carrying a switching instruction ID via the active data processing device 10 . Upon receiving this signal, the data processing device 10 notifies each program within the data processing device 10 that the program will be switched from now on. Each program in the data processing device 10 returns a response to this notice signal when there are no programs in progress and switching becomes possible.

What is currently being processed is, for example, communication with the host processor 60 in the program of the bus control device 50, in which a request is being made to the host processor 60 via the bus 01 to retrieve data in the main storage device 30, and when the data is actually being processed. Refers to a state in which there is something that has not been taken over by the higher-level processor 60. When all the response signals to the signals sent to each program in the data processing device 10 have been returned, the current usage status of the buffer in the data processing device 10 is checked, and the current buffer usage status is checked based on the empty table in number units. The system data processing device 10 performs takeover processing for the blocked buffer number via the data bus 01. Through this process, the contents of the buffers in the active system and standby system match.

[0012] When all the transfers are completed, the standby data processing device 11 notifies the active data processing device 10 of the completion via the bus 01. Upon reception of this signal, it is determined that the processing of the active system can be continued in the standby system, and a response indicating that switching is possible is returned to the host processor 60. Upon reception of this response signal, the upper processor 6
0, it is possible to switch between the active system and the standby system, take over the buffers that were unprocessed on the old active system, and process them on the new active system.

[0013]

As explained above, the present invention provides a duplex data processing device with a mechanism that allows the standby central processing unit to read the specified contents of the active main storage device, thereby overcoming the conventional two-way system. It is possible to avoid the physical and economical difficulties of constructing a system due to the overwrite method, and to realize data rescue without being unable to flush out the data in some cases using the sweep method.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining a data processing system to which an embodiment of the present invention is applied.

[Explanation of symbols]

00 bus 01 Data bus 02 Control system bus 10, 11 Data processing device 20, 21 Central processing unit 30, 31 Main memory 40, 41 Line processing equipment 50, 51 Bus control device 60 Upper processor 70 Line level conversion device 201, 211 Reading means 202, 212 Detection means 203,213 Transfer means

Claims (1)

[Claims] Claim 1: In a data relief method when switching between an active processor and a standby processor in a data processing device having dual processors including a main storage device and a central processing unit, The processing device includes means for reading specified contents of the main storage device of the active system by the central processing unit of the standby system via a bus connecting the active system processor and the standby system processor; means for detecting unprocessed data remaining in the main storage device of the standby system by the central processing unit of the standby system; and means for transferring the unprocessed data to the main storage device of the standby system via the bus. A data rescue method characterized by: