JPH04232556A - Mounted board management system - Google Patents

Abstract

PURPOSE:To obtain a mounted board management system which is free from erroneous address setting and does not require complicated address setting. CONSTITUTION:Address data from address setting parts 161 to 16N on the side of a mother board 1 are sent to an address coincidence detecting part A2 after being temporarily stored in an address storage part A1 through a connector D. The address coincidence detecting part A2 collates address data from the address storage part A1 with address data from an address bus 11 of the mother board 1 and generates a CE (chip enable) signal only for the time of coincidence, and this CE signal is sent to a data input/output control part A3. This part A3 receives the CE signal to go to the access state and inputs and outputs data to and from a data bus 12 based on control data from a control bus 13.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention is provided in a system in which a plurality of boards are mounted on a motherboard and data is sent and received through the motherboard, and addresses are assigned to each of the plurality of boards to control access to each board. Related to a mounted board management system.

0002

[Prior Art] Generally, in information processing equipment such as optical communication equipment, a board having various data processing functions is mounted on a motherboard on which an address bus, a data bus, and a control bus are arranged, and data is transmitted through the motherboard. I am trying to send and receive. Figure 7 shows its basic configuration.

In FIG. 7, 1 is a motherboard, 21 to
2N are data processing boards each having a predetermined data processing function; 3 are boards 21 to 2N mounted on the motherboard 1;
This is a data management board that comprehensively manages the data. An address bus 11, a data bus 12, and a control bus 13 are arranged on the motherboard 1, and these are distributed and connected to connectors 141 to 14N for mounting a data processing board, respectively, and further connected to a connector 15 for mounting a data management board. has been done.

Each data processing board 21 to 2N is composed of a data input/output section A, a data processing section B, an address setting section C, etc., and has connectors 141 to 14 on the motherboard 1 side at the end.
A connector D that connects with N is attached. Then, the mounting position on the motherboard 1 is specified according to each data processing function, and an address corresponding to the mounting position is assigned in advance. However, in consideration of replacing boards due to the same function or changing the board mounting position later, the address setting section C of each board 21 to 2N is configured with a dip switch etc., and the address setting section C of each board 21 to 2N is configured with a dip switch etc. can be changed manually.

[0005] Each board 21 to 2N is connected to a connector D.
is mounted on the motherboard 1 by connecting it to the connectors 141 to 14N on the motherboard 1 side, and the address bus 11
, data bus 12, and control bus 13. Here, in the board 21, when the data input/output part B receives the address data from the motherboard 1 side, it compares it with the address data from the address setting part C, identifies its own designation, and accesses the board circuit. state. For example, if the control data from the control bus 13 is write control data, the data from the data bus 12 is sent to the data processing unit B, and if it is read control data, the data processed by the data processing unit B is sent to the data bus 12. . These structures and operations are the same for the other substrates 22 to 2N.

The data management board 3 is mounted on the motherboard 1 by being inserted into the connector 15, and accesses one of the data processing boards 21 to 2N by sending address data to the address bus 11 according to a predetermined program.
Writing control and reading control are performed through the control bus 13. Thereby, data can be sent and received to and from the board through the data bus 12.

However, in the conventional mounting board management as described above, when mounting the board on the motherboard, the address settings in the address setting section must be manually set to a value according to the mounting position, leading to setting errors. There is a high risk of this occurring. Further, even when replacing boards having the same function, address settings must be made again, making the operation complicated.

[0008]

[Problems to be Solved by the Invention] As described above, in the conventional mounted board management system, when mounting a board on a motherboard, address setting must be done manually, and there is a risk of setting errors. Even when replacing boards with the same function, the address setting must be done again, making the operation complicated.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a mounting board management system that is free from the risk of address setting errors and does not require complicated address settings.

0010

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a system in which a plurality of boards are mounted on a motherboard provided with an address bus, a data bus, and a control bus, and data is sent and received through the motherboard. In a mounted board management system that assigns addresses to each of the plurality of boards and manages access to each board, when the board is mounted on the motherboard, address data is automatically sent from the motherboard side according to the mounting position. address supply means for supplying the address to the mounting board; a storage section provided on each of the plurality of boards for storing the address supplied from the motherboard side; address identification means for identifying whether or not the motherboard has been accessed by comparing the supplied address data with the address data stored in the storage unit; The circuit board is configured to include access execution means for transmitting and receiving data with other boards through the data bus and control bus.

[0011]

[Operation] In the mounted board management system with the above configuration, just by mounting the board on the motherboard, address data corresponding to the mounting position is automatically supplied from the address supply means to the board side, and is stored in the storage section of the board. Ru.

0012

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. 1 to 4.

FIG. 1 shows its configuration. however,
In FIG. 1, the same parts as in FIG. 7 are designated by the same reference numerals.

In FIG. 1, 161 to 16N are provided on the motherboard 1, respectively, and data processing boards 21 to 2 are provided on the motherboard 1, respectively.
This is an address setting section that generates address data according to the mounting position of N. The address data generated by each address setting section 161-16N is based on the mounting position, so it can be fixed, and the data processing boards 21-21 connected to the corresponding connector 141-14N, respectively.
2N.

On the other hand, the data input/output section A of the data processing boards 21 to 2N is specifically constructed as shown in FIG. In other words, the address setting section 161 on the motherboard 1 side
The address data from ~16N is connected to connector D.
The data is temporarily stored in the address storage section A1 via the address storage section A1, and then sent to the address matching detection section A2. This address match detection section A2 compares the address data from the address storage section A1 with the address data from the address bus 11 of the motherboard 1, and generates a CE (chip enable) signal only during the period when they match. The CE signal is sent to the data input/output control section A3. The data input/output control section A3 enters an access state upon receiving the CE signal, and performs data input/output between the data buses 12 based on control data from the control bus 13.

That is, in the system having the above configuration, address setting sections 161 to 16N are provided on the motherboard 1 side to generate address data corresponding to the board mounting position in advance,
The address data generated by each address setting section 161-16N is supplied to the corresponding connector 141-14N. Therefore, by simply inserting the connectors D of the boards 21 to 2N into the connectors 141 to 14N, addresses can be set on each board according to the mounting position.

FIG. 3 shows the timing when writing data to the data processing board 21, and FIG. 4 shows the timing when reading data from the data processing board 2.

In FIG. 3, from the data management board 3 (
Address data and write data are sent out at the timings shown in a) and (c), and a write control signal is sent out at the timing shown in (d) of the figure. The data processing board 21 takes in address data through the address bus 11 and compares it with the address data from the address setting section 161. If an address match is detected here, the CE signal is generated at the timing shown in FIG. 13(b), and the data input/output section A becomes operational, and the write control signal from the control bus 13 shown in FIG. Accordingly, the data from the data bus 12 is sent to the data processing section B.

In FIG. 4, from the data management board 3 (
Address data and read control signals are sent out at the timings shown in a) and (d). The data processing board 21 takes in address data through the address bus 11 and compares it with the address data from the address setting section 161. If an address match is detected here, a CE signal is generated at the timing shown in FIG. 13(b), and the data input/output unit A becomes operational, and a write control signal from the control bus 13 shown in FIG. Accordingly, the processed data from the data processing section B is sent to the data bus 12. This means that other boards 22~
The same applies to 2N.

Therefore, the mounted board management system with the above configuration can automatically set addresses simply by mounting on the motherboard 1 without providing an address setting unit on the data processing boards 21 to 2N side. Eliminates the risk of address setting errors. Further, even when replacing boards, there is no need to reset the address, which eliminates the need for complicated operations, and it is possible to easily respond to replacements between boards, changes in mounting positions, etc. later.

It should be noted that the present invention is not limited to the above embodiment, but as shown in FIG.
61 to 16N may be grouped together on the motherboard, one address generator 17 may sequentially generate address data, and the address data may be sequentially distributed to the connectors 141 to 14N. Further, as shown in FIG. 6, this address generator 17 is provided on the address setting dedicated board 4, and this board is connected to each of the connectors 141 to 141 on the motherboard 1 via the connector 18.
It may be distributed to 14N. Alternatively, although not shown, the same effect can be obtained by providing the address generator 17 on either the data processing boards 141 to 14N or the data management board 3 and setting the address of the other board.

[0022]

[Effects of the Invention] As detailed above, according to the present invention,
It is possible to provide a mounted board management system that eliminates the risk of address setting errors and does not require complicated address settings.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a mounted board management system according to an embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of the data processing board in FIG. 1.

FIG. 3 is a timing chart for explaining a data writing operation to the data processing board in FIG. 1;

FIG. 4 is a timing chart for explaining a data read operation from the data processing board in FIG. 1;

FIG. 5 is a block diagram showing another embodiment of the mounted board management system according to the present invention.

FIG. 6 is a block diagram showing another embodiment of the mounted board management system according to the present invention.

FIG. 7 is a block diagram showing a schematic configuration of an information processing device to which the present invention is applied.

[Explanation of symbols]

1... Motherboard, 11... Address bus, 12... Data bus, 13... Control bus, 141-14N... Connector for data processing board mounting, 15... Connector for data management board mounting, 21-2N... Data processing board, A... Data Input/output section, A1...address storage section, A2...address match detection section,
A3...Data input/output control unit, B...Data processing unit, C...Address setting unit, D...Connector, 3...Data management board, 1
61-16N...address setting section, CE...chip enable, 17...address generator, 18...connector.

Claims (3)

[Claims] [Claim 1] A system in which a plurality of boards are mounted on a motherboard on which an address bus, a data bus, and a control bus are arranged, and data is transmitted and received through the motherboard,
In the mounted board management system that assigns addresses to each of the plurality of boards and manages access to each board, when the board is mounted on the motherboard, address data corresponding to the mounting position is automatically transmitted from the motherboard side to the mounted board. an address supply unit provided on each of the plurality of substrates to store an address supplied from the motherboard side; and an address supply means provided on each of the plurality of substrates and supplied through an address bus of the motherboard. address identification means for identifying whether or not the self has been accessed by comparing the address data with the address data stored in the storage unit; and when the access to the self has been identified by the means, the data bus and an access execution means for transmitting and receiving data with other boards through a control bus. 2. The mounting board according to claim 1, wherein the address supply means includes address generation means provided on the motherboard for generating address data corresponding to each board mounting position on the motherboard. management system. 3. The mounted board management system according to claim 1, wherein the address supply means is provided on one of the plurality of boards.