JPH04222030A - Active insertion/ejection testing system for device in multiplex system - Google Patents

Abstract

PURPOSE:To confirm that a whole system is not affected unfavorably at the time of actively inserting/ejecting a fault device in an active insertion/ejection test system for the device in a multiplex system. CONSTITUTION:When a certain device in the multiplex system is in a fault, the constitution of a central processing unit(CPU) in the system is changed (1) to a master CPU/slave CPU form, the condition and the start of an insertion/ ejection test are informed (2) from the master CPU to the slave CPU, and at the time of receiving the information from the master CPU, the slave CPU confirms (3) the insertion/ejection of the fault device based upon information instructing the confirmation of the insertion/ejection of the fault device applied from the master CPU while executing specific data processing by device constitution matched with the condition and then informs (4) the completion of the confirmation to the master CPU.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device active insertion/removal test method for confirming that the system as a whole is not affected in the case of testing the active insertion/removal mechanism of each device in a multiplex system.

[0002] In recent years, there has been an increase in the number of non-stop computers that have redundant equipment and can continue operating without stopping the system even if a failure occurs. In such non-stop computers, it is necessary for the system to continue operating without any adverse effects even if a fault occurs, the faulty device is removed, and a new device is installed, so a more accurate testing method for the online insertion/removal mechanism is required. requested.

0003

[Prior Art] FIG. 3 is a diagram showing a conventional system configuration, in which (a) shows an example of the configuration of a single-layer system;
b) shows an example of the configuration of a multiplex system.

In a data processing system with a so-called single configuration as shown in (a) of the figure, a certain device,
For example, even if a failure occurs in the adapter device 2, there is a problem in that it cannot continue operating in a degraded configuration and the system goes down, making it impossible to operate as a non-stop computer.

[0005] Therefore, when a failure occurs, the device stops, and currently there is no function to enable hot insertion and removal while the system is in operation.

[0006]

[Problem to be Solved by the Invention] Therefore, (b) multiplex systems as shown in the figure are increasing in number, but in such multiplex systems, if a certain device, for example, the bus handler device 3a, has a failure. When the fault occurs, the bus handler device 3a in which the fault has occurred is removed and degenerated to a single system device using the bus handler device 3b to continue operating the system.

In this case, it must be ensured that the system will not go down even if the faulty device (bus handler device 3a) is hot inserted and removed. The present invention provides a device hot insertion/removal test method that does not affect the entire system even if the faulty bus handler device is removed, and more specifically, a means for verifying the hot insertion/removal mechanism. The purpose is to

[0008]

[Means for Solving the Problems] FIG. 1 is a diagram showing the basic configuration of the present invention. The above problem is solved by a device hot insertion/removal test method for a multiplexed system configured as follows.

[0009] In a multiplex system, when performing an online insertion/removal test of a device, a device with a multiplex system 1, 2,
means for changing the configuration of the central processing unit (CPU) 1 of the multiplexed system into a master CPU 1a/slave CPU 1b format when ~ becomes a failure, and from the central processing unit (CPU) 1a of the master, The slave's central processing unit (CPU) 1b is provided with the insertion/extraction test conditions (test target device name: failed device name, etc.), means for notifying the start of the insertion/extraction test, and the slave's central processing unit (CPU) 1b.
PU) 1b, the central processing unit (CPU) of the master
Upon receiving the conditions and start notification of the online insertion/removal test from 1a, the master central processing unit (CPU) 1a performs specific data processing with a device configuration that meets the conditions.
After confirming that the faulty device has been inserted or removed, the means for confirming the insertion or removal of the faulty device based on the notification from the slave central processing unit (CPU) 1b, , a means for notifying the master central processing unit (CPU) 1a of the confirmation, and based on the notification information from the master central processing unit (CPU) 1a, the slave central processing unit (CP
U) 1 is configured to process data using an arbitrary device configuration, confirm that the faulty device has been inserted or removed, and notify the central processing unit (CPU) 1b on the master side.

0010

[Operation] In FIG. 1, 3a and 3b are bus handler devices that control the bus, 1a is a master central processing unit (CPU), and 1b is a slave central processing unit (CPU). The principle of the present invention will be explained using FIG. In this example, the case where the bus handler device 3a becomes a failure is taken as an example, and the present invention is applicable to the data processing function of the central processing unit (CPU) 1a, 1b,
By making full use of the data transfer function, system operation can be confirmed after hot insertion and removal of a faulty device.

1) To start an excerpt test of the bus handler device 3a, for example, the central processing unit (CPU) 1a with the lowest machine number is set as the master, and the other central processing unit (CPU) 1b is set as the slave. After that, from the master central processing unit (CPU) 1a to all the slave side central processing units (CPUs 2, 3, ~n) 1b, the insertion/extraction test start conditions (in this example, the failed bus handler device) 3a) and a message to start the insertion/extraction test to synchronize the operations of the two.

2) Master central processing unit (CPU)
1a outputs a message to remove the bus handler device 3a to the display screen of the system console (not shown), and sends a notification to the slave side central processing unit ( CPU) Send to 1b.

3) Each central processing unit (C
PU) 1b determines that the bus handler device 3a cannot be used based on the fault information notified above, and uses the bus handler device 3b and bus #14 to continuously perform I/O access through the adapter device 2b, and restores normal operation. By operating, it is confirmed that there is no effect on the bus #14 due to the removal of the bus handler device 3a, and a bus acquisition request is sent to the bus handler device 3a, so that the bus handler device 3a is completely removed. When it is confirmed that it has been removed, the central processing unit (CPU) 1a on the master side is notified of this.

4) In the same way as above, this time an insertion message is sent from the master central processing unit (CPU) 1a to the operator to insert the repaired or new bus handler device 3a. By outputting, the operator performs the insertion.

5) Central processing unit (CP) on the slave side
U) 1b continuously performs I/O access using the same bus handler device 3b as described above, and operates normally even if the bus handler device 3a is inserted. Bus #1
4. Confirm that there is no impact on

6) After confirming the insertion of the bus handler device 3a, all central processing units (CPUs) 1a and 1b perform I/O access or data using the test target bus (in this example, buses #0 and 4). By performing the transfer, it is confirmed that the bus #0 4 can be used.

[0017] In this way, the present invention enables all central processing units (CPUs 1a, 1b) in the system, and
By making full use of the data transfer function using the bus (#0/#1) 4 , the system operation after the online insertion/removal can be confirmed.

Therefore, by performing an operation test in a normal system while hot insertion/removal of the faulty device using the above means, it is possible to ensure that even if the faulty device is hot inserted/removed, the operation of the entire system will not be adversely affected. This has the effect of making it possible to confirm the following.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Examples of the present invention will be described below in detail with reference to the drawings. The above-mentioned FIG. 1 is a diagram showing the principle configuration of the present invention, and FIG. 2 is a diagram showing an embodiment of the present invention in the form of a flowchart.

In the present invention, when a device in a multiplex system becomes a failure, the central processing unit (
(hereinafter referred to as CPU) 1 is the master CPU 1a /
The configuration is changed to the slave CPU 1b format, and the master CPU 1a notifies the slave CPU 1b of the insertion/extraction test conditions and start.
At the time when the notification from the master CPU 1a is received, specific data processing is performed with the device configuration that meets the conditions, based on the notification from the master CPU 1a instructing confirmation of insertion/removal of the faulty device. , After confirming insertion/removal of the faulty device (1), means for notifying the master CPU 1c from the slave CPU 1b of the confirmation is a necessary means for carrying out the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

Hereinafter, referring to FIG. 1 and FIG. 2, a device hot insertion/removal test method in the multiplex system of the present invention will be explained. In Figure 2, (a) is the master CPU
1a shows the operation, and (b) shows the operation of slave CPU1.
b shows the operation.

a. First, in a multiplex system, when a failure occurs in the bus handler device 3a, for example, the CPU with the lowest machine number among the plurality of CPUs 1 is
1a is the master CPU that takes initiative in the test, and the other CPU 1b is the slave CPU.
From U 1a to slave CPU 1b, the conditions of the device extraction test, for example, bus handler device 3a and bus #0 4, are applied to the slave CPU 1b using the data transfer means using the normal system (that is, bus #1 4). Notify the conditions to be tested and the start of the equipment excerpt test. (See steps 100 and 105) b. Master CPU 1
The slave CPU 1b other than a continuously performs I/O access via the adapter device 2b, for example, using a bus that is not subject to testing (in this embodiment, bus #1 4). (See step 106) c. The master CPU 1a outputs an instruction to remove the faulty bus handler device 3a connected to the #0 system bus 4 on the display screen of the system console (not shown).

The operator removes the faulty bus handler device 3a based on the instructions on the display screen. (Steps 101, 102
Reference) d. The above action c. In order to confirm that the bus handler device 3a has been removed from the entire system, use the other bus (in this example, bus #1 4) to connect the master CPU 1a to the other slave CPUs.
1b, a message is forwarded to confirm the sampling. (See step 103) e. Slave CPU notified by the message
1b confirms that the bus #0 4 is unusable because the bus handler device 3a is removed and cannot be accessed using the bus #0 4 on the removed side. Also, confirm that there is no effect on the other bus #1 4 when the bus handler device 3a is removed by confirming that the above-mentioned continuous I/O access ends normally. (See steps 107, 108, and 109) When the slave CPU 1b completes the confirmation of the removal, it sends a confirmation completion message to the master CPU 1a. (Step 1
10) Similarly, the bus handler device 3a
Even when inserting the

f. After checking the above test with all CPUs, the master CPU 1a to other slave CPUs 1b
The bus handler device 3a is notified of the start of the insertion test using the normal data transfer means.

g. The slave CPU 1b continuously performs I/O access using the bus (bus #1 4) not subject to the test. h. The master CPU 1a displays the faulty bus handler device 3a connected to the #0 system bus 4 on the display screen of the system console (not shown).
Output to insert.

The operator inserts the bus handler device 3a based on the instructions on the display screen. i. In order to confirm that the bus handler device 3a has been inserted into the system, the other bus #1
4, the master CPU 1a sends a message instructing the insertion confirmation to the other slave CPU 1b using the normal system data transfer means.

[0027]j. The slave CPU 1b that has received the message confirms that the bus handler device 3a can be inserted and that the bus #0 4 can be used. Also, make sure that there is no effect on the other bus #1 4 when the device is inserted, and the adapter device 2b
This is confirmed by the normal completion of continuous I/O access using the system.

k. After confirming the insertion of the bus handler device 3a, all CPUs 1a and 1b access the I/O using the test target bus (in this example, the above buses #0 and 4).
Alternatively, by performing data transfer,
Check that #04 can be used.

In the above embodiment, the case where the bus handler device 3a became a failure was explained as an example.
It goes without saying that the problem is not limited to the failure of the bus handler devices 3a and 3b.

For example, the adapter device 2a or 2b
In case of a failure, the bus handler device 3a or
The hot insertion and removal test for the adapter device 2a or 2b can be performed using the same procedure as the hot insertion and removal test for the CPU 3b, but for the CPUs 1a and 1b, the device is
Since it is connected to both 0/1 4, the fault C
Disconnect PU 1a or 1b from bus #0/1 4 and connect the two buses from all other CPUs 1.
#0/1 4 can be used together, for example, an online insertion/removal test can be performed using a procedure that tests continuous I/O access via the adapter devices 2a and 2b.

[0031] In this way, the present invention enables all central processing units (CPUs 1a, 1b) in the system, and
The feature is that the system operation after the online insertion/removal is confirmed by making full use of the data transfer function using the bus (#0/#1) 4 .

[0032]

As explained above in detail, the device hot insertion/removal test method in a multiplex system of the present invention is effective when a device in a multiplex system becomes in trouble, the system's central processing unit (CPU) The configuration is changed to master/slave format, and the master CPU notifies the slave CPU of the conditions and start of the insertion/extraction test.When the slave CPU receives the notification from the master CPU, it meets the conditions. After confirming the insertion/removal of the faulty device based on a notification from the master CPU instructing confirmation of the insertion/removal of the faulty device while performing specific data processing, for example, continuous I/O access with the device configuration. , the slave CPU confirms that
Since the system notifies the master CPU from be.

[Brief explanation of the drawing]

[Figure 1] Principle configuration diagram of the present invention

[Fig. 2] A diagram showing an embodiment of the present invention in the form of a flowchart.

[Figure 3]
Diagram showing the conventional system configuration

[Explanation of symbols]

1 Central processing unit (CPU)
1a Master CPU 1b Slave CPU
2, 2a, 2b Adapter device 3, 3a, 3b Bus handler device
4 Bus #0/#1100 ~ 111 are steps

Claims (1)

[Claims] Claim 1: In a multiplex system, a device (1, 2,
~) means for changing the configuration of the central processing unit (CPU) (1) of the multiplexed system into a master CPU (1a)/slave CPU (1b) format when a failure occurs (■)
and the central processing unit (CPU) (1a) of the master.
means for notifying the slave central processing unit (CPU) (1b) of the conditions for the insertion/removal test and the start of the test (■
) and the central processing unit (CPU) of the slave (1b
), and the central processing unit (CPU) (1a) of the master
At the time of receiving the conditions and start notification of the online insertion/removal test from
means for confirming the insertion and removal of the faulty device based on a notification from the controller (■) and the slave central processing unit (CPU) (1b) that the faulty device has been inserted and removed. After confirming this, a means (■) for notifying the master central processing unit (CPU) (1a) of the confirmation is provided, and notification information from the master central processing unit (CPU) (1a) is provided. On the basis of the,
The central processing unit (CPU) (1b) on the slave side processes data using any device configuration, and also confirms that the faulty device has been inserted or removed.
(1a) A device hot insertion/removal test method in a multiplexed system characterized by notifying the CPU) (1a).