JPH042125A - Surface treatment of silicon - Google Patents

Surface treatment of silicon

Info

Publication number
JPH042125A
JPH042125A JP10355490A JP10355490A JPH042125A JP H042125 A JPH042125 A JP H042125A JP 10355490 A JP10355490 A JP 10355490A JP 10355490 A JP10355490 A JP 10355490A JP H042125 A JPH042125 A JP H042125A
Authority
JP
Japan
Prior art keywords
silicon
halogen
low
halogen atoms
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10355490A
Other languages
Japanese (ja)
Inventor
Satoru Watanabe
悟 渡邉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10355490A priority Critical patent/JPH042125A/en
Publication of JPH042125A publication Critical patent/JPH042125A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To remove halogen atoms covering an Si surface at a low temperature, and to contribute the title surface treating method to the fining of a device by a low-temperature process by reacting halogen atoms covering the Si surface with silicon hydride radicals and removing halogen atoms in vapor phase as halogen hydride molecules. CONSTITUTION:When a silicon hydrogen radical is brought near to an Si surface covered with a halogen atom X, the silicon hydrogen radical is inserted into the Si surface and an Si-Si bond is formed, and the halogen atom X is discharged into vapor phase as halogen hydride through low-temperature heat treatment at approximately 650 deg.C. As the result of the reaction, the Si surface is covered with hydrogen atoms, but there is no trouble because hydrogen is removed through heat treatment at approximately 650 deg.C.

Description

【発明の詳細な説明】 〔概要〕 シリコン(Si)の表面処理方法に係り、特にSi表面
を覆うハロゲン原子の低温除去方法に関し。
DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a method for surface treatment of silicon (Si), and in particular to a method for low-temperature removal of halogen atoms covering the surface of Si.

〔産業上の利用分野〕[Industrial application field]

本発明はシリコン(St)の表面処理方法に係り。 The present invention relates to a method for surface treatment of silicon (St).

特にSi表面を覆うハロゲン原子の低温除去方法に関す
る。
In particular, the present invention relates to a method for low-temperature removal of halogen atoms covering the Si surface.

近年、デバイスの微細化にともない、Siデ)<4スの
製造プロセスにおいても低温プロセスが要望される。
In recent years, with the miniaturization of devices, low-temperature processes are also required in the manufacturing process of Si devices.

そのため、成膜前のStウェハの表面に生成する自然酸
化膜の除去に、ハロゲンを用いたエツチングを行ってい
るが、その際にSi表面を覆うハロゲン原子の低温除去
方法として本発明を利用することができる。
For this reason, etching using halogen is used to remove the natural oxide film that forms on the surface of the St wafer before film formation, and the present invention can be used as a low-temperature method for removing halogen atoms covering the Si surface. be able to.

面がハロゲン原子で覆われてしまい、これを除去するた
めには750°C以上の熱処理を必要とする。
The surface is covered with halogen atoms, and heat treatment at 750°C or higher is required to remove them.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明はSi表面をハロゲンエツチングし−た際。 In the present invention, the Si surface is subjected to halogen etching.

Si表面を覆うハロゲン原子の低温除去方法を提供して
、低温プロセスによるデバイスの微細化に寄与すること
を目的とする。
The present invention aims to provide a low-temperature removal method for halogen atoms covering the Si surface, thereby contributing to miniaturization of devices through low-temperature processes.

〔従来の技術〕[Conventional technology]

低温でSiのホモエピタキシーを行おうとする場合、成
長前にSi表面を覆うSi酸化膜の除去が必要である。
When attempting to homoepitaxy Si at low temperatures, it is necessary to remove the Si oxide film covering the Si surface before growth.

このために、高温での処理は可能であるが。For this reason, processing at high temperatures is possible.

750〜1000°Cの温度を必要とするため、デバイ
ス形成の上で制約となっていた。
Since it requires a temperature of 750 to 1000°C, it has been a constraint on device formation.

一方、低温での酸化膜の除去は、塩素(CI)や弗素(
F)等のハロゲンを用いてSi酸化膜をエツチング除去
する試みがなされている。
On the other hand, oxide film removal at low temperatures is possible using chlorine (CI) or fluorine (
Attempts have been made to remove the Si oxide film by etching using a halogen such as F).

しかし、この場合の欠点はエツチング後の31表〔課題
を解決するための手段〕 上記課題の解決は。
However, the drawback in this case is Table 31 after etching [Means for Solving the Problem] The solution to the above problem is as follows.

■)シリコン表面を覆うハロゲン原子を除去する方法で
あって、シリコン水素ラジカルを該シリコンと反応させ
、水素化ハロゲンとして気相中に除去するシリコンの表
面処理方法、あるいは2)ハロゲンを含むガスによりシ
リコン表面の自然酸化膜をエツチング除去した後に行う
上記1)記載のシリコンの表面処理方法、あるいは3)
シリコンのエピタキシャル成長を行う前に行う上記l)
記載の記載のシリコンの表面処理方法により達成される
(2) A silicon surface treatment method for removing halogen atoms covering the silicon surface, in which silicon hydrogen radicals are reacted with the silicon and removed in the gas phase as hydrogenated halogen, or (2) A method for removing halogen atoms covering the silicon surface. The silicon surface treatment method described in 1) above, which is carried out after removing the natural oxide film on the silicon surface by etching, or 3)
The above l) performed before epitaxial growth of silicon.
This is achieved by the silicon surface treatment method described herein.

〔作用〕[Effect]

本発明は、Si表面を覆うハロゲン原子をシリコン水素
化物ラジカルと反応させて、水素化ハロゲン分子として
気相中に除去するようにしたものである。
In the present invention, halogen atoms covering the Si surface are reacted with silicon hydride radicals and removed as hydrogenated halogen molecules into the gas phase.

このときの反応は第1図のようになる。The reaction at this time is as shown in Figure 1.

第1図(a)〜(C)は本発明の原理説明図である。FIGS. 1(a) to 1(C) are diagrams explaining the principle of the present invention.

第1図(a)において、ハロゲン原子Xで覆われたSi
表面にシリコン水素ラジカル(:5iHz)を接近させ
ると、第1図(ロ)のようにシリコン水素ラジカルはS
i表面にインサートされて5t−Si結合を形成し、そ
の後、650°C程度の低温熱処理により第1図(C)
のようにハロゲン原子Xは水素化ハロゲン(HX)とな
って気相中に放出される。
In FIG. 1(a), Si covered with halogen atoms
When silicon hydrogen radicals (:5iHz) are brought close to the surface, the silicon hydrogen radicals become S as shown in Figure 1 (b).
Figure 1 (C)
The halogen atom X becomes a hydrogenated halogen (HX) and is released into the gas phase.

この反応の結果、 Si表面は水素原子で覆われること
になるが、水素は650°C程度の熱処理で除去される
ことが分かっているので問題はない。
As a result of this reaction, the Si surface is covered with hydrogen atoms, but it is known that hydrogen can be removed by heat treatment at about 650°C, so there is no problem.

また、この反応の結果、Si層が1層増えることになる
が、このことはデバイス形成上の問題にはならない。
Further, as a result of this reaction, the number of Si layers increases by one layer, but this does not pose a problem in device formation.

〔実施例〕〔Example〕

第2図は本発明の一実施例を説明する処理装置の模式断
面図である。
FIG. 2 is a schematic sectional view of a processing apparatus for explaining an embodiment of the present invention.

図において、1は反応室、2は反応ガスの導入口、3は
排気口、4はウェハ台、5は加熱ヒータ。
In the figure, 1 is a reaction chamber, 2 is a reaction gas inlet, 3 is an exhaust port, 4 is a wafer stand, and 5 is a heater.

6はマイクロ波発振・共振器、Wは被処理Stウェハで
ある。
6 is a microwave oscillator/resonator, and W is a St wafer to be processed.

実施例で留意する点はつぎの2点である。The following two points should be noted in the embodiment.

■ シリコン水素ラジカルを生成させる■ Stの不要
な成長を抑制する 上記の■に対して、実施例では次の2通りの方法を用い
た。
(2) Generating silicon hydrogen radicals (2) Suppressing unnecessary growth of St In response to the above (2), the following two methods were used in the examples.

(a)  モノシラン(SiH2)のマイクロ波プラズ
マによるシリコン水素ラジカルの生成 (b)  四弗化シリコン(SiF4)と水素(H2)
のマイクロ波プラズマによるシリコン水素ラジカルの生
成 上記の■に対しては、H2による反応ガスの希釈。
(a) Generation of silicon hydrogen radicals by microwave plasma of monosilane (SiH2) (b) Silicon tetrafluoride (SiF4) and hydrogen (H2)
Generation of silicon hydrogen radicals by microwave plasma.For ① above, dilute the reaction gas with H2.

Sin、の添加によって処理時間を調整すれば+Siの
不要な成長を抑制することができる。
By adjusting the processing time by adding Sin, unnecessary growth of +Si can be suppressed.

なお、弗素(Fg)ガスはSt酸化膜除去のためのエツ
チングガスである。
Note that fluorine (Fg) gas is an etching gas for removing the St oxide film.

つぎに、 Siウェハのハロゲンエツチングからシリコ
ン水素ラジカル処理までの具体的な条件例について記載
する。
Next, specific examples of conditions from halogen etching of a Si wafer to silicon hydrogen radical treatment will be described.

i)ハロゲンエツチング F2の流量:  10 SCCM F2の圧カニ  10 Torr ウェハ温度:25°C 処理時間:  5分 1i−a) シリコン水素ラジカルの反応H2の流量:
  5005CCFI SiH<の流量:   0.I SCCMガス圧カニ 
  0.I Torr ウェハ温度:500°C マイクロ被電カニ   IKW/ウェハ処理時間:10
分 1i−b) シリコン水素ラジカルの反応H2の流量:
  500 SCCM SiFaの流量:   0.I SCCMガス圧カニ 
  0.I Torr ウェハ温度:500°C マイクロ被電カニ   IKW/ウェハ処理時間:10
分 ij)水素化ハロゲンの除去 H2の流量: 1ooo SCCM ウェハ温度:500°C 加熱時間:  5分 第3図は本発明の他の実施例を説明する処理装置の模式
断面図である。
i) Halogen etching F2 flow rate: 10 SCCM F2 pressure crab 10 Torr Wafer temperature: 25°C Processing time: 5 minutes 1i-a) Silicon hydrogen radical reaction H2 flow rate:
Flow rate of 5005CCFI SiH<: 0. I SCCM gas pressure crab
0. I Torr Wafer temperature: 500°C Micro-electrified crab IKW/Wafer processing time: 10
min 1i-b) Flow rate of reaction H2 of silicon hydrogen radicals:
500 SCCM SiFa flow rate: 0. I SCCM gas pressure crab
0. I Torr Wafer temperature: 500°C Micro-electrified crab IKW/Wafer processing time: 10
min ij) Removal of hydrogenated halogen H2 flow rate: 1 ooo SCCM Wafer temperature: 500°C Heating time: 5 minutes FIG. 3 is a schematic cross-sectional view of a processing apparatus illustrating another embodiment of the present invention.

図において、1は反応室、 IAは合成石英の窓。In the figure, 1 is the reaction chamber and IA is the synthetic quartz window.

2は反応ガスの導入口、3は排気口、4はウェハ台、5
は加熱ヒータ、7は低圧水銀灯、Wは被処理Siウェハ
である。
2 is a reaction gas inlet, 3 is an exhaust port, 4 is a wafer stand, 5
is a heater, 7 is a low-pressure mercury lamp, and W is a Si wafer to be processed.

この例は、ジシラン(SiJ6)の低圧水銀灯によりシ
リコン水素ラジカルを生成している。
In this example, silicon hydrogen radicals are generated using a low-pressure mercury lamp of disilane (SiJ6).

その他のガスは第2図の例と同様である。Other gases are the same as in the example shown in FIG.

つぎに、Siウェハのハロゲンエツチングがらシリコン
水素ラジカル処理までの具体的な条件について記載する
Next, specific conditions from halogen etching of the Si wafer to silicon hydrogen radical treatment will be described.

1)ハロゲンエツチング 第2図の例と同様 11)シリコン水素ラジカルの反応 H2の流量: 1000 SCCM Si、H,の流量:   0.I SCCMSin、の
流it :   0.055CCMガス圧カニ 200
 Torr ウェハ温度:  500℃ 低圧水銀打電カフ  3KH/ウ工ハ 処理時間;10分 iii )水素化ハロゲンの除去 第2図の例と同様 〔発明の効果〕 以上説明したように本発明によれば、 Si表面をハロ
ゲンエツチングした際+Sz表面を覆うハロゲン原子の
低温除去が可能となり、低温プロセスによるデバイスの
微細化に寄与することができる。
1) Halogen etching Same as the example in Figure 2 11) Reaction of silicon hydrogen radicals Flow rate of H2: 1000 SCCM Flow rate of Si, H,: 0. I SCCMSin, flow: 0.055CCM gas pressure crab 200
Torr Wafer temperature: 500°C Low-pressure mercury electric cuff 3KH/wafer processing time: 10 minutes iii) Removal of hydrogenated halogen Same as the example in FIG. 2 [Effects of the invention] As explained above, according to the present invention, When the Si surface is subjected to halogen etching, the halogen atoms covering the +Sz surface can be removed at a low temperature, contributing to miniaturization of devices by low-temperature processes.

例えば、Siのエピタキシャル成長が650°Cで実現
でき、浅い接合や結晶欠陥の少ないエピタキシャル成長
が可能となる。
For example, epitaxial growth of Si can be realized at 650° C., making it possible to achieve shallow junctions and epitaxial growth with few crystal defects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(C)は本発明の原理説明図。 第2図は本発明の一実施例を説明する処理装置の模式断
面図。 第3図は本発明の他の実施例を説明する処理装置の模式
断面図である。 図において。 1は反応室。 2は反応ガスの導入口。 3は排気口。 4はウェハ台。 5は加熱ヒータ。 6はマイクロ波発振・共振器。 7は低圧水銀灯。 Wは被処理Stウェハ Hx (α)接近 (b)インサート (C)9定 派理 説明図 第 閃
FIGS. 1(a) to 1(C) are diagrams explaining the principle of the present invention. FIG. 2 is a schematic cross-sectional view of a processing device illustrating an embodiment of the present invention. FIG. 3 is a schematic sectional view of a processing apparatus for explaining another embodiment of the present invention. In fig. 1 is a reaction chamber. 2 is an inlet for reactant gas. 3 is the exhaust port. 4 is a wafer stand. 5 is a heater. 6 is a microwave oscillator/resonator. 7 is a low pressure mercury lamp. W is St wafer to be processed Hx (α) Approach (b) Insert (C) 9th theorem explanatory diagram flash

Claims (1)

【特許請求の範囲】 1)シリコン表面を覆うハロゲン原子を除去する方法で
あって、シリコン水素ラジカルを該シリコンと反応させ
、水素化ハロゲンとして気相中に除去することを特徴と
するシリコンの表面処理方法。 2)ハロゲンを含むガスによりシリコン表面の自然酸化
膜をエッチング除去した後に行うことを特徴とする請求
項1記載のシリコンの表面処理方法。 3)シリコンのエピタキシャル成長を行う前に行うこと
を特徴とする請求項1記載のシリコンの表面処理方法。
[Claims] 1) A method for removing halogen atoms covering a silicon surface, which comprises reacting silicon hydrogen radicals with the silicon and removing them as hydrogenated halogens into a gas phase. Processing method. 2) The silicon surface treatment method according to claim 1, wherein the silicon surface treatment is carried out after a natural oxide film on the silicon surface has been etched away using a gas containing halogen. 3) The method for surface treatment of silicon according to claim 1, characterized in that the treatment is carried out before epitaxial growth of silicon.
JP10355490A 1990-04-19 1990-04-19 Surface treatment of silicon Pending JPH042125A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10355490A JPH042125A (en) 1990-04-19 1990-04-19 Surface treatment of silicon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10355490A JPH042125A (en) 1990-04-19 1990-04-19 Surface treatment of silicon

Publications (1)

Publication Number Publication Date
JPH042125A true JPH042125A (en) 1992-01-07

Family

ID=14357042

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10355490A Pending JPH042125A (en) 1990-04-19 1990-04-19 Surface treatment of silicon

Country Status (1)

Country Link
JP (1) JPH042125A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0613333A (en) * 1992-02-18 1994-01-21 Nec Corp Thermal cvd method
JPH08260443A (en) * 1995-03-27 1996-10-08 Kiso Kogyo Kk Method of water-channel forming construction and water channel formed by method of construction thereof
WO2013171988A1 (en) * 2012-05-16 2013-11-21 株式会社アルバック Film deposition method and film deposition apparatus
JP2014053643A (en) * 2006-03-31 2014-03-20 Tokyo Electron Ltd Removal of oxide using fluorine and hydrogen in order

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0613333A (en) * 1992-02-18 1994-01-21 Nec Corp Thermal cvd method
JPH08260443A (en) * 1995-03-27 1996-10-08 Kiso Kogyo Kk Method of water-channel forming construction and water channel formed by method of construction thereof
JP2014053643A (en) * 2006-03-31 2014-03-20 Tokyo Electron Ltd Removal of oxide using fluorine and hydrogen in order
WO2013171988A1 (en) * 2012-05-16 2013-11-21 株式会社アルバック Film deposition method and film deposition apparatus
US20140287588A1 (en) * 2012-05-16 2014-09-25 Ulvac, Inc. Deposition Method and Deposition Apparatus
JPWO2013171988A1 (en) * 2012-05-16 2016-01-12 株式会社アルバック Film forming method and film forming apparatus

Similar Documents

Publication Publication Date Title
JPS61127121A (en) Formation of thin film
JPH07169693A (en) Horizontal low-pressure cvd device and its cleaning method
JPH04233734A (en) Fluorization silicon nitride adhesion method
JPH042125A (en) Surface treatment of silicon
JPS621565B2 (en)
JP2874241B2 (en) Dry cleaning method for semiconductor device
JPH11162875A (en) Manufacture of semiconductor device
JPS63129633A (en) Surface treatment for semiconductor
JPS62272540A (en) Manufacture of semiconductor
JPH0410621A (en) Etching-processing method for silicon nitride film, and its device
JPH09102490A (en) Manufacture of semiconductor device and semiconductor manufacturing apparatus
CN109962006A (en) SiC wafer on-line machining method
JPS6277466A (en) Formation of thin film
JPH0432228A (en) Dry etching method and manufacture of semiconductor device using it
JPS5941773B2 (en) Vapor phase growth method and apparatus
JPH04258115A (en) Manufacture of semiconductor substrate
JPH02111867A (en) Method for depositing a metal onto a silicon substrate
JPS62160732A (en) Forming method for silicon oxynitride films
JP2001102345A (en) Method and device for treating surface
JPH04290219A (en) Method of forming polycrystalline silicon film
JPH06163484A (en) Semiconductor manufacturing device
JPS60227415A (en) Vapor growth apparatus
JPH03255615A (en) Manufacture of semiconductor device
JPH0472727A (en) Gas cleaning process
JPS6234139B2 (en)