JPH0421147Y2 - - Google Patents

Description

[Detailed description of the invention] [Summary] This invention is an address conversion control device configured to sequentially store data transmitted from a host in a buffer and read out the data stored in the buffer in a desired order. Generates an address signal for storing and reading data into the buffer, supplies the generated address signal to the buffer to write data, and
By shifting the generated address signal in a circular manner and reading the written data for each predetermined bit, high-speed processing, for example, printing processing in a predetermined color corresponding to data transmitted from the host is performed. That's what I do.

[Industrial application field]

The present invention relates to an address conversion control device configured to sequentially read out data written in a buffer at high speed, skipping every predetermined address.

[Problems that conventional technology and ideas try to solve]

Conventionally, there is a color printer that receives color print data transmitted from a host, sequentially stores it in a buffer, and then reads out predetermined color print data from the buffer in a manner that skips over it to perform color printing. In this case, to print in color,
DMA transfer is used to transmit large amounts of data at high speed, and since each primary color has an independent plane, data is transferred from the host for each plane and stored separately in blocks for each primary color during buffering. be done. i.e. yellow plain and cyan
If there are a plane, a magenta plane, and a color intensity I plane, for example, data corresponding to the yellow plane is first stored in the yellow plane corresponding section, and then the color intensity I plane is stored in the same way. Data corresponding to the plane is stored in the color intensity I-plane correspondence section.

For this reason, to perform color printing, a predetermined amount of data is required from each plane corresponding portion, for example, yellow Y ₁ , cyan C ₁ , magenta M ₁ , color intensity I ₁ , yellow Y ₂ , cyan C ₂ , magenta M ₂ , color intensity I ₂ ,
There was a problem in that it was necessary to read data corresponding to each primary color in a sequential skipping manner from a distant position and print in color, which required a lot of processing time during printing.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention supplies a generated address signal to a buffer to sequentially write data, and also shifts the generated address signal in a circular manner so that the written data can be written in a predetermined manner. It is read out bit by bit.

FIG. 1 shows the basic configuration diagram of the present invention.

In FIG. 1, a buffer 1 receives and stores data transmitted from a host 5 via a communication line.

The address generator 2 generates addresses for sequentially writing or reading data into the buffer 1.

The address converter 3 generates an address signal for writing received data into the buffer 1 and an address signal for reading out the written data in a manner that skips every predetermined bit.

[Effect]

The configuration shown in FIG. 1 is adopted, and the data transmitted and received from the host 5 via the communication line corresponds to the address signal supplied from the address generator 2 to the buffer 1 via the address converter 3. The area is written sequentially. That is, consecutive addresses are written to each plane corresponding portion corresponding to each image plane. Next, the data stored in the buffer 1 is read out using an address signal generated by the address generator 2, for example, an address signal obtained by shifting the address signal _A0 to _A12 by a predetermined bit cycle. That is, in the above example, the predetermined amount of data from each plane corresponding part is Y ₁ ,
C ₁ , M ₁ , I ₁ , Y ₂ , C ₂ , M ₂ , I ₂ . . . are read out. This makes it possible to read out the stored data for each predetermined bit and process it at high speed. For example, it becomes possible to perform color printing processing at high speed using a color inkjet printer.

〔Example〕

The configuration and operation of one embodiment of the present invention will be described in detail with reference to FIGS. 2 and 3.

In FIG. 2, a buffer memory 1-1 temporarily stores data transmitted from the host 5, and desired data is accessed by, for example, address signals _A0 to _A12 . be. At this time, the data is transferred to the data bus shown in the figure.
Supplied via DB ₀ to DB ₇ . Furthermore, RD/
The WR signal is a signal for reading/writing data from the buffer memory 1-1, and the enable signal is for selecting the buffer memory 1-1.

Address converters 3-1 to 3-4 pass address signals A0 to _A12 supplied from address buses _{AB0 to AB12 as} they are,
This generates a 2-bit shifted signal in a circular manner. Each of the generated address signals is supplied to buffer memory 1-1. By selecting the number of bits to be shifted in this circular manner, it is possible to supply the buffer memory 1-1 with an address signal skipped by a desired number of bits.

Next, the operation of the configuration shown in FIG. 2 will be explained.

First, a case will be described in which the switching signal in the figure is set to, for example, an H level and data transmitted from the host 5 is stored in the buffer memory 1-1. In this state, address converters 3-1 to 3-4
The address signals A ₀ to A ₁₂ input from the address generator 2 via the address bus to the terminals 1B to 4B in the address converter 3-1
or 3-4, buffer memory 1-
1. Therefore, the data input via the illustrated data bus is stored in the buffer memory 1-1.
For example, they are stored sequentially. As a result, data transmitted from the host 5 at high speed by DMA transfer is transferred to the buffer memory 1-1.
stored inside.

Next, a case will be described in which the switching signal in the figure is set to the L level, for example, and predetermined data is read from the buffer memory 1-1 in a so-called skipping manner. In this state, the address signals A ₀ to A ₁₂ inputted from the address generator 2 via the address bus to the terminals 1A to 4A in the address converters 3-1 to 3-4 are circulated to the terminals 1A to 4A in a circulating manner. Bit shifted and output, buffer memory 1-
1. Therefore, buffer memory 1-
Data from addresses skipped every 2048 addresses from 1 to 1 will be read out sequentially. As a result, as shown in the upper part of FIG. 3, Y data, C data, M data, and I data that have been continuously written to a predetermined address, for example, 2048 addresses, are
As shown in the lower part of Figure 3, Y ₁ , C ₁ , M ₁ , I ₁ ,
Since Y ₂ , C ₂ , M ₂ , I ₂ , ... are read out in the order of high speed, it is possible to use a color inkjet printer to jet each color ink at high speed and perform color printing processing at high speed. Become.

[Effect of idea]

As explained above, according to the present invention, the generated address signal is supplied to the buffer to sequentially write data, and the generated address signal is shifted in a circular manner to write the written data to a predetermined bit. Since a configuration is adopted in which the data is read out at every predetermined bit interval, desired data stored separately in predetermined bits can be read out at high speed and processed, for example, color printing can be performed using a color inkjet printer.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the basic configuration of the present invention, FIG. 2 is a diagram showing the configuration of an embodiment of the main part of the present invention, and FIG. 3 is an explanatory diagram of the operation of the present invention. In the figure, 1 is a buffer, 2 is an address generator, and 3 is a buffer.
4 represents an address conversion unit, 4 represents an I/F, and 5 represents a host.

Claims (1)

[Scope of Claim for Utility Model Registration] In an advice conversion control device configured to sequentially store transmitted data in a buffer and read out the data stored in the buffer in a desired order, corresponding to a plurality of image planes, A buffer to which consecutive addresses are assigned to each plane, an address generation section that generates an address signal for storing and reading transmitted data in the buffer, and an address signal generated by this address generation section. and an address conversion unit that supplies the address signal to the buffer to write the data, and reads out the written data every predetermined bit by shifting the generated address signal in a circular manner, The buffer is configured to sequentially write the data transmitted using the address signal into each plane corresponding part of the buffer, and to read out the data written to each plane corresponding part for each predetermined bit of each plane corresponding part. An address translation control device characterized by: