JPH04207417A - External dc drive and internal ac drive type josephson integrated circuit - Google Patents

Abstract

PURPOSE:To quicken a speed of clock of a Josephson circuit by converting a DC current inputted from the outside of a chip into an AC current in the chip. CONSTITUTION:DC currents 103, 104 inputted from the outside of a chip are converted into a AC current by a regulator 100 comprising DC drive type Josephson elements 151-154 in the chip and the AC current drives AC drive Josephson circuits 120, 130 on the same chip. Then a series parallel connection circuit comprising Josephson elements 151-154 connected in series and in parallel is inserted to a buffle circuit in place of two magnetic flux coupling Josephson elements implementing complementary switching to obtain an output voltage by a multi-stage of Josephson elements thereby increasing an output voltage of the entire DC power supply drive gate. Thus, high circuit integration for the integrated circuit is attained and a high speed operation of the circuit is realized.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a Josephson logic circuit composed of superconducting Josephson elements, and in particular to an external DC internal circuit configured to supply only DC power from outside the chip. Concerning AC driven Josephson integrated circuits.

[Conventional technology]

The structure of a typical conventional DC-powered Josephson logic circuit is described by N.F. Hebard, L.F. Dunkleberger, and T.N. Fulton; E-Transactions on Magnetics MG-Volume 15, January 1979, pp. 408-411 (A, F, Hebard, S, S, Pei, L,
N., Dunkleberger, and T., A., Fu.
lton;“A DC Powered Josephs
on Flip-Flop,” IEEE Trans.
, on Magnetics, Vol, MAG-
15゜pρ, 408-4M, 'January, 1
979).

The structure of the circuit disclosed in the above-mentioned Hebard literature is
It is shown in Figure 7. In the figure, a flux-coupled Josephson element 21
Two units, 01 and 2102, are connected in series, and by setting operating conditions such that one of them switches from a superconducting state to a voltage state, the other switches from a voltage state to a superconducting state. It has been realized. A DC drive circuit having such a configuration is called a baffle circuit. It is shown that by providing a plurality of control input lines 2103 for each of these two Josephson elements and utilizing the threshold logic function of the pixel element for each input, it is possible to realize a DC power-driven ○R gate or an AND gate. ing. Furthermore, since a negative signal can also be generated by reversing the coupling direction of the input signal lines, arbitrary combinational circuits and sequential circuits can be realized.

However, in Hebard's circuit, a magnetic flux coupling type Josephson element must be used, and a resistance coupling type element cannot be used. Resistance-coupled Josephson devices generally occupy a smaller area and have faster switching speeds than magnetic flux-coupled devices.

Takada et al. pointed out that it has advantages such as being resistant to magnetic flux traps (Japanese Patent Laid-Open No. 56-032830). However, resistance-coupled devices can only be driven by an AC power source.

A disadvantage of AC power supply driving is that it is difficult to supply a large amplitude, high frequency power supply current equal to that of the clock into the chip with stable phase alignment.

DC power supply operation, on the other hand, does not have the problem of difficulty in supplying power to the chip.

On the other hand, when looking at the output amplitude of conventional DC power supply type devices, it is possible to extract a current amplitude of several tens of μA to several mA from the load inductance by adjusting the threshold characteristics of the Josephson element. It is possible.

However, the output voltage is determined by the electrode material of the Josephson junction, and in typical niobium-based Josephson junctions, the load resistance is 2106 or 2107.
The problem is that it is difficult to obtain a voltage of about 2 mV across the terminal, and it is difficult to interface directly with a semiconductor circuit.

Hideo Suzuki, Junki Inoue, and Ken Imamura have developed a method for connecting two series-connected Josephson elements in parallel and extracting the amplified output voltage from both ends.

Shinya Hasuo; “Josephson IC-Semiconductor IC Interface Circuit” IEICE Spring National Conference (198
9th year) Lecture proceedings No. 5C-3-8゜No. 5-357
A series output voltage of about 150 mV for 52 stages of Josephson junctions 2201 is obtained with the configuration shown in FIG. However, the above-mentioned circuit is driven by an AC power supply, and a method for controlling high voltage in a DC power supply drive circuit is not yet known.

[Problem to be solved by the invention]

The first object of the present invention is to achieve high integration of circuits.

An object of the present invention is to provide a regulator that converts direct current input from outside the chip into alternating current on the chip in order to realize high-speed operation.

A second object of the present invention is to provide a DC power supply driven gate with a large output voltage amplitude, thereby facilitating the interface between a DC power supply driven Josephson circuit and a semiconductor circuit.

[Means to solve the problem]

The first purpose is to create a DC power supply drive circuit in which a series-parallel connection of Josephson elements, which is formed by connecting a plurality of Josephson elements in series and parallel, is inserted in place of one flux-coupled Josephson element in a baffle circuit. This is accomplished by configuring the output current and U to obtain an alternating current source current that drives the other Josephson elements.

The second object is achieved by using the DC power supply driving circuit as an output buffer sofa and converting the output of the AC power supply driving Josephson circuit in the chip into a DC type signal with a large voltage amplitude.

[Effect]

In place of two flux-coupled Josephson elements that perform complementary switching in the baffle circuit, a series-parallel connection body of Josephson elements, which is formed by connecting multiple Josephson elements in series and parallel, is inserted to create a multi-stage Josephson element. By obtaining the bone output voltage, the output voltage of the entire DC power supply drive gate can be increased.

It is known that simply using a series connection of Josephson elements does not allow all Josephson elements to transition to a voltage state. By reconnecting the series-connected Josephson elements in parallel,
It must be ensured that the transient after one of the components switches causes all the components to transition to a voltage state.

In an actual configuration, at least one magnetic flux coupling type Josephson element is included in the series-parallel connection body, and the occurrence of a control line input to the element is used as a trigger for a transient phenomenon.

〔Example〕

One embodiment of the present invention will be explained with reference to FIG. Figure 100
111 to 114 are AC drive circuits supplied with power supply current from the DC drive regulator 100, and 120 and 130 are DC drive regulators 100.
first and second drivers that provide switching control current to the motor;

140 is a clock generation circuit that supplies timing signals to the drivers 120 and 130.

The DC mail regulator 100 is a Josephson junction 101
Series connection bodies 151 to 1542 shunt resistors 155 to 1
58. Parallel resistors 108 and 109° DC current sources 103 and 104. Inductance 1o2. Consists of control input lines 105 and 106.

The first terminal of the first Josephson junction series connection body 151, the first terminal of the second Josephson junction series connection body 152, the first terminal of the third Josephson junction series connection body 153, the fourth The first of the Josephson junction series connections 154 of
are commonly connected to the first terminal of the inductance 102.

The second terminal of inductance 102 is grounded.

The second terminal of the first Josephson junction series connection body 151 is commonly connected to the first terminal of the first shunt resistor 155 and the first terminal of the first parallel resistor 108, and is further connected to the AC drive A circuit 111 is connected as a load. The second terminal of the second Josephson junction series connection body 152 is commonly connected to the first terminal of the second shunt resistor 156 and the first terminal of the second parallel resistor 109, and is further connected to the AC drive A circuit 112 is connected as a load. The second terminal of the third Josephson junction series connection body 153 is connected to the third shunt resistor 15
7 and the second terminal of the first parallel resistor 108 are connected in common, and an AC drive circuit 113 is further connected here as a load.

The second terminal of the fourth Josephson junction series connection body 154 is commonly connected to the first terminal of the fourth shunt resistor 158 and the second terminal of the second parallel resistor 109, and is further connected to the AC drive A circuit 114 is connected as a load. The second terminal of the first shunt resistor 155 is connected to the second terminal of the second shunt resistor 156.
A DC current is injected therefrom from a DC current source 103. The second terminal of the third shunt resistor 157 is connected to the second terminal of the fourth shunt resistor 158, from which DC current is drawn from the DC current source 104. The first control input line 105 commonly passes through the control lines of the Josephson junctions forming the first series connection 151 and the second series connection 152 of Josephson junctions. The second control input line 106 commonly passes through the control lines of the Josephson junctions forming the third series connection 153 and the fourth series connection 154 of Josephson junctions.

The AC drive circuits 111 to 114 are composed of Josephson elements 116 arranged in parallel to which power is supplied via a power supply resistor 115, and the output current of each Josephson element 116 is inputted to another Josephson element and then applied to the load. It is terminated with a resistor 117.

The first driver 120 includes Josephson elements 121 and 122 . It consists of load resistances 161 to 164° and parallel resistances 123 and 124.

The first terminal of the first Josephson element 121.

The connection point of the first terminal of the second Josephson element 122 becomes the first output point 127. First Josephson element 1
The second terminal of 21 is the first terminal of the first load resistor 161, the first terminal of the second load resistor 162, and the first terminal of the first parallel resistor 123.

and the first terminal of the second parallel resistor 124, which becomes the first DC current feeding point 125.

The second terminal of the second Josephson element 122 is connected to the first terminal of the third load resistor 163, the first terminal of the fourth load resistor 164, the second terminal of the first parallel resistor 123, and It is connected to the second terminal of the second parallel resistor 124, which becomes a second DC current feeding point 126. First load resistance 16
1, a second terminal of the second load resistor 162,
Second terminal of third load resistor 163, fourth load resistor 1
64 second terminals are commonly connected to the second output point 12
It becomes 8. A first control input line 105 to the DC drive regulator 100 originates from a first output point 127 and returns to a second output point 128 .

The first Josephson element 121 has two control lines,
The first DC bias current 165 is inputted in the forward direction, and the output current line 149 of the clock generation circuit 140 is inputted in the reverse direction. The second Josephson element 122 also has two control lines, each of which has a second DC bias current 1.
66 is inputted in the positive direction, and the output current line 149 of the clock generation circuit 140 is also inputted in the positive direction.

The second driver 130 also has the same structure as the driver 120 including Josephson elements 131 and 132, the first terminal of the first Josephson element 131 and the first terminal of the second Josephson element 132. The connection point becomes the first output point 137, and one terminal of the four load resistors is connected in common and becomes the second output point 138. A second control input line 106 to the DC drive regulator 100 originates from a first output point 137 and returns to a second output point 138. The second terminal of the first Josephson element 131 and the second terminal of the second Josephson element 132 become a first DC current feeding point 135 and a second DC current feeding point 136, respectively.

The first Josephson element 131 has two control lines,
The second DC bias current 166 is in the positive direction, respectively.
The output current line 149 of the clock generation circuit 140 is also input in the positive direction. The second Josephson element 132 also has two control lines.

The first DC bias current 165 is in the positive direction, respectively.
The output current line 149 of the clock generation circuit 140 is input in the opposite direction.

First DC current feed point 125 of first driver 120
A positive DC current g181 is connected to.

A negative DC current source 182 having the same size as the DC current source 181 is connected to the second DC current feeding point 126, and a positive DC current source is connected to the first DC current feeding point 135 of the second driver 130. 183 is connected to the second DC current feed point 1
A negative direct current source 184 having the same size as the direct current source 183 is connected to 36 .

Further, a direct current source 185 is connected to a first output point 127 of the first driver 120, and a second output point 128 is grounded. First output point 13 of second driver 130
A direct current source 186 is connected to 7, and the second output point 1
38 is grounded.

The clock generation circuit 140 includes flux-coupled Josephson elements 141 and 142 . It consists of load resistors 171 and 172 and a parallel resistor 143. In the following description of the embodiments, only magnetic flux coupling type Josephson elements appear, so the flux coupling type Josephson element will be simply referred to as a Josephson element.

The first terminal of the first Josephson element 141.

The connection point of the first terminal of the second Josephson element 141 becomes the first output point 147. First Josephson element 1
The second terminal of 41 is connected to the first terminal of the first load resistor 171 and the first terminal of the parallel resistor 143.
This becomes a direct current feeding point 145. The second terminal of the second Josephson element 142 is the first terminal of the second load resistor 172.

It is connected to the second terminal of the parallel resistor 143, and this becomes a second DC current feeding point 146. The second terminal of the first load resistor 171 and the second terminal of the second load resistor 172 are commonly connected to form a second output point 148 . Output current line 1
49 originates from the first output point 147 and is connected to the first driver 120 . and returns to the second output point 148 via the control input line of the second driver 130.

The first Josephson element 141 has two control lines,
A first DC bias current 175 and an external clock input 178 are both inputted in the positive direction to each of them. The second Josephson element 142 also has two control lines, to which the second DC bias current 176 is inputted in the forward direction and the external clock input 178 is inputted in the opposite direction. A positive DC current source 177 is connected to the first DC current feeding point 145, and the second DC current feeding point 146 is grounded.

The parallel resistor 143 shunts the DC power supply current when a condition called a hang-up occurs in which both the first Josephson element 141 and the second Josephson element 142 are in a voltage state. It has the function of returning the Josephson element to a superconducting state. The effect of the parallel resistance is the DC drive regulator 100. The same applies to the first and second drivers 120 and 130. Note that in the following description, the current flowing from the first output point 147 to the second output point 148 is treated as positive.

The first DC bias current 175 is I bit, and the second DC bias current 176 is Ib2. and external clock manual 1
78 is ICff1k, the total of the control line current flowing through the first Josephson element 141 is 11n, and the total of the control line current flowing through the second Josephson element 142 is I l
nz is I tnl = I bz + I cab1+nt=
Becomes Ib2 IC 凰. Here, it is assumed that Icmb is 11 and 11 is a certain constant value, and that it changes between 1 and -Iwl, and a relationship of I1+3=Ib1+2XIws is set between Ibl and Ib2.

Here, symbols and circuit diagrams of the Josephson elements 141 and 142 are shown in FIGS. 2(a) and 2(b).

In the figure, 201 is a first gate current terminal, 202 is a second gate current terminal, and 203 and 204 are two control lines. 205 is an inductance, and 206 is a Josephson junction.

FIG. 3 shows the threshold characteristics of the Josephson element shown in FIG. 2. In the figure, the vertical axis (Ii) is the gate current applied from terminal 201 to terminal 202, and the horizontal axis (IC) is the gate current applied to either of the two control lines in the direction from (L) to (R) in the figure. The inside of the threshold curve is the superconducting state, and the outside (
The shaded area) is the voltage state.

Based on the relationship 1bxt Ibz+Icmb, the operating points of the Josephson elements 141 and 142 alternate between points A and B in the figure. Here, when the operating point of the first Josephson element 141 becomes point B in the figure and the element enters a voltage state, an output current flows through the output current line 149. utl changes from +Iwz to -11+2 with Iw2 as a certain constant value, and the second Josephson element 142
The operating point of is point A. That is, the operating point of the pixel element alternately reciprocates between points A and B in the figure in response to an external clock input, generating a shaped output current and causing a clock generation operation.

On the other hand, the value of the DC power supply current 177 in FIG. 1 is set higher than the operating point for performing switching synchronized with the external clock input described above, and the operating point A is set in the threshold characteristics in FIG.
It is also possible to cause the clock generation circuit 140 to perform an oscillation operation by taking the signal out of the threshold curve. This oscillation frequency is determined by the gate current value or the DC bias current I.

It can be adjusted with Ib2.

In the drivers 120 and 130 as well, the same relationship as in the case of the clock generation circuit 140 is set between the first DC bias current 165 and the second DC bias current 166 and the output current value I 112 of the clock generation circuit 140. By doing so, the two Josephson elements constituting each can be alternately set to a voltage state and a superconducting state. Correspondingly, the output current of the first driver 120 is adjusted. ut2 is +11. with Iw3 being a certain constant value. Or - Engineering 1. takes the value of

Note that by adjusting the shapes of the Josephson elements 121 and 122 and designing the threshold characteristics, it is possible to make the output current amplitude Iw3 of the driver 120 larger than the output current amplitude Iw2 of the clock generation circuit 140. That is, an amplified clock signal can be generated.

The same applies to the output current I 0t113 of the second driver 130, but the output current r o of the clock generation circuit 140
first DC bias current 165. Since the method of inputting the second DC bias current 166 to the control line is opposite to that of the first driver 120, the output current Iout4 of the first driver 120 is equal to the output current Iout4 of the second driver 130. The phase is reversed from that of Oui. The values of DC current sources 185 and 186 are I 11
When set to 2.

First control input line 10 to DC drive regulator 100
5 and the second control input line 106
The control current IC2 flowing in is I C4 = I 0ut3 + I 112I cz
= I 0ut3 + I w2, each varying between 0 and 2 X I w2.

Josephson junction 101 of DC drive regulator 100
The structure of the series connection body 151 is shown in FIG. The series connection body 151 is formed between the shunt resistor 155 and a ground plane through hole (referred to as a ground plane contact) 401. The Josephson junction 101 has an upper electrode 402;
A control line 404 is formed between the lower electrodes 403 and runs directly above the upper electrode 402 in a twisted manner. josephson junction 10
1 is designed so that the dimension in the direction in which the power supply current flows (the vertical dimension in the drawing) is sufficiently shorter than the dimension in the direction perpendicular to the flow of the power supply current (the horizontal dimension in the drawing). This prevents a drop in superconducting critical current (the maximum value of superconducting current that can flow through a Josephson junction without generating voltage) due to the self-magnetic field generated by the power supply current, reduces parasitic inductance with respect to the power supply current, and reduces DC drive. regulator 1
This is essential for realizing smooth switching of 00.

The threshold characteristics of the Josephson junction 101 are shown in FIG. In the figure, the vertical axis (D) is the gate current, and the horizontal axis (IC) is the control line current, the inside of the threshold curve is the superconducting state, and the outside (shaded area) is the voltage state.

From the relationship between Ic and Icz, Josephson junction 10
The operating point 1 is alternately taken between point A and point B in the figure. Here, when the operating point of the Josephson junction 101 becomes point B in the figure and the junction becomes a voltage state, the entire Josephson junction series connection including the junction becomes a voltage state. Namely.

When one of the Josephson junctions 101 included in the series connection body 151 is in a voltage state, the transient current fluctuation accompanying the switching is also transmitted to the series connection body 152; Even if the junction becomes a voltage state, the transient current fluctuation caused by the switching returns to the series connection body 151, and as a result, the entire Josephson junction series connection body becomes a voltage state.

Ic4 changes from 0 to 2xIw, and the series connection body 151
When 152 and 152 are brought into a voltage state, the series connection bodies 153 and 154 become superconducting due to the reaction. Power supply current IACl is then supplied to AC drive circuits 111 and 112. On the other hand, when Ic2 changes from O' to 2xIw2 and the series-connected bodies 153 and 154 become in a voltage state, the series-connected bodies 151 and 152 become superconducting due to the reaction. Then, the power supply current I&C is supplied to the AC drive circuits 113 and 114.
2 is supplied.

The blank space below in FIG. 6 shows external clock input Ieim + output current I ouc1 of the clock generation circuit 140 + control current Ic4 flowing to the first control input line 105 to the DC parking regulator 100 and control current flowing to the second control input line 106. current I
ce, AC vehicle AC stepping circuit and 112 power supply current I a
Cz T Power supply current I of AC drive circuits 113 and 114
A time chart of ACg is shown. It can be seen that a large-amplitude alternating current can be supplied on the chip by simply supplying a direct-current power supply current and a small-amplitude clock input from outside the chip.

FIG. 7 shows AC drive Josephson circuits 111 to 114.
The flow of data when a sequential circuit is configured is shown below. In the figure, 701 to 703 are combinational circuits. DC driven flip-flops 711 and 712 have the function of holding data between AC power cycles. Self Gate And (5GA) circuit 72
1 and 722 have the function of reading data from the DC-driven flip-flops at the rising edge of an AC power cycle and holding the data during the AC power cycle.

The combinational circuits 701 to 703 are assigned to either the AC drive circuits 111 and 112 or 113 and 114,
AC power supply I ac4 and I with opposite phase according to the flow of data
Drive alternately with aCz. This eliminates the need for waiting for the output of the self-gate AND to be determined before allowing data to be written to the DC-driven flip-flop, which is necessary in single-phase AC driving.

FIG. 8 shows another embodiment of the invention. In the figure, 801 and 802 are DC drive regulators.

A first driver 803 supplies a switching control current to the DC drive regulator 801.

A second driver 804 supplies a switching control current to the DC drive regulator 802.

805 is a clock generation circuit that supplies a timing signal to the driver 803, and 806 is a clock generation circuit that supplies a timing signal to the driver 804.

The DC drive regulator 801 has a similar configuration to the DC drive regulator 100 of FIG. 1, and includes Josephson junction series connections 811 to 814.

However, this differs from the DC drive regulator 100 in that each Josephson junction constituting the series connection of Josephson junctions has two control lines. Specifically, the control line 404 running directly above the upper electrode 402 in FIG.
It is divided into two wiring lines, both of which are placed on the same upper electrode. and Josephson junction series connected bodies 811 and 81
The DC bias current Ibl from the DC current source 871 and the output current 0□ of the first driver 803 are in the same direction in the two control lines of the Josephson junction constituting the second driver.

The two control lines of the Josephson junction constituting the series connection bodies 813 and 814 have Ib and I0.
ut3 are respectively input in the opposite direction. AC drive circuits 815 to 818 are connected as loads to the series-connected Josephson junctions 811 to 814, respectively.

The DC drive regulator 802 similarly includes Josephson junction series connections 821 to 824, and AC drive circuits 825 to 828 are connected as loads, respectively. The two control lines of the Josephson junctions constituting the series-connected Josephson junctions 821 and 822 have Ibl and the output current 0ut4 of the second driver 804 in the same direction, and the series-connected Josephson junctions 823 and 824 The two control lines of the Josephson junction that make up the
0ut4 are respectively input in the opposite direction.

The first driver 803 includes Josephson elements 831 and 832 . It consists of a load resistor 833 and an 834° parallel resistor 835.

The first terminal of the first Josephson element 831.

The connection point of the first terminal of the second Josephson element 832 becomes the first output point 838. First Josephson element 8
31 is connected to the first terminal of the first load resistor 833 and the first terminal of the parallel resistor 835.
This becomes a DC current feeding point 836. The second terminal of the second Josephson element 832 is the first terminal of the second load resistor 834.

It is connected to the second terminal of the parallel resistor 835, and this becomes a second DC current feeding point 837. A connection point between the second terminal of the first load resistor 833 and the second terminal of the second load resistor 834 becomes a second output point 839. Output current 0. ．． is generated from the first output point 838 and is transmitted to the second output point 839 via the control input line 872 of the first DC drive regulator.
come back to.

The first Josephson element 831 has two control lines,
The DC bias current Tb3 from the DC current source 874 is inputted in the reverse direction, and the output current generator 04 of the clock generation circuit 805 is inputted in the forward direction. The second Josephson element 832 also has two control lines, and the DC bias current Ib4 from the DC current source 875 is applied to each in the opposite direction.
Ioutz is also input in the opposite direction.

The second driver 804 also has a similar structure to the first driver 803, and the first driver 804 of the first Josephson element 841
The connection point between the terminal of the second Josephson element 842 and the first terminal of the second Josephson element 842 becomes a first output point 848 . The second terminal of the first Josephson element 841 is connected to the first DC current feeding point 84
It becomes 6.

The second terminal of the second Josephson element 842 becomes a second direct current feeding point 847. The connection point between the two load resistors becomes a second output point 849. Output current engineer. ut4 is the first
The output is generated from the output point 848 of the controller and is transmitted to the second output point 84 via the control human power 1iA873 of the second DC stepping regulator.
I'll be back at 9.

The first Josephson element 841 has two control lines,
The DC bias current Ib3 from the DC current source 874 is reversed to the output current I0ut2 of the clock generation circuit 806.
are input in the positive direction. The second Josephson element 842 also has two control lines, each of which has a DC bias current Ib from the DC current source 875 in opposite directions. utz is also input in the opposite direction.

Second DC current feeding point 837 of first driver 803
is the first DC current feeding point 84 of the second driver 804
6, and a DC current source 876 is connected between the first DC current feeding point 836 of the first driver 803 and the second DC current feeding point 847 of the second driver 804.

The first clock generation circuit 805 has almost the same structure as the drivers 803 and 804, and the first terminal of the first Josephson element 851, the first terminal of the second Josephson element 852
The connection point of the first terminal becomes the first output point 858. The second terminal of the first Josephson element 851 becomes a first direct current feeding point 856. Second Josephson element 85
The second terminal of No. 2 becomes a second DC current feeding point 857.

The connection point between the two load resistors becomes a second output point 859.

The output current I0ut1 is generated from the first output point 858 and returns to the second output point 859 via the control input line of the first driver 803 and the second clock generation circuit 806.

The first Josephson element 851 has two control lines,
8 is in the opposite direction from the DC bias current from the DC current source 877, and the output current I 0ut2 of the clock generation circuit 806
In the opposite direction, the external clock input I ca is input from the terminal 879.
b are also input in the opposite direction. The second Josephson element 852 also has three control lines, with Ib□ in the opposite direction and g Ioutz in the positive direction.

ICf1k is input in the opposite direction.

The second clock generation circuit 806 also has the same structure as the first clock generation circuit 805, and the first terminal of the first Josephson element 861 and the first terminal of the second Josephson element 862 are connected. The point becomes the first output point 868. 1st
The second terminal of the Josephson element 861 becomes a first direct current feeding point 866. Second Josephson element 862
The second terminal becomes a second DC current feeding point 867.

The connection point between the two load resistors becomes a second output point 869.

Output current engineer. ut4 is generated from the first output point 868 and is connected to the second driver 804 and the first clock generation circuit 8.
It returns to the second output point 869 via the control input line 05.

The first Josephson element 861 has three control lines,
The DC bias current Ibz from the DC current source 877 is reversed to the output current I of the clock generation circuit 805. ut4 is input in the positive direction, and the external clock input Xc is also input in the positive direction from the terminal 878. The second Josephson element 862 also has three control curves, with llm2 in the opposite direction,
l0utx is in the opposite direction.

Ic. are entered in the correct direction.

Output currents Iout4 and Ioutz of the clock generation circuit
is +I Ill and -1, □ with I wl as a certain constant value.
Varies between. External clock input I cab also +I
When changed between w1 and -IJ, Josephson element 8
51°852.862 means that the two human powers other than the DC bias current are both +Iwl, or one is +Iwl and the other is Iwl.
81 or both of the two manpowers are -Iwl. By setting the DC bias current Ib2 so that only the state in which both of these two inputs are +I Ill falls outside the threshold curve in FIG. It can be performed.

The output currents I ouz and I out4 of the driver are also calculated respectively. +Ivz and -1112 in synchronization with utl and I0ut4 and with I112 as a certain constant value.
Varies between.

The DC bias current Ibl is set equal to I113.

The AC power supply current supplied from the DC drive regulator 801 to the AC drive circuits 815 and 816 is Iac, and the AC power supply current supplied to the AC drive circuits 817 and 818 is Iac.
&C2+The AC power supply current supplied from the DC drive regulator 802 to the AC drive circuits 825 and 826 is I &
The AC power supply current supplied to C3+AC drive circuits 827 and 828 is IaC4.

In Figure 9, the above Icmh+ Ioutl, Ioutz
+l0uti+ l0ut4y Iacz+ Iaez
+ IaC3+ Iac4 time chart is shown. The sign of the current value has no particular meaning. This makes the phase π/2
It can be seen that different AC power supply currents can be generated.

FIG. 10 shows the AC drive Josephson circuit 815 of FIG.
The flow of data is shown when a sequential circuit is configured by 818 to 825 and 825 to 828. 1001 and 100 in the same figure
5 is a combination circuit made up of AC drive circuits 815 or 816; 1002 and 10o6 are combination circuits made up of AC drive circuits 827 or 828; and 1003 is a combination circuit made up of AC drive circuits 817 or 818.

10o4 is a combination circuit composed of an AC drive circuit 825 or 826. The data is from left to right in the figure for each phase of the AC power supply I a+4 + I ac+ +I a
It flows on J, I acz.

What is important here is that the only Iacz cycle 902 that transmits data to one Iac cycle 901 is that the next cycle 903 no longer has any overlap with 901. The Josephson element itself has latching characteristics, and has the function of holding data even if the input signal current is removed while the AC power supply current is on. This makes it possible to construct a sequential circuit without requiring a self-gate AND circuit or a DC-driven flip-flop.

Although the original power supply of the logic circuit in FIG. 7 or FIG. 10 is DC, it is ultimately driven by AC power, and the resulting signal waveform is unipolar (unipolar) but RZ (
The voltage amplitude is 2 to 3 mV. An embodiment of an output buffer to allow direct interface with semiconductor circuitry is shown in FIG.

The Motoyama hippo sofa is a series connection body of Josephson elements 1100 11o1 to 1104. Shunt resistance 1105 to 110
8. Parallel resistance 1109 and 1110, load resistance 1111
to 1114. DC current sources 1124 and 1125. Inductance 1115 and 1116. Control input line 1122
and 1123.

the first terminal of the first Josephson element series connection body 1101; the first terminal of the second Josephson element series connection body 1102;
, the first terminal of the third Josephson element series connection body 1103 , the fourth Josephson element series connection body 110
The first terminal of 4 has inductances 1115 and 1116
are commonly connected to the first terminals of the two terminals. Inductance 11
The second terminals of 15 and 1116 are grounded.

The second terminal of the first Josephson element series connection body 1101 is connected to the first terminal of the first shunt resistor 11o5, the first terminal of the first parallel resistor 1109, and the first load resistor 1111.
The first terminals of the two terminals are connected in common. The second terminal of the second Josephson element series connection body 1102 is connected to the first terminal of the second shunt resistor 1106, the first terminal of the second parallel resistor 1110, and the first terminal of the second load resistor 1112. terminals are connected in common. Third Josephson element series connection body 11
The first terminal of the third shunt resistor 1107, the second terminal of the first parallel resistor 1109, and the first terminal of the third load resistor 1113 are commonly connected to the second terminal of the resistor 03. Fourth
The second terminal of the Josephson element series connection body 1104 is connected to the first terminal of the fourth shunt resistor 1108, the second terminal of the second parallel resistor 1110, and the first terminal of the fourth load resistor 1114. are commonly connected.

The second terminal of the first shunt resistor 1105 is connected to the second terminal of the second shunt resistor 1106 to the DC current injection point 11.
20, into which DC current is injected from the DC current source 1124. The second terminal of the third shunt resistor 1107 is connected to the second terminal of the fourth shunt resistor 1108 to become a DC current extraction point 1121, from which DC current is extracted from the DC current source 1125. First control input line 1122
is the first Josephson element series connection body 1101 and the second Josephson element series connection body 1101
It passes through the control line of each Josephson element constituting the series connection body 11o2 of Josephson elements. The second control input line 1123 is connected to the third Josephson element series connection body 1
103 and fourth Josephson element series connection body 1104
The control line of each Josephson element constituting the control line is commonly passed through. The second of the first Josephson element series connection body 11o1
The terminal 1126 becomes the output terminal.

Series connection part 113 of two Josephson elements in FIG.
The structure of o is shown in FIG. In the same figure, Josephson element 1
100 is an upper electrode 1201. Lower electrode 1202. and Josephson junctions 1211 and 1212 therebetween, and the upper electrodes or lower electrodes of adjacent Josephson elements are in contact with each other to form a dense layout. A control line 1203 runs in a crooked manner just above the upper electrode 1201.

An input signal is input to the control input line 1122 in FIG.

FIG. 13 shows the operating waveform of the output voltage V out when an input signal is generated on the control input line 1123.

It uses the same principle as the DC drive regulator shown in Figure 1.

The output voltage of 6 stages of Josephson elements is generated and is several mV.
An output voltage amplitude of Also, the signal type is N RZ
(Non Return to Zero) type, which facilitates interface with semiconductor circuits.

FIG. 14 shows another embodiment of the output buffer.

This output buffer consists of Josephson elements 1401 and 140.
2. Parallel resistance 1405. Load resistance 1403 and 1404
．． DC current source 1407 and 1408° inductance 1
406. Consists of control input lines 1410 and 1411. 1
4o9 is an output terminal.

The structure of the Josephson element 1401 or 1402 is
It is shown in Figure 5. In the figure, 1501 is the upper electrode.

1502 is a lower electrode, 1503 between them is a Josephson junction, and a control line 1504 is connected directly above the upper electrode 1501.
runs at a loss.

The threshold characteristics of this device are shown in Figure 16, where the vertical axis (
(2), ) is the gate current, and the horizontal axis (IC) is the control line current, the inside of the threshold curve is the superconducting state, and the outside (shaded area) is the voltage state where all six stages are switched.

By applying input signals to the control input lines 1410 and 1411 and causing the Josephson elements 1401 and 1402 to operate alternately between points A and B in the same figure, a voltage amplitude of 10-odd mV is also generated from the output terminal 1409. Output can be extracted.

〔Effect of the invention〕

As explained above, according to the DC drive regulator configured according to the first aspect of the present invention, DC current input from outside the chip can be converted to AC current on the chip, which can speed up the clock of the Josephson circuit. It has a big effect. Furthermore, according to the output buffer configured according to the second aspect of the present invention,
Since a DC type output signal with a large voltage amplitude can be extracted, it is effective in facilitating the interface between the Josephson circuit and the semiconductor circuit.

[Brief explanation of the drawing]

Figure 1 is a block diagram of an embodiment of the DC drive regulator according to the present invention, Figures 2 (a) and (b) are symbols and circuit diagrams of the Josephson element used in Figure 1, and Figure 3 is the Josephson element shown in Figure 2. Figure 4 is a diagram showing the structure of the series-connected Josephson junction in Figure 1, and Figure 5 is the Josephson junction included in the series-connected Josephson junction in Figure 4. Figure 6 is an operation time chart of the input/output current of the DC immediate-acting regulator in Figure 1, and Figure 7 is a diagram showing the data flow in the sequential circuit driven by the DC drive regulator in Figure 1. Figure shown. FIG. 8 is a block diagram of another embodiment of the DC drive regulator according to the present invention, and FIG. 9 is an operation time chart of input and output currents of the DC drive regulator of FIG. FIG. 10 is a diagram showing the flow of data in a sequential circuit driven by the DC drive regulator of FIG. 8. FIG. 11 is a configuration diagram of an embodiment of the outcover sofa according to the present invention;
12 is a diagram showing the structure of the series connection of Josephson elements used in FIG. 11, FIG. 13 is an operation time chart of the input/output current of the output buffer of FIG. 11, and FIG. 14 is a diagram of the output buffer according to the present invention. FIG. 15 is a block diagram of another embodiment, and FIG. 16 is a diagram showing the structure of the Josephson element in FIG. 14.
The figure is a diagram showing the threshold characteristic of the Josephson element shown in FIG. 15. FIG. 17 is a diagram showing the configuration of a DC drive circuit described in a conventional document, and FIG. 18 is a circuit that obtains a series output voltage for 52 stages of Josephson junctions, which is described in another conventional document. FIG. <Explanation of symbols> 100.801,802...DC drive regulator 1
20.130,803,804...Driver 140
．． 805, 806...Clock generation circuit 101.20
6,1211,1212...Josephson junction 102.205.1115,1116.1406...
Inductance 105.106, 203, 204, 872°873.1
122.1123, 1410° 1411... Control input line 108.109, 123, 124, 143° 835.1
109, 1110.1405...Parallel resistor 111-114
, 815-818, 825-828...AC drive circuit 117.161-164,171,172°833.8
34.1111~1114,1403°1404.21
06.2107--Load resistance 121.122, 131
,132,141゜142.831,832,841,
842゜851.852,861,862,1401゜1402.2101.2102... Motoko Josephson, Patent Attorney Junnosuke Nakamura (b) Ll Ryoka Figure 2 Figure 3 100---1:R ,kth L-”,'Yu L-7+0
1---'; it hun, #order 117- negative odd resistance +51-154--dit7sonjHjU'1t81 body 155-158-separate resistance 120.130--dryno-121,122--shikose 7son system ±123, 124
-4F+resistance +40-70 tsuku round trip Figure 4 Figure 5 → time Figure 6 Figure 7 → time Figure 9 Figure 10 +211 1212 1211!2
01-11 Kamiho Electric Burma +202-m-lower part +203-11 system iIP road 1211 1212~--shi "st" 7 Nre dedication (n im
e Fig. 13 Fig. 14 Fig. 15 Fig. 16

Claims (1)

[Claims] 1. A DC current input from outside the chip is converted into an AC current by a regulator composed of a DC-driven Josephson element on the chip, and this AC current is used to convert the DC current input from outside the chip into an AC current on the same chip. What is claimed is: 1. An external DC internal AC driven Josephson integrated circuit, characterized in that it drives a driven Josephson circuit. 2. An external DC internal device, characterized in that an output buffer composed of a DC-driven Josephson element is provided on the chip according to claim 1, and a signal output from the chip is taken out to the outside via the output buffer. AC driven Josephson integrated circuit. 3. The regulator according to claim 1 and the output buffer according to claim 2 each have one end of a first Josephson element series-parallel connection body formed by connecting a plurality of Josephson elements in series and parallel, and a first One end of the load resistor is connected at the first node, and one end of the second Josephson element series-parallel connection body and one end of the second load resistor are connected at the second node. The other ends of the first series-parallel connection of Josephson elements and the second series-parallel connection of Josephson elements are connected at a third node, and the other ends of the first load resistance and the second load resistance are connected to each other at a third node. The first node and the second node are connected by a third resistor, the third node and the fourth node are connected by an inductance, and the first node and the fourth node are connected by an inductance. and the second node are DC current supply ends, and either the third node or the fourth node is a signal output end.