JPH0420257B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor substrate, and more particularly to a method of manufacturing a transistor and a monolithic IC.

Traditionally, transistors and monolithic ICs
After forming an element region by performing predetermined impurity diffusion or oxidation treatment on the surface of the semiconductor substrate, Al
An ohmic junction was formed between the wiring and the diffusion layer in the semiconductor substrate by forming a wiring film such as the above and performing heat treatment. For example, bipolar monolith
When manufacturing a lateral type PNP transistor in an IC, as shown in FIG. 1, a semiconductor substrate 1 with a buried N ⁺ layer and an epitaxial N ^- layer formed
In, isolation region 2 by P ⁺ , collector P ⁺ region 3 and emitter P ⁺ region 4, base N ⁺
After sequentially forming the regions 5, windows are opened in the oxide film 6 at positions corresponding to the collector P ⁺ region 3, emitter P ⁺ region 4, and base N ⁺ region 5, for example.
The wiring 7 made of Al is formed and heated at 450℃ to 550℃.
After heat treatment for 10 to 60 minutes, Al wiring 7 and P ⁺
A so-called sintering process was performed to form ohmic junctions with the layers 3 and 4 and the N ⁺ layer 5, and a protective insulating film 8 was further formed.

However, the current amplification factor B of the transistor manufactured using the above manufacturing method is smaller than the value obtained from the theoretical formula shown in equation (1), especially 1/BWB ² /2L _oB ² +D _PE P _oE /D _oB N _PB W _B /L _PE (1) B; Current amplification rate N _PB ; Equilibrium concentration of electrons in the P-type base W _B ; Base width P _oE ; Equilibrium concentration of holes in the N-type emitter D _PE ; Diffusion constant of holes in the emitter L _oB ; Electron diffusion length in the base D _oB ; Diffusion constant of electrons in the base L _PE ; Diffusion constant of holes in the emitter In lateral type PNP transistors, cases may be smaller than one order of magnitude.

When forming a semiconductor element, it generally goes through many steps such as several heat treatment steps, etching steps, ion implantation, and electron beam evaporation steps.
At this time, so-called crystal distortion occurs and various defects are generated, so that levels that cause charge traps are formed particularly near the interface. Since this affects the current amplification rate B of the transistor, the above equation (1) becomes equation (2).

1/B=W _B ² /2L _oB ² +D _PE P _oE /D _oB N _PB W _B /L _PE +K(2) Here, K is a correction term for the influence of the trap level.

Therefore, in order to suppress the decrease in the current amplification rate of the transistor, it is necessary to make the value of K as small as possible, and for this reason, methods such as low-temperature oxidation are necessary to suppress the occurrence of crystal distortion as much as possible during the impurity diffusion and oxidation processes. However, even this method is still insufficient to prevent the decrease in the current amplification rate, and the process is complicated.

In addition, NPN transistors and vertical type
In the manufacture of bipolar ICs in which PNP transistors and lateral type PNP transistors are formed at the same time, attempting to increase the current amplification rate of the lateral type PNP transistors causes phenomena such as a decrease in the breakdown voltage of the transistors, which affects the electrical characteristics of the entire IC. gave.

Therefore, in view of the above-mentioned drawbacks, the present invention increases the current amplification rate of transistors included in bipolar ICs, particularly lateral type PNP transistors and vertical type PNP transistors, while leaving the IC structure and element region forming process unchanged. , and also aims to increase the mutual conductance of MOS transistors included in MOS type ICs.

The inventors found that by forming a wiring layer by electron beam evaporation and then heat-treating it at a low temperature for a long time, the above-mentioned lateral type PNP transistor and vertical type
The current amplification rate of PNP transistors increases greatly,
Furthermore, we found that the higher the deposition rate of the wiring film during electron beam evaporation, the more significant the increase in current amplification rate.

The present invention is based on the results of research into the above phenomenon, and includes a formation step of forming an electrode or wiring film by electron beam evaporation on the surface of a semiconductor substrate on which a transistor is formed; and after forming the electrode or wiring film, the above-mentioned formation a first heat treatment step in which the semiconductor substrate is subjected to a first heat treatment to recover from X-ray damage sustained by the semiconductor substrate during the step; a second heat treatment step of subjecting the semiconductor substrate to a second heat treatment at a lower temperature and for a longer time than the first heat treatment; In order to suppress a decrease in the current amplification factor of the transistor due to

Hereinafter, a case in which a lateral type PNP transistor in a bipolar type monolithic IC is manufactured will be described in detail as an example.

First, as shown in FIG. 1, on a semiconductor substrate 1 on which a buried N ⁺ layer and an epitaxial N ^- layer are formed,
Isolation area 2 due to P ⁺ , collector P ⁺
A region 3, an emitter P ⁺ region 4, and a base N ⁺ region 5 are sequentially formed. The collector P ⁺ region 3 and emitter P ⁺ are then etched by well-known photoetching techniques.
Openings are made in the oxide film 6 at positions corresponding to the region 4 and the base N ⁺ region 5, and a wiring layer 7 made of Al, for example, is formed. At this time, Al is deposited to a thickness of 1 to 2 μm using the electron beam evaporation method, the substrate temperature during deposition is 150°C to 300°C, and the Al deposition rate is 45°C.
Å/sec or more, preferably 70 Å/sec or more.
To obtain this deposition rate, when the distance between the semiconductor substrate 1 and the evaporation source (Al source) for electron beam evaporation is 25 cm, the electron gun input power needs to be 4.0 KW or more, and 160 W or more per 1 cm. shall be.
To obtain a deposition rate of 70 Å/sec, 4.5 KW was required when the distance was 25 cm.

Next, after forming an Al wiring pattern using a well-known photoetching technique, it is heated at 450 to 600°C for 10 to 60 minutes in a nitrogen atmosphere containing 10% hydrogen.
for 1 minute, preferably at 500℃ for 10 to 20 minutes.
and further heat treatment in the above atmosphere at 300°C to 450°C for 30 to 240 minutes, preferably at 350°C for 50 minutes.
A second heat treatment is applied for 90 minutes to 90 minutes. After this,
For example, the protective insulating film 8, for example, a silicon nitride film with a thickness of 1 μm, is formed by plasma CVD at 300°C to 350°C and at a temperature not exceeding the second heat treatment temperature.
Formed at a deposition rate of 250-350 Å/min. In this case, the film is not limited to a silicon nitride film, but may also be a silicon oxide film or the like.

Here, the first heat treatment is for obtaining good ohmic contact between the wiring film and the semiconductor substrate,
At the same time, it is intended to recover to some extent the decrease in the current amplification rate of the transistor due to X-ray damage during electron beam evaporation.

Next, by performing a second heat treatment at a lower temperature and longer time than the first heat treatment, crystal distortions that occurred during element formation or wiring formation, etc. that could not be removed by the first heat treatment, are slowly and sufficiently removed. Since the charge trap level caused by the distortion disappears, the current amplification rate increases. Figure 2 is a diagram showing how the current amplification rate changes due to the heat treatment process.
A current amplification rate nearly twice as high was obtained. In addition, the second
By setting the temperature at which the protective insulating film is formed after the heat treatment not to exceed the temperature of the second heat treatment, it is possible to prevent thermal distortion from occurring again.

On the other hand, when forming a wiring film on a semiconductor substrate by electron beam evaporation, increasing the deposition rate, that is, increasing the power input to the electron gun, makes it possible to form the wiring film in a short time. Since the total amount of X-ray radiation that irradiates the semiconductor substrate, that is, the integrated X-ray dose, is reduced, the degree of decrease in current amplification rate caused by so-called X-ray damage is reduced.
FIG. 3 shows how the current amplification rate changes with the deposition rate before and after electron beam evaporation, and the higher the deposition rate, the less the decrease in the current amplification rate. If the rate of change in current amplification rate is 35% or more, 500℃ for 10 minutes or more.
After 20 minutes of heat treatment, the current amplification rate was completely restored to the value before vapor deposition. Further, in FIG. 2, when the second heat treatment is performed, the current amplification rate becomes higher, and when the deposition rate is 70 Å/sec, it is about 1.4 times that when the deposition rate is 20 Å/sec, and about 2 times after the first heat treatment. Got double.

In the above embodiment, the protective insulating film was formed after the first and second heat treatments were performed after Al vapor deposition, but the first heat treatment was performed after Al vapor deposition, and then the second heat treatment was performed after forming the protective insulating film. The same effect can be obtained by doing. In this case, the protective insulating film needs to be formed at a temperature that does not exceed the first heat treatment temperature, but may exceed the second heat treatment temperature.

In addition, although the embodiments have described the vapor deposition of Al, other electrode and wiring materials such as Mo and W may also be used.
etc. may also be used.

In addition to the lateral type PNP transistor in the example, it also includes bipolar type ICs including vertical type PNP transistors and MOS transistors.
It can also be applied to MOS type ICs.

According to the present invention, without changing the structure of the IC,
In addition, the process of forming the element region remains a simple process without adding any special measures, and after forming electrodes or wiring, the current amplification rate of a bipolar transistor can be increased, or the mutual conductance of a MOS transistor can be increased. can be increased.

[Brief explanation of drawings]

Figure 1 shows the lateral type of bipolar IC.
A cross-sectional view of a PNP transistor. Figure 2 is a characteristic diagram showing the dependence of the current amplification rate B of the transistor before and after electron beam evaporation of Al (with the value before evaporation being 100%) on the Al deposition rate. FIG. 3 is a characteristic diagram showing changes in the heat treatment process and current amplification rate deposition according to the present invention. 1... Semiconductor substrate, 2... Isolation region by P ⁺ , 3... Collector P ⁺ region, 4... Emitter
P ⁺ region, 5... base N ⁺ region, 6... oxide film, 7...
Al wiring, 8...protective insulating film.

Claims (1)

[Claims] 1. On the surface of a semiconductor substrate on which a transistor is formed,
a formation step of forming an electrode or wiring film by electron beam evaporation; and after forming the electrode or wiring film, a first heat treatment on the semiconductor substrate in order to recover X-ray damage caused to the semiconductor substrate in the formation step; a first heat treatment step in which the semiconductor substrate is subjected to a second heat treatment at a lower temperature than the first heat treatment and for a longer time than the first heat treatment in order to alleviate crystal distortion existing in the semiconductor substrate; Further, in the formation step, the formation rate of the electrode or wiring film is controlled by an integrated X-ray dose in order to suppress a decrease in the current amplification factor of the transistor caused by the X-ray damage. A method for manufacturing a semiconductor device, characterized in that settings are made in advance.