JPH0420226U - - Google Patents
Info
- Publication number
- JPH0420226U JPH0420226U JP6172390U JP6172390U JPH0420226U JP H0420226 U JPH0420226 U JP H0420226U JP 6172390 U JP6172390 U JP 6172390U JP 6172390 U JP6172390 U JP 6172390U JP H0420226 U JPH0420226 U JP H0420226U
- Authority
- JP
- Japan
- Prior art keywords
- projection exposure
- pattern detection
- reduction projection
- reduction
- data processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 238000005259 measurement Methods 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 claims 1
- 230000003287 optical effect Effects 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000000034 method Methods 0.000 description 1
Description
第１図は本考案の実施例に用いた縮小投影露光
装置の全体図、第２図はこの処理を行うための概
略フローチヤートである。
１……Ｘ−Ｙステージ、２……縮小レンズ、３
……レテイクル、４……ウエハ、５……Ｘ，Ｙレ
テイクルマーク検出系、６……θ用レテイクルマ
ーク検出系、７……データ処理装置。
FIG. 1 is an overall view of a reduction projection exposure apparatus used in an embodiment of the present invention, and FIG. 2 is a schematic flowchart for carrying out this process. 1...X-Y stage, 2...Reducing lens, 3
... reticle, 4 ... wafer, 5 ... X, Y reticle mark detection system, 6 ... reticle mark detection system for θ, 7 ... data processing device.
Claims (1)
置（レーザ測長系）、パターン検出データの処理
装置よりなる縮小投影露光装置において、回路パ
ターン描画されている原画であるレテイクル位置
を高精度に認識し、位置決めすることによつて、
半導体の製造における重ね合わせを高精度に実現
することを特徴とする縮小投影露光装置。 In a reduction projection exposure device consisting of a reduction lens, a pattern detection optical system, a position measurement device (laser length measurement system), and a pattern detection data processing device, the reticle position, which is the original image on which the circuit pattern is drawn, is recognized with high precision, By positioning
A reduction projection exposure system that is characterized by realizing highly accurate overlay in semiconductor manufacturing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6172390U JPH0420226U (en) | 1990-06-13 | 1990-06-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6172390U JPH0420226U (en) | 1990-06-13 | 1990-06-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0420226U true JPH0420226U (en) | 1992-02-20 |
Family
ID=31590223
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6172390U Pending JPH0420226U (en) | 1990-06-13 | 1990-06-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0420226U (en) |
-
1990
- 1990-06-13 JP JP6172390U patent/JPH0420226U/ja active Pending
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