JPH041978B2 - - Google Patents
Info
- Publication number
- JPH041978B2 JPH041978B2 JP5061883A JP5061883A JPH041978B2 JP H041978 B2 JPH041978 B2 JP H041978B2 JP 5061883 A JP5061883 A JP 5061883A JP 5061883 A JP5061883 A JP 5061883A JP H041978 B2 JPH041978 B2 JP H041978B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- drive circuit
- anode terminal
- terminal
- drive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
Landscapes
- Relay Circuits (AREA)
Description
【発明の詳細な説明】
(a) 発明の技術分野
本発明は、リレー回路等を駆動する駆動回路に
関する。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a drive circuit that drives a relay circuit or the like.
(b) 従来技術と問題点
デイジタル計算機を用いて制御装置等を制御す
るシステムにおいて、計算機からの出力信号によ
り制御装置等を駆動する際には、駆動回路が必要
となる。この駆動回路の駆動素子（トランジス
タ）の出力形式は、通常オープンコレクタ形式が
採用される。これは駆動負荷として、多種類の装
置を接続しうる理由による。出力（制御）信号を
発する計算機側では、この駆動回路が正常に作動
されたか否かを、チエツクする必要があるが、上
記のように出力形式がオープンコレクタ形式の場
合、従来方式では駆動素子自身の作動を、直接チ
エツクすることが難かしい欠点があつた。(b) Prior Art and Problems In a system that uses a digital computer to control a control device, etc., a drive circuit is required when the control device, etc. is driven by an output signal from the computer. The output format of the drive element (transistor) of this drive circuit is usually an open collector format. This is because many types of devices can be connected as driving loads. On the computer side that issues the output (control) signal, it is necessary to check whether or not this drive circuit is operating normally. However, when the output format is an open collector type as described above, in the conventional method, the drive element itself The drawback was that it was difficult to directly check the operation of the device.
(c) 発明の目的
本発明は上記の欠点を解決するためになされた
もので、駆動動作のチエツクを容易とする駆動回
路の提供を目的とする。(c) Object of the Invention The present invention was made to solve the above-mentioned drawbacks, and an object of the present invention is to provide a drive circuit that facilitates checking of drive operation.
(d) 発明の構成
本発明は、トランジスタ素子に入力信号を加え
て生じたコレクタ電流を用いて被駆動素子を駆動
する駆動回路において、前記被駆動素子への印加
電圧より小なる電圧が一端に印加される抵抗器
と、該抵抗器にアノード端子が結ばれカソード端
子が前記トランジスタ素子のコレクタ端子に結ば
れたダイオードと、前記アノード端子に結ばれ前
記トランジスタ素子が駆動されることにより該ア
ノード端子に生ずる電位変化を検出する検出回路
とを備えたことを特徴とする駆動回路である。(d) Structure of the Invention The present invention provides a drive circuit that drives a driven element using a collector current generated by applying an input signal to a transistor element, in which a voltage lower than a voltage applied to the driven element is applied to one end. a resistor to which voltage is applied; a diode having an anode terminal connected to the resistor and a cathode terminal connected to the collector terminal of the transistor element; and a diode connected to the anode terminal and driving the transistor element. This drive circuit is characterized by comprising a detection circuit that detects a potential change occurring in the drive circuit.
(e) 発明の実施例
以下、本発明を図面によつて説明する。図面は
本発明の一実施例を説明するブロツク図であり、
１はフリツプフロツプ、２はAND回路部、３は
アドレス選択部、４はパルス発生部、５は作動ア
ンプ、６はインバータ、７はトランジスタ、８は
リレー、Ａはアドレス選択指令、Ｂは共通バス、
Ｄはダイオード、Ｅは電源、Ｇは駆動信号、Ｈは
駆動指令、Ｐはパルス、R1，R2，R3，R4は抵
抗、V1，V2は供給電圧、ａはアドレスデータ、
ｃはコレクタ端子、ｆはアノード端子、ｉは検出
信号である。図面において、処理装置（図示して
いない）から共通バスＢを経て駆動指令Ｈとアド
レス選択指令とが与えられる。このアドレス選択
指令Ａによりアドレス選択部３が駆動回路を選択
し、これに伴いパルス発生部４からパルスＰが発
せられる。一方駆動指令Ｈはフリツプフロツプ１
に与えられるので、パルスＰによりフリツプフロ
ツプ１がセツトされる。これにより出力された駆
動信号Ｇはインバータ６を経てトランジスタ７を
駆動する。図示のように、トランジスタ７のコレ
クタ端子Ｃはリレー８の一端に結ばれているの
で、トランジスタ７のONに伴つてリレー８が駆
動されることになる。本発明では、図示のように
コレクタ端子Ｃにカソードが結ばれたダイオード
Ｄと、該ダイオードＤのアノード端子に結ばれた
抵抗R4とを設け、抵抗R4の他端に供給電圧V1（＋
５ボルト）を加える。一方リレー８には供給電圧
V2（＋24ボルト）が加えられているが、トランジ
スタ７がOFFの状態ではダイオードＤは非導通
であり、そのアノード端子ｆの電位は＋５ボルト
である。これに対しトランジスタ７がONとなる
と、コレクタ端子Ｃの電位が低下するので、ダイ
オードＤは導電状態となる。従つてダイオードＤ
のアノド端子ｆの電位は、ダイオードの導電時の
アノードとカソード間の電圧と、トランジスタ７
の導電時のコレクタとエミツタ間の電圧との和の
電圧（１ボルト以下）となる。アノード端子ｆ
は、図示のように差動アンプの入力の一端に結ば
れているので、その電位変化は差動アンプ５によ
つて検出される。検出信号ｉはAND回路部２へ
送られ、アドレスデータａとの一致がとられたの
ち共通バスＢを経て処理装置へと送られるので、
トランジスタ７（駆動回路）が正しく作動したこ
とが確認できる。なおフリツプフロツプ１はＤ型
フリツプフロツプであり、従来方式では、このフ
リツプフロツプの出力（駆動）信号ＧをAND回
路部２を経て、処理装置側へ送出する方法が採ら
れていた。また実施例では、ダイオードＤのアノ
ード端子ｆの電位変化の検出用として差動アンプ
５を用いたが、TTLロジツク（例えばTI社製、
74LS04）を用いることもでき、さらにスレシヨ
ルドレベルを高くとつて、論理の安定を期するた
めに、CMOSロジツク（例えばモトローラ社製，
MC14009）を用いることもできる。(e) Examples of the invention The present invention will be explained below with reference to the drawings. The drawing is a block diagram illustrating an embodiment of the present invention.
1 is a flip-flop, 2 is an AND circuit section, 3 is an address selection section, 4 is a pulse generation section, 5 is an operational amplifier, 6 is an inverter, 7 is a transistor, 8 is a relay, A is an address selection command, B is a common bus,
D is a diode, E is a power supply, G is a drive signal, H is a drive command, P is a pulse, R 1 , R 2 , R 3 , R 4 are resistors, V 1 , V 2 are supply voltages, a is address data,
c is a collector terminal, f is an anode terminal, and i is a detection signal. In the drawing, a drive command H and an address selection command are given via a common bus B from a processing device (not shown). In response to this address selection command A, the address selection section 3 selects a drive circuit, and in conjunction with this, the pulse generation section 4 generates a pulse P. On the other hand, drive command H is flip-flop 1
Therefore, flip-flop 1 is set by pulse P. The drive signal G thus outputted passes through the inverter 6 and drives the transistor 7. As shown, the collector terminal C of the transistor 7 is connected to one end of the relay 8, so that the relay 8 is driven when the transistor 7 is turned on. In the present invention, as shown in the figure, a diode D whose cathode is connected to the collector terminal C, and a resistor R4 connected to the anode terminal of the diode D are provided, and the other end of the resistor R4 is connected to the supply voltage V1 ( +
5 volts). On the other hand, relay 8 has a supply voltage
V 2 (+24 volts) is applied, but when transistor 7 is off, diode D is non-conductive and the potential at its anode terminal f is +5 volts. On the other hand, when the transistor 7 is turned on, the potential of the collector terminal C decreases, so the diode D becomes conductive. Therefore diode D
The potential of the anode terminal f of the transistor 7 is the voltage between the anode and cathode when the diode is conducting, and the voltage of the anode terminal f of the transistor 7.
The voltage is the sum of the voltage between the collector and emitter when conducting (1 volt or less). anode terminal f
is connected to one end of the input of the differential amplifier as shown in the figure, so that a change in its potential is detected by the differential amplifier 5. The detection signal i is sent to the AND circuit section 2, and after being matched with the address data a, it is sent to the processing device via the common bus B.
It can be confirmed that transistor 7 (drive circuit) operated correctly. The flip-flop 1 is a D-type flip-flop, and in the conventional system, the output (drive) signal G of this flip-flop is sent through the AND circuit section 2 to the processing device side. In the embodiment, the differential amplifier 5 was used to detect the potential change at the anode terminal f of the diode D, but the differential amplifier 5 was
74LS04) can also be used, and in order to further increase the threshold level and ensure logic stability, CMOS logic (for example, Motorola,
MC14009) can also be used.
(f) 発明の効果
以上のように本発明は、駆動回路の作動により
生じた電位変化を、直接検出しうる手段を有する
ので、駆動回路の動作を確実に把握できる利点を
有する。(f) Effects of the Invention As described above, the present invention has a means for directly detecting potential changes caused by the operation of the drive circuit, and therefore has the advantage that the operation of the drive circuit can be grasped reliably.
図面は本発明の一実施例を説明するブロツク図
であり、図中に用いた符号は次の通りである。
１はフリツプフロツプ、２はAND回路部、３
はアドレス選択部、４はパルス発生部、５は差動
アンプ、６はインバータ、７はトランジスタ、８
はリレー、Ａはアドレス選択指令、Ｂは共通バ
ス、Ｄはダイオード、Ｅは電源、Ｇは駆動信号、
Ｈは駆動指令、Ｐはパルス、R1，R2，R3，R4は
抵抗、V1，V2は供給電圧、ａはアドレスデータ、
Ｃはコレクタ端子、ｆはアノード端子、ｉは検出
信号を示す。
The drawing is a block diagram illustrating an embodiment of the present invention, and the symbols used in the drawing are as follows. 1 is a flip-flop, 2 is an AND circuit, 3
is an address selection section, 4 is a pulse generation section, 5 is a differential amplifier, 6 is an inverter, 7 is a transistor, 8
is a relay, A is an address selection command, B is a common bus, D is a diode, E is a power supply, G is a drive signal,
H is a drive command, P is a pulse, R 1 , R 2 , R 3 , R 4 are resistances, V 1 , V 2 are supply voltages, a is address data,
C indicates a collector terminal, f indicates an anode terminal, and i indicates a detection signal.
Claims (1)
コレクタ電流を用いて被駆動素子を駆動する駆動
回路において、前記被駆動素子への印加電圧によ
り小なる電圧が一端に印加される抵抗器と、該抵
抗器にアノード端子が結ばれカソード端子が前記
トランジスタ素子のコレクタ端子に結ばれたダイ
オードと、前記アノード端子に結ばれ前記トラン
ジスタ素子が駆動されることにより該アノード端
子に生ずる電位変化を検出する検出回路とを備え
たことを特徴とする駆動回路。1. In a drive circuit that drives a driven element using a collector current generated by applying an input signal to a transistor element, a resistor to which a voltage smaller than the voltage applied to the driven element is applied to one end, and the resistor. a diode whose anode terminal is connected to the container and whose cathode terminal is connected to the collector terminal of the transistor element; and a detection circuit which is connected to the anode terminal and detects a potential change that occurs at the anode terminal when the transistor element is driven. A drive circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5061883A JPS59175527A (en) | 1983-03-26 | 1983-03-26 | Drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5061883A JPS59175527A (en) | 1983-03-26 | 1983-03-26 | Drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59175527A JPS59175527A (en) | 1984-10-04 |
| JPH041978B2 true JPH041978B2 (en) | 1992-01-16 |
Family
ID=12863959
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5061883A Granted JPS59175527A (en) | 1983-03-26 | 1983-03-26 | Drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59175527A (en) |
-
1983
- 1983-03-26 JP JP5061883A patent/JPS59175527A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59175527A (en) | 1984-10-04 |
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