JPH0419047U - - Google Patents
Info
- Publication number
- JPH0419047U JPH0419047U JP5887790U JP5887790U JPH0419047U JP H0419047 U JPH0419047 U JP H0419047U JP 5887790 U JP5887790 U JP 5887790U JP 5887790 U JP5887790 U JP 5887790U JP H0419047 U JPH0419047 U JP H0419047U
- Authority
- JP
- Japan
- Prior art keywords
- interface
- inter
- different
- circuits
- interface circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims 1
- 230000008054 signal transmission Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Small-Scale Networks (AREA)
Description
第1図は、この考案による機器間インタフエー
スの構成例を示すブロツク図、第2図は、この考
案を適用したシステム例を示す図である。
1〜3……機器、4〜6……POD、101…
…アドレス設定器、102……RS232 I/
F、103……I/F切替器、104……GPI
B I/F、105……CPU、106……メモ
リ、107……RS485 I/F。
FIG. 1 is a block diagram showing a configuration example of an inter-device interface according to this invention, and FIG. 2 is a diagram showing an example of a system to which this invention is applied. 1-3...Equipment, 4-6...POD, 101...
...Address setter, 102...RS232 I/
F, 103...I/F switch, 104...GPI
B I/F, 105...CPU, 106...Memory, 107...RS485 I/F.
Claims (1)
続された複数の機器間の通信制御を行う機器間イ
ンタフエース装置において、 信号送信先インタフエース装置を指定する指定
手段と、 前記異なる第1のインタフエース回路のいずれ
かを選択動作させる選択手段と、 選択された第1のインタフエース回路に接続さ
れた機器との信号の授受制御を行う第2のインタ
フエース回路と、 を備えて成ることを特徴とする機器間インタフエ
ース装置。[Claims for Utility Model Registration] In an inter-device interface device that controls communication between a plurality of devices connected by different first interface circuits, a designation means for designating a signal transmission destination interface device; A selection means for selectively operating one of the different first interface circuits; and a second interface circuit for controlling the transmission and reception of signals with a device connected to the selected first interface circuit. An inter-device interface device characterized by comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5887790U JPH0419047U (en) | 1990-06-05 | 1990-06-05 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5887790U JPH0419047U (en) | 1990-06-05 | 1990-06-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0419047U true JPH0419047U (en) | 1992-02-18 |
Family
ID=31584884
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5887790U Pending JPH0419047U (en) | 1990-06-05 | 1990-06-05 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0419047U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08269905A (en) * | 1995-03-30 | 1996-10-15 | Nishitani Togyo Kk | Permeable pavement structure |
-
1990
- 1990-06-05 JP JP5887790U patent/JPH0419047U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08269905A (en) * | 1995-03-30 | 1996-10-15 | Nishitani Togyo Kk | Permeable pavement structure |
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