JPH04186858A - Inspection equipment for lead bending of semiconductor integrated circuit device - Google Patents

Inspection equipment for lead bending of semiconductor integrated circuit device

Info

Publication number
JPH04186858A
JPH04186858A JP31696890A JP31696890A JPH04186858A JP H04186858 A JPH04186858 A JP H04186858A JP 31696890 A JP31696890 A JP 31696890A JP 31696890 A JP31696890 A JP 31696890A JP H04186858 A JPH04186858 A JP H04186858A
Authority
JP
Japan
Prior art keywords
bit map
width
lead
integrated circuit
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP31696890A
Other languages
Japanese (ja)
Other versions
JP2594700B2 (en
Inventor
Toshiro Arima
有馬 俊郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP31696890A priority Critical patent/JP2594700B2/en
Publication of JPH04186858A publication Critical patent/JPH04186858A/en
Application granted granted Critical
Publication of JP2594700B2 publication Critical patent/JP2594700B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Length Measuring Devices By Optical Means (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To eliminate short comings of conventional inspection equipment using an optical fiber sensor incapable of flexible response of an inspection equipment side to the change of lead bending inspection, by installing an optical fiber sensor means, a bit map forming means, and a bit map referring means which are individually specified. CONSTITUTION:The following are installed; optical fiber sensor means 4, 2 which optically scan the lateral width of an arbitrary reference part position of a semiconductor integrated circuit device 1 having specified positional relations to an outer lead 3 tip part and an outer lead 3, and generate two different rectangular pulses 5, 6 by photoelectric conversion, a bit map forming means which converts the above rectangular pulses 5 and 6 into bit pulses, respectively, and stores them in a storage device, and a bit map referring means which changes the number of bits of a bit map 9 corresponding with the lateral width of the above part position, by the same ratio so as to correspond with the change of bending allowable specification of the outer lead, and refers the bit map 8 corresponding with the tip part width of the outer lead 3 to the bit positional relations. For example, the change of the number of bits of the above bit map is performed from the central position or the end portion of the bit map.

Description

【発明の詳細な説明】 [岸業上の利用分野1 本発明は半導体集積回路装置のリード曲り検査装置に関
し、特に光ファイバセンサ法による検査装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application 1] The present invention relates to a lead bending inspection device for semiconductor integrated circuit devices, and particularly to an inspection device using an optical fiber sensor method.

[往来の技術1 従来、半導体集積回路装置(以下ICという)のリード
曲りは画像処理法または光ファイバセンサ法の何れか一
つの方法で検査される。
[Conventional Technique 1] Conventionally, lead bending of semiconductor integrated circuit devices (hereinafter referred to as IC) has been inspected using either an image processing method or an optical fiber sensor method.

前者の画像処理によるものは、文字通り拡大画像による
目視検査法であるか、後者の光ファイバセンサ法による
ものは投受光ファイバセンサ等を用いて、まずリード先
端部とリード肩部等の基準となるべき部分をそれぞわ光
走査=、得られた光走査出力をそれぞれ方形パルスに変
換したうえ、更にロジック処理により正、負のパルス列
に再変換して両者の位置関係を検出する情報処理手法に
よる検査法である。
The former method, which uses image processing, is literally a visual inspection method using an enlarged image, while the latter method, which uses optical fiber sensors, uses a light emitting and receiving fiber sensor, etc., to first establish a reference for the lead tip and lead shoulder. Optical parts are each optically scanned, and the obtained optical scanning outputs are converted into square pulses, and then converted again into positive and negative pulse trains through logic processing, and the positional relationship between the two is detected using an information processing method. It is an inspection method.

[発明か解決=ようとする課顆] しかし、画像処理による方法は、検査装置か高価である
のみならず、画像を取り込も際、検査対象のICを一時
的に静止状態に置く必要かあるので、処理能力が低いと
いう問題点、かあり、使方、光ファイバセンサ法による
場合は、画像処理法のものより装置は安価ではあるかロ
ジカルなデータ処理手法か用いられるので、検査規格の
変更に対して検査装置か柔軟に対応できず変更か容易で
ないという問題用かある。また、パルス精度のメンテナ
ンスか難じいなどの欠、占かある。
[Invention or solution = Section to be attempted] However, the method using image processing not only requires expensive inspection equipment, but also requires the IC to be inspected to be temporarily in a stationary state when capturing the image. ,There is a problem of low processing capacity, how to use, and when using the optical fiber sensor method, the equipment is cheaper than the image processing method, and a logical data processing method is used, so it is difficult to change the inspection standard. On the other hand, there are problems with inspection equipment, which are not flexible and cannot be easily changed. In addition, there are deficiencies such as difficult maintenance of pulse accuracy, and fortune-telling.

しかしなから、この光ファイバセンサ法は安価であるこ
と、磯撮的に簡素であること、また、画像処理法のよう
にICを静止さセるl・要かないこと、検出精度が旨い
二と等、処理能力およ乙)経、箔面で可成tつのメlツ
トかあるので、最近きこcp<なって来た!ノート変f
fgに対するユーザの要求に充分応、え得る技術である
。征って、この光ファイバセレザ法がも−)上記欠、山
か速やかに改善されることか多方面から望ま第1でいる
However, this optical fiber sensor method is inexpensive, simple in terms of photographing the ocean, does not require the IC to be stationary like the image processing method, and has excellent detection accuracy. There are quite a few advantages in terms of processing capacity, cost, and foil surface, so I've recently become a fan of Kiko CP! note change f
This is a technology that can fully meet user demands for fg. Furthermore, it is highly desirable from various viewpoints that the optical fiber CELEZER method will be able to quickly overcome the above deficiencies.

本発明の目的は、上記の情況に迄み、リ−1、曲り検査
規格の変更に対して検査装置側か柔軟に対応できない征
未光ファイバセシザ法による検査装置の大声、を解決し
た半導体集積回路装置のリード曲り検査装置を提供する
ことである。
The object of the present invention is to provide a semiconductor integrated circuit which solves the problem of the unconventional optical fiber separator method that does not allow the inspection equipment to respond flexibly to changes in bending inspection standards. An object of the present invention is to provide a lead bending inspection device.

[課題を解決するための手トΩ] 本発明によれば、半導体集積回路装置のリード曲り検査
方法は、外部リードの先端部と前記外部リードと特定の
位置関係にある該半導体集積回路装置の任意の基準部イ
ウの横幅をそれぞれ光走査し光−電気変換して異なる2
つの方形パルスを発生する光ファイバセンサ手段と、1
1j記2つの方形パルスをビットパルスにそt+ぞ?1
変換しメモリ装置内に格納するビットマ・・ノフ形成手
段と、前記基準部位の横幅に対応するヒ・7 hマツプ
のビットΔ女を外部リードの曲り許容規格の変更に応し
て同比率に変更しmj記外部リードの先端部幅に対応す
るビットマツプとビット位置関係を貼合するビットマツ
プ昭合手段とを備えて構成される。この際、前記基準部
位の横幅に対応するビットマツプのビット数の変更をビ
ットマツプの中央位置から行うか、または前記基準部位
の横幅に対応するビットマツプのビット数の変更をピッ
1〜マツプの端部から行うことかできる。
[Measures for Solving the Problems] According to the present invention, a method for inspecting lead bending of a semiconductor integrated circuit device includes a method for inspecting lead bending of a semiconductor integrated circuit device, in which the tip of an external lead and the semiconductor integrated circuit device are in a specific positional relationship with the external lead. The width of the arbitrary reference part I is scanned with light and optical-electrical conversion is performed to obtain two different widths.
fiber optic sensor means for generating one rectangular pulse;
1j Put the two square pulses into the bit pulse. 1
The bit mark forming means to be converted and stored in the memory device and the bit Δ of the H-7 h map corresponding to the width of the reference portion are changed to the same ratio in accordance with the change in the external lead bend tolerance standard. The device is configured to include a bit map corresponding to the width of the tip of the external lead and a bit map displaying means for pasting the bit positional relationship. At this time, the number of bits of the bitmap corresponding to the width of the reference part is changed from the center position of the bitmap, or the number of bits of the bitmap corresponding to the width of the reference part is changed from Pi1 to the edge of the map. I can do what I want to do.

[作  用  ] 本発明によれば、リード曲り規格の変更に応し、基準部
位の幅に対応するピッ1へマツプのビット数か変更比率
と同一比率で変更されるので、装置のハート部に変更を
加えなくとも世路変更に応じた検査を等測的に実施する
ことかできる。
[Function] According to the present invention, in response to a change in the lead bending standard, the number of bits in the map to the pin 1 corresponding to the width of the reference part is changed at the same ratio as the change ratio, so that the heart part of the device is changed. Even without making any changes, it is possible to conduct tests in accordance with changes in the world in an isometric manner.

[実施例] 次;こ、本発明について図面を型開して訂細に説明する
[Example] Next, the present invention will be explained in detail with reference to the drawings.

第1区 falおよびfblはそねぞと本発明の一実施
例における半導体集積回路装置とファイバセンサの概略
な配置状況を示す正面図および側面図、また、第2図 
fai〜げ)は本発明の一実施例を示す検査データの処
理チャート図である。本実施例によれば、外部リード3
のリード層幅およびリード先端部がそれぞれ検査基準と
なるべき範囲に選ばれ、投受光ファイバセンサ2および
4かそれぞれ配置される。ここで、半導体集積回路装置
(IC)]をA方向へ滑走させると、リ−1へ面の反射
からセンサ2および4は方形パルス6および5をそtぞ
れ生成する[第2図fal 、 lbl参昭全開ついで
、この方形パルス5および6はサンプリング用ス1−ロ
ボ7でサンプリングさハr第2図fcl 参照]、これ
に対応するビットマツプメモリにそれぞれ格納される。
The first section fal and fbl are a front view and a side view showing a schematic arrangement of a semiconductor integrated circuit device and a fiber sensor in an embodiment of the present invention, and FIG.
FIG. 3 is a processing chart of inspection data showing an embodiment of the present invention. According to this embodiment, the external lead 3
The width of the lead layer and the tip of the lead are each selected within a range that should serve as an inspection standard, and the light emitting/receiving fiber sensors 2 and 4 are respectively arranged. Here, when the semiconductor integrated circuit device (IC) is slid in the direction A, the sensors 2 and 4 generate rectangular pulses 6 and 5, respectively, from the reflection from the surface toward the ray 1. Then, the rectangular pulses 5 and 6 are sampled by the sampling robot 7 (refer to FIG. 2) and stored in the corresponding bitmap memories.

第2図 fd+およびtelのビットマツプ8および9
は上記方形パルス5および6のそれぞれのマツプ状態を
示じている。ついで、検査規格に対応して定められた百
分上人(%)かり−1−肩幅(+□1に対応する方形パ
ルス6のピッ)・マツプ9に対して乗ぜられる。すなわ
ち、百分比N(%jに[、シたビットマツプ10か作成
さtL[第2図ffl全開]、これとリード先端部幅(
tl)に対応するビットマツプ8とか比較される。すな
わち、百分比N(%)した基準範囲ft2−の中にり−
l−先端部幅(tl)か完全に含まるか否かで良否判定
か行われる。従来の検査装置によれば、リード曲りの良
否の判定は、単に基準範囲としたリード肩幅内にリード
先端部幅か納まっているか否かの直接的な比較手法によ
って行われる。すなわち、方形パルス6のパルス幅t2
内に方形パルス5のパルス幅t1か含まれているか否か
か判断される。Lかしなから、このように判定基準か固
定された場合には、検査規格の変更に対して著しく柔軟
性を欠く結果となり、検査装置全体の構造的見直しを余
儀なくされることとなる。
Figure 2 fd+ and tel bitmaps 8 and 9
shows the map states of the square pulses 5 and 6, respectively. Then, it is multiplied to a map 9 of 100% (%) multiplied by -1 - shoulder width (+□1 corresponding to the pitch of the rectangular pulse 6). In other words, the percentage N (%j [, tL [Fig. 2 ffl fully open], and the lead tip width (
The bitmap 8 corresponding to tl) is compared. In other words, within the reference range ft2- expressed as a percentage N (%)
A pass/fail judgment is made based on whether the l-tip width (tl) is completely included. According to conventional inspection devices, the quality of lead bending is determined by a direct comparison method that simply determines whether the lead tip width is within the lead shoulder width defined as a reference range. That is, the pulse width t2 of the square pulse 6
It is determined whether the pulse width t1 of the square pulse 5 is included in the pulse width t1 of the square pulse 5. Therefore, if the judgment criteria are fixed in this way, there will be a significant lack of flexibility in response to changes in inspection standards, and the entire structure of the inspection apparatus will have to be reconsidered.

トヌエ(まビ・・l・マツプ9I−D・し・の両便1を
同一比率で百分比りだ場合を説明1−だか、8側っつを
別ぐの1yti丁百分比することも6I能である。二の
ようにすると、基/!L範囲をがなり仔乃、に設定する
二とかできる。また、リー1−光端部に7J玩]、1−
る方形パルス5に対しで、E逓1−だ処理をあわせ行え
はより一層規格象史に7・ニオる4;軟・脛を拡大する
ことかできる。
Tonue (Mabi...l.Matsupu 9I-D.Shi...Explain the case where both flights 1 are in the same ratio and are compared by 100%.It is also 6I ability to compare 1yti to 100% by separating the 8 sides. Yes. If you do as in 2, you can set the base /!
For the rectangular pulse 5, it is possible to further expand the standard image by performing E multiplication processing.

[発明の効果] 以上詳細に説明したように、本発明1こよれば良否判定
の検査基準範囲を可変とすることができるので、リ−1
・曲りに対する規格変更に容易に追従することかできる
。また、パルス精度のメンテナンス性も容易であるので
、リ−,[・曲り検査装置の検査規格変更に対する非柔
軟性の大声を完全に解消、する二とが可能である。
[Effects of the Invention] As explained in detail above, according to the present invention 1, the inspection reference range for pass/fail judgment can be made variable, so that lead-1
- Can easily follow changes in standards regarding bending. In addition, since the maintainability of pulse accuracy is easy, it is possible to completely eliminate the problem of inflexibility of bending inspection equipment in response to changes in inspection standards.

【図面の簡単な説明】[Brief explanation of drawings]

第1図 falおよびfb)はそtlそれ本発明の一実
施例における半導体集積回路装置とフマイバセシサの概
略な配置状況を示す正面図および側面図、第2図 fa
t〜は)は本発明の一実施例を示す検査データの処理チ
ャート図である。 1・・・半導体集積回路装置、 2.4・・−投受光ファイバセンサ、 3・−・外部り−1・、 5−・−リード先端部幅に対応する方形パルス、6・・
・リード肩幅に対応する方形パルス、7・・・サンプリ
ング用ストロボ、 8・・・リード先端部幅に対応するビットマツプ、9−
・−リード肩幅に対応するビットマツプ、10・・・リ
ード肩幅の百分比に対応するビットマツプ。 特許出願人  九州日本電気株式会社
FIG. 1 is a front view and a side view showing a schematic arrangement of a semiconductor integrated circuit device and a humidifier according to an embodiment of the present invention; FIG.
t~) are inspection data processing charts showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Semiconductor integrated circuit device, 2.4...-Emitting/receiving optical fiber sensor, 3...-External line-1, 5--Square pulse corresponding to lead tip width, 6...
・Square pulse corresponding to lead shoulder width, 7...Sampling strobe, 8...Bit map corresponding to lead tip width, 9-
-Bitmap corresponding to the lead shoulder width, 10...Bitmap corresponding to the percentage of the lead shoulder width. Patent applicant Kyushu NEC Co., Ltd.

Claims (3)

【特許請求の範囲】[Claims] (1)外部リードの先端部と前記外部リードと特定の位
置関係にある該半導体集積回路装置の任意の基準部位の
横幅をそれぞれ光走査し 光−電気変換して異なる2つの方形パルスを発生する光
ファイバセンサ手段と、前記2つの方形パルスをビット
パルスにそれぞれ変換しメモリ装置内に格納するビット
マップ形成手段と、前記基準部位の横幅に対応するビッ
トマップのビット数を外部リードの曲り許容規格の変更
に応じて同比率に変更し前記外部リードの先端部幅に対
応するビットマップとビット位置関係を照合するビット
マップ照合手段とを備えることを特徴とする半導体集積
回路装置のリード曲り検査装置。
(1) Optically scan the width of the tip of an external lead and an arbitrary reference portion of the semiconductor integrated circuit device that is in a specific positional relationship with the external lead, and perform optical-to-electrical conversion to generate two different rectangular pulses. an optical fiber sensor means, a bitmap forming means for converting the two rectangular pulses into bit pulses and storing them in a memory device, and determining the number of bits of the bitmap corresponding to the width of the reference portion according to an external lead bend tolerance standard. A lead bending inspection device for a semiconductor integrated circuit device, comprising: a bitmap collation unit that changes the ratio to the same ratio in response to a change in the width of the external lead, and collates the bit positional relationship with a bitmap corresponding to the tip width of the external lead. .
(2)前記基準部位の横幅に対応するビットマップのビ
ット数の変更をビットマップの中央位置から行うことを
特徴とする請求項(1)記載の半導体集積回路装置のリ
ード曲り検査装 置。
(2) The lead bending inspection device for a semiconductor integrated circuit device according to claim 1, wherein the number of bits in the bitmap corresponding to the width of the reference portion is changed from the center position of the bitmap.
(3)前記基準部位の横幅に対応するビットマップのビ
ット数の変更をビットマップの端部から行うことを特徴
とする請求項(1)記載の半導体集積回路装置のリード
曲り検査装置。
(3) The lead bending inspection device for a semiconductor integrated circuit device according to claim 1, wherein the number of bits of the bitmap corresponding to the width of the reference portion is changed from an end of the bitmap.
JP31696890A 1990-11-21 1990-11-21 Bending inspection device for semiconductor integrated circuit devices Expired - Lifetime JP2594700B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31696890A JP2594700B2 (en) 1990-11-21 1990-11-21 Bending inspection device for semiconductor integrated circuit devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31696890A JP2594700B2 (en) 1990-11-21 1990-11-21 Bending inspection device for semiconductor integrated circuit devices

Publications (2)

Publication Number Publication Date
JPH04186858A true JPH04186858A (en) 1992-07-03
JP2594700B2 JP2594700B2 (en) 1997-03-26

Family

ID=18082945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31696890A Expired - Lifetime JP2594700B2 (en) 1990-11-21 1990-11-21 Bending inspection device for semiconductor integrated circuit devices

Country Status (1)

Country Link
JP (1) JP2594700B2 (en)

Also Published As

Publication number Publication date
JP2594700B2 (en) 1997-03-26

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