JPH04186147A - Sensing method for foreign matter on semiconductor wafer - Google Patents

Sensing method for foreign matter on semiconductor wafer

Info

Publication number
JPH04186147A
JPH04186147A JP2313862A JP31386290A JPH04186147A JP H04186147 A JPH04186147 A JP H04186147A JP 2313862 A JP2313862 A JP 2313862A JP 31386290 A JP31386290 A JP 31386290A JP H04186147 A JPH04186147 A JP H04186147A
Authority
JP
Japan
Prior art keywords
wafer
semiconductor wafer
electrodes
foreign matter
impurities
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2313862A
Other languages
Japanese (ja)
Inventor
Toshio Sawa
俊雄 沢
Hideaki Kurokawa
秀昭 黒川
Takayuki Matsumoto
隆行 松本
Susumu Horiuchi
進 堀内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2313862A priority Critical patent/JPH04186147A/en
Publication of JPH04186147A publication Critical patent/JPH04186147A/en
Pending legal-status Critical Current

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  • Geophysics And Detection Of Objects (AREA)

Abstract

PURPOSE:To sense defect of wafer in an early stage by judging the degree of cleanliness in the washing process for semiconductor wafer by means of in-line measurement. CONSTITUTION:A semiconductor wafer 1 is inserted between electrodes 2, 3 and placed on the former 2, and either the wafer is put in contact with the latter 3 or a space is provided. Externally, for example from a frequency response device 4, a high frequency voltage is impressed to the gap between these two electrodes 2, 3. Therein the wafer 1 and impurities have different electric resistances and capacitances, and therefore, their components are separately measured by varying the frequency of the impressed voltage. This electric resistance is proportioned to the thickness of impurities and is in inverted proportion to the area, while the capacitance is in inverted proportion to the length and is proportioned to the area. Accordingly changes in the thickness and area of the impurities become apparent as changes in the electric resistance and the capacitance, which are thus measured.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体ウェハ製造工程での水洗による洗浄後の
ウェハ」二の異物を検出する機構に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a mechanism for detecting foreign matter on a wafer after washing with water in a semiconductor wafer manufacturing process.

〔従来の技術〕[Conventional technology]

半導体ウェハ製造では、シリコンウェハ」二に酸化皮膜
を形成し、不純物をドーピングして半導体をえることに
なる。この工程では各種の酸化工程を終るがその間に不
純物除去のための洗浄工程が入ってくる。洗浄には不純
物の種類を考lat、て純度の高い超純水が用いられる
。その方法は多数並へたウェハのカセノ1−を超純水槽
に浸漬したり、あるいはカセットに超純水を噴霧する方
法がある。
In semiconductor wafer manufacturing, an oxide film is formed on a silicon wafer and impurities are doped to obtain a semiconductor. In this step, various oxidation steps are completed, but in between, a cleaning step is performed to remove impurities. Ultrapure water of high purity is used for cleaning, taking into consideration the types of impurities. This can be accomplished by immersing a cassette 1- of a large number of wafers in an ultrapure water bath, or by spraying ultrapure water onto the cassette.

一方、製造された半導体ウェハの不良の具合は酸化皮膜
内への不純物の含有あるいは1−レンチ(清)部での残
留異物にかかわってくる。製品としての不良品の検査に
は回路間の短絡を主体とじた欠陥に対して電圧を印加し
て絶縁破壊に至るまでを耐電圧測定がとられている。
On the other hand, the quality of defects in manufactured semiconductor wafers is related to the presence of impurities in the oxide film or residual foreign matter in the 1-wrench (clean) portion. In order to inspect defective products, voltage is applied to defects mainly caused by short circuits between circuits, and withstand voltage measurements are taken until dielectric breakdown occurs.

一方、不純物がウェハに残留しているかどうかの判定方
法には、ウォーターマーク法(flaterMark)
と呼ばれる方法が検討されている。本性は元来洗浄水の
純度判定に用いられるためのものであるが、素子」二の
残留物の有無を乾燥してその表面を光学顕微鏡で判定す
る。
On the other hand, watermark method (flatermark) is used to determine whether impurities remain on the wafer.
A method called ``is being considered. Originally, it was used to determine the purity of washing water, but the presence or absence of residue on the element 2 is determined by drying and its surface using an optical microscope.

従来より採られている方法は確立していない、特に、洗
浄、乾燥工程での不純物の有無をその場で判定する評価
技術には至っていない。
No conventional method has been established, and in particular, no evaluation technology has been developed to determine the presence or absence of impurities in the washing and drying processes on the spot.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来技術では半導体ウェハの不純物の有無を製造工程中
に半定することは出来なかった。
With conventional techniques, it has not been possible to semi-determine the presence or absence of impurities in semiconductor wafers during the manufacturing process.

本発明の目的は、洗浄、乾燥工程の後にウェハ上への不
純物を判定する判定装置を提供することにある。
An object of the present invention is to provide a determination device that determines impurities on a wafer after cleaning and drying steps.

〔課題を解決するための手段〕[Means to solve the problem]

前記目的を達成するために、本発明は半導体ウェハと不
純物の電気的特性の差異を利用したものである。すなわ
ち、半導体ウェハと不純物では電気抵抗とキャパシタン
スが異なり、これらの成分を分別測定することにより不
純物の存在を判定する。分別測定には印加電圧の周波数
を変えることにより求めることができる。
To achieve the above object, the present invention utilizes the difference in electrical properties between a semiconductor wafer and an impurity. That is, the semiconductor wafer and the impurity have different electrical resistance and capacitance, and the presence of the impurity is determined by separately measuring these components. Differential measurements can be made by changing the frequency of the applied voltage.

測定法に関しては、二対の電極間(主極と対極)に半導
体ウェハを挿入し、電極間の一方に、素子を乗せ、他方
の電極に接触するか空間部を設けるかの構成において、
両電極間に電圧を印加する。
Regarding the measurement method, a semiconductor wafer is inserted between two pairs of electrodes (main electrode and counter electrode), an element is placed on one of the electrodes, and the other electrode is contacted or a space is provided.
A voltage is applied between both electrodes.

電圧印加は試料のウェハ、接触抵抗部、絶縁板部。Voltage is applied to the sample wafer, contact resistance section, and insulating plate section.

空気層部が直列に並んだ部位にかかわり、この間での試
料極の電気抵抗とキャパシタンスを測定する。また、試
料極の不純物は試料極の抵抗並びにキャパシタンス変化
として測定される。
It involves the part where the air layers are lined up in series, and measures the electrical resistance and capacitance of the sample electrode between these parts. Further, impurities in the sample electrode are measured as changes in resistance and capacitance of the sample electrode.

〔作用〕[Effect]

半導体ウェハに不純物が点あるいは面で存在する時、そ
の成分に基づく電気抵抗RとキャパシタンスCは、 R−ρ−−・(1) ρ:比抵抗 Q:長さ A:面積 ε:比誘電率 (1)及び(2)式において、Rは不純物の厚さが大き
い方が大きく、面積に反比例する。一方、CはQに反比
例し、Aに比例する。
When impurities exist in the semiconductor wafer as points or planes, the electrical resistance R and capacitance C based on the components are R-ρ-- (1) ρ: Specific resistance Q: Length A: Area ε: Relative dielectric constant In formulas (1) and (2), R increases as the thickness of the impurity increases and is inversely proportional to the area. On the other hand, C is inversely proportional to Q and proportional to A.

従って、不純物の厚さと面積の変化が各々RとCに変化
として表われてくる。
Therefore, changes in the thickness and area of impurities appear as changes in R and C, respectively.

これらのR,C変化を大きくするために、ウェハの試料
の前後に絶縁物等を配置することが考えられる。
In order to increase these R and C changes, it is conceivable to place an insulator or the like before and after the wafer sample.

〔実施例〕〔Example〕

本発明を実施するに当り、基本構成を第1図に示す。半
導体ウェハ1は二つの電極2,3の間に設置し、その間
に外部より周波数応答器4から電圧を印加する。電極部
には外界の浮遊容量等を遮断するために金属材でできた
遮併体5を設置することもあり、この遮併体5と周波数
応答器4をアースにおとしておく。
In carrying out the present invention, the basic configuration is shown in FIG. A semiconductor wafer 1 is placed between two electrodes 2 and 3, and a voltage is externally applied between them from a frequency response device 4. A shielding body 5 made of a metal material may be installed at the electrode portion to block stray capacitance from the outside world, and this shielding body 5 and the frequency response device 4 are grounded.

半導体ウェハ試料を電極間に設置するに当り、方法に関
していくつかが考えられる。設置法に関して第2図に示
す。(a)では電極2に試料1を置き対極3とは間隔が
おいている。この場合には電極間の抵抗と容量が試料と
間隔の空気相で構成される。(b)では(a)の空気相
に挿入材4を入れており、試料と絶縁材4で電気成分が
成り立つ。(c)では試料の前後に挿入材4,5を入れ
ている。この場合には試料と二つの挿入材で構成される
。これらの電極間の電気回路は各材料自身とその間の接
触抵抗も同時に入ってくる。また、挿入材については、
試料への付着物の電気的特性から選定される。電気抵抗
が大きい場合には導電性のよい材料を、抵抗が小さい場
合には絶縁材が使われる。挿入材の形状は表、裏の表面
状態が同じにする必要がある。
There are several possible methods for placing a semiconductor wafer sample between electrodes. The installation method is shown in Figure 2. In (a), a sample 1 is placed on the electrode 2 and is spaced apart from the counter electrode 3. In this case, the resistance and capacitance between the electrodes is composed of the sample and the air phase in the space. In (b), the insert material 4 is placed in the air phase of (a), and the sample and the insulating material 4 form an electrical component. In (c), inserts 4 and 5 are inserted before and after the sample. In this case, it consists of a sample and two inserts. The electrical circuit between these electrodes includes the contact resistance between each material itself and at the same time. Regarding insert materials,
It is selected based on the electrical characteristics of the deposits on the sample. If the electrical resistance is high, a highly conductive material is used, and if the resistance is low, an insulating material is used. The shape of the insert material must have the same surface condition on the front and back sides.

一方、測定に際しては、電極2,3の間隔は一定にして
基準特性値からの形状に伴う誤差をなくすようにする。
On the other hand, during measurement, the spacing between the electrodes 2 and 3 is kept constant to eliminate errors caused by the shape from the reference characteristic values.

〈実施例1〉 実際に測定した結果を第3図に示す。試料は50φのシ
リコン素子(厚さ0.8mn)で表、裏に5jOj、の
皮膜が0.3μm程度で覆われている。
<Example 1> The results of actual measurements are shown in FIG. The sample was a 50φ silicon element (thickness: 0.8 mm) covered with a film of about 0.3 μm on the front and back sides of 5jOj.

一方、汚染した素子は汚染部がウェハの中央部に15φ
程度で円筒状に形成されている。成分は金属酸化物と推
定される。測定法については、両電極2,3の間に試料
」を設置し、前後に50φ×0.5t のポリスチレン
板を挿入している。電極間隔は1 、8 null に
保持した。測定は、電圧0.5■で周波数fIKHzか
ら10 M Hzまでの応答をとり、インピーダンス1
z1とキャパシタンスCを表示している。これによりウ
ェハと汚染ウェハともに、1z1とCは同じ傾向の応答
を示す。
On the other hand, in the case of a contaminated element, the contaminated part is located at the center of the wafer with a diameter of 15 mm.
It is formed into a cylindrical shape. The components are estimated to be metal oxides. Regarding the measurement method, a sample was placed between both electrodes 2 and 3, and polystyrene plates of 50φ x 0.5t were inserted in the front and back. The electrode spacing was maintained at 1 and 8 null. Measurements were made with a voltage of 0.5μ, a response from frequency fIKHz to 10MHz, and an impedance of 1
z1 and capacitance C are displayed. As a result, 1z1 and C exhibit responses with the same tendency for both the wafer and the contaminated wafer.

すなわち、IZIは周波数fに対して比例して減少し、
Cは低、高周波域で大きい値を示す。汚染ウェハは新ウ
ェハに対して、121が大きく、Cが小さくなっている
。この特性はウェハへの付着物の抵抗が大きく、キャパ
シタンスとして表われる付着物の誘電率も大きいことを
意味している。
That is, IZI decreases in proportion to frequency f,
C shows a large value in the low and high frequency ranges. The contaminated wafer has a larger value 121 and a smaller C than the new wafer. This characteristic means that the resistance of the deposits on the wafer is high and the dielectric constant of the deposits, which appears as capacitance, is also high.

〈実施例2〉 実施例1に対して同し試料に対して電極間の構成を変え
た時の測定結果を第4図に示す。実施例1に対してウェ
ハと下部電極の間にポリスチレン板を1枚挿入している
。」一部はQ 、 5 +++mの間隔となっている。
<Example 2> FIG. 4 shows the measurement results when the configuration between the electrodes was changed for the same sample as in Example 1. In contrast to Example 1, one polystyrene plate was inserted between the wafer and the lower electrode. ” Some of them are spaced at intervals of Q, 5 +++m.

測定値は実施例1とほぼ同じであるが、汚染素子のIZ
l並びにCが新ウェハとの差が小さくなっている。これ
は素子上部の空隙部の電気的特性の中で電気抵抗が先の
ポリスチレン板より小さいことを意味している。
The measured values are almost the same as in Example 1, but the IZ of the contaminated element
The difference in l and C from the new wafer is smaller. This means that among the electrical characteristics of the cavity at the top of the element, the electrical resistance is smaller than that of the polystyrene plate.

以上二つの実施例から付着物のあるウェハはないし清浄
なウェハに比べて電気抵抗とキャパシタンスに差異があ
る。差異に影響する因子は付着物の成分と量9分布、お
よび厚さ等に関わる形状が挙げられる。周波数の依存性
は、成分のもつキャパシタンスCに直接表われしいては
、インピーダンスIZIに表われてくる。従って121
とCの周波数プロファイルより付着物の有無を判定する
ことができる。
From the above two embodiments, there is a difference in electrical resistance and capacitance between wafers with deposits and clean wafers. Factors that influence the difference include the component and amount9 distribution of the deposit, and the shape related to the thickness and the like. The frequency dependence is directly expressed in the capacitance C of the component, and is also expressed in the impedance IZI. Therefore 121
The presence or absence of deposits can be determined from the frequency profiles of and C.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、半導体ウェハの洗浄工程での洗浄度を
インライン測定から判定することができるので、ウェハ
の欠陥を早期に検出することができる。
According to the present invention, since the degree of cleaning in a semiconductor wafer cleaning process can be determined from in-line measurement, defects in the wafer can be detected at an early stage.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明になる一実施例の半導体ウェハへの付着
物の判定するための装置のブロック図、第2図は検出機
構部の試料と電極の断面図、第3図および第4図は本発
明による判定のための測定実施例の説明図である。 1・・・半導体ウェハ、2・・電極、3・・電極、4 
周波数応答器。
FIG. 1 is a block diagram of an apparatus for determining deposits on a semiconductor wafer according to an embodiment of the present invention, FIG. 2 is a sectional view of a sample and an electrode in the detection mechanism, and FIGS. 3 and 4. FIG. 2 is an explanatory diagram of a measurement example for determination according to the present invention. 1... Semiconductor wafer, 2... Electrode, 3... Electrode, 4
Frequency responder.

Claims (1)

【特許請求の範囲】 1、半導体ウェハ製造工程でのウェハの酸化皮膜上の異
物を検出する機構において、 二対の電極間にウェハを設置し、前記電極間に高周波電
圧を、印加してその時の交流インピーダンスを測定する
ことにより異物のないウェハでのインピーダンスとの比
較から異物の存在を判定することを特徴とする半導体ウ
ェハ上の異物の検出方法。 2、請求項1において、被測定体の前記ウェハは両電極
に接触固定させるか、あるいは、片方の電極に設置して
間隙を設ける半導体ウェハ上の異物の検出方法。 3、請求項2において、両方あるいは片方の電極には絶
縁性物質で被覆した電極を用いる半導体ウェハ上の異物
の検出方法。 4、請求項1において、印加する交流波は10mV以上
の電圧で、1KHz以上の周波数領域で一定周波数ある
いは周波数を掃引する半導体ウェハ上の異物の検出方法
[Claims] 1. In a mechanism for detecting foreign substances on an oxide film of a wafer in a semiconductor wafer manufacturing process, a wafer is placed between two pairs of electrodes, and a high frequency voltage is applied between the electrodes. 1. A method for detecting foreign matter on a semiconductor wafer, the method comprising determining the presence of a foreign matter by measuring AC impedance of the semiconductor wafer and comparing it with the impedance of a wafer free of foreign matter. 2. A method for detecting foreign matter on a semiconductor wafer according to claim 1, wherein the wafer of the object to be measured is fixed in contact with both electrodes, or is placed on one electrode with a gap provided therebetween. 3. A method for detecting foreign matter on a semiconductor wafer according to claim 2, wherein both or one of the electrodes is coated with an insulating material. 4. A method for detecting foreign matter on a semiconductor wafer according to claim 1, wherein the applied alternating current wave has a voltage of 10 mV or more and sweeps a constant frequency or frequency in a frequency range of 1 KHz or more.
JP2313862A 1990-11-21 1990-11-21 Sensing method for foreign matter on semiconductor wafer Pending JPH04186147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2313862A JPH04186147A (en) 1990-11-21 1990-11-21 Sensing method for foreign matter on semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2313862A JPH04186147A (en) 1990-11-21 1990-11-21 Sensing method for foreign matter on semiconductor wafer

Publications (1)

Publication Number Publication Date
JPH04186147A true JPH04186147A (en) 1992-07-02

Family

ID=18046403

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2313862A Pending JPH04186147A (en) 1990-11-21 1990-11-21 Sensing method for foreign matter on semiconductor wafer

Country Status (1)

Country Link
JP (1) JPH04186147A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000321229A (en) * 1999-05-14 2000-11-24 Honda Motor Co Ltd Coking sensor for internal combustion engine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000321229A (en) * 1999-05-14 2000-11-24 Honda Motor Co Ltd Coking sensor for internal combustion engine

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