JPH04184425A - Thin-film transistor - Google Patents

Abstract

PURPOSE:To prevent the deterioration of an on current with lapse of time and the change of a threshold voltage with lapse of time by providing an impurity semiconductor layer having the conduction type reverse from the conduction type of source and drain electrodes so as to cover the whole or part of channel parts and to come into contact with the substrate side boundary of the channel layers. CONSTITUTION:A substrate 101 is a glass substrate or quartz substrate having light transmissivity and process heat resistance. The layer to the directly deposited on the substrate 101 is P type polysilicon which is patterned to an island shape and is formed as a base layer 102. The nearly intrinsic polysilicon layer deposited in contact with the base layer 102 is also patterned on the inner side of the base layer and is formed as the channel layer 103. This patterning is executed for shielding the substrate side of the channel layer with the base layer and prevents the conduction by the photocurrent of the source and drain electrodes and the channel parts are simultaneously light- shielded at this time. The base layer 102 is provided in such a manner. The deterioration of the on-current with lapse of time and the change of the threshold voltage with lapse of time are prevented.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to thin film transistors.

[Prior Art 1] FIG. 2 shows a structural example in which a top gate type polysilicon thin film transistor obtained by a conventional technique is applied to an active matrix type liquid crystal display device.

The substrate 201 is a glass substrate or a quartz substrate that is transparent and process heat resistant. A channel layer 203 is formed of near-intrinsic polysilicon on the substrate 201 and is patterned into an island shape. A gate electrode 205 provided on the opposite side of the channel layer with the gate insulating film 204 in between serves as a mask when forming an n-type source/drain region 206 by ion doping. This is a so-called self-alignment structure.

[Problems to be Solved by the Invention] When a top-gate thin film transistor with the conventional structure as described above is used as a switching element in a device that operates under light irradiation, such as a display element or a light-receiving element, for example,
Light incident from the glass substrate side will directly illuminate the channel portion. It is known that light irradiation on the channel portion of a thin film transistor causes problems such as: 1) increase in off-state current; 2) deterioration of on-state current over time; and 2) change in threshold voltage over time.

Also, this is due to the fact that the back channel is floating in potential.

■Charges induced or accumulated between the underlying substrate or insulating film and the channel greatly affect transistor characteristics.

There are also factors that impede optimal design.

[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention covers all or part of the channel portion and is in contact with the substrate side interface of the channel layer, opposite to the source and drain electrodes. The present invention provides a structure of a top-gate thin film transistor including an impurity semiconductor layer (hereinafter referred to as a base layer) having a conductivity type of.

[Example] Below, an example in which a top gate type polysilicon thin film transistor to which the present invention is applied is applied to an active matrix type liquid crystal display device will be explained according to the process. FIG. 1 is a schematic diagram of this embodiment.

The substrate 101 is a glass substrate or a quartz substrate that is transparent and process-resistant. Directly deposited on the base layer 5101 is P-type polysilicon and patterned into islands to become the base layer 1.02. The nearly true polysilicon layer deposited in contact with the base layer 102 is patterned into a channel layer 101: I: within the base layer (in the opening 11). This is to shield the base layer from light by the base layer, thereby preventing conduction due to photocurrent between the base layer and the source and drain electrodes.Also, at this time, the present invention also allows the channel portion to be shielded from light at the same time. The structure of the gate insulating film 104, the gate electrode 105, and the method of forming the n-type source/drain region 106 are the same as in the conventional method.Here, as shown in the plan view of FIG. The back channel potential can be controlled by forming a contact hole 104 in the gate insulating film 104 and taking out the base layer electrode.

This is the second effect of the present invention. In this embodiment, by connecting this electrode to the additional capacitance electrode of the liquid crystal pixel, the potential of the hack channel can be controlled without increasing the number of hash lines in the liquid crystal display screen.

For reference, even if the base layer has a thickness of about 1 micron, it can sufficiently absorb short wavelength light that is harmful to the channel. In this example, P-type polysilicon is used as the base layer material, but if the process temperature of the subsequent process allows, it is also possible to use amorphous silicon, which is a direct transition type, to increase the effect, or to use semiconductors such as germanium or tin. , or a semiconductor containing these elements as an alloy.

The only major difference in the structure from the conventional example is the presence or absence of the base layer, but when actually creating a device, if the depth of the source/drain region is controlled so that it does not reach the base layer, reverse current flow will be reduced. It is possible to control the increase in

This is the meaning of φ when the base layer and channel layer are thin films and do not have perfect crystallinity like crystalline valve silicon.

[Effects of the Invention] As typified by the above-mentioned embodiments, by applying the present invention to a top-gate thin film transistor, the following two effects regarding transistor characteristics can be obtained.

1. By shielding the channel from light, off-state current can be kept to a low level. Furthermore, it is possible to eliminate temporal deterioration factors such as deterioration of on-current over time and change of threshold voltage over time.

2. By controlling the potential of the back channel, it is possible to control induced and accumulated charges on the back channel side, which have traditionally been one of the factors that have been difficult to control, and obtain desired transistor characteristics.

[Brief explanation of drawings]

FIG. 1 shows an embodiment in which the top gate type thin transistor of the present invention is applied to an active matrix type liquid crystal display device. A plan view of an entire pixel including a thin film transistor and a cross-sectional view of the transistor portion are shown. FIG. 2 is a diagram showing an example in which a conventional top gate type thin film transistor is applied to an active matrix type liquid crystal display device. 111.211...Gate pass line 112.212
・ ・Source Hass Line 113.213 ・・Additional Capacitance Electrode Line 114.214 ・・Pixel Electrode and above Applicant Seiko Epson Co., Ltd. Agent Patent Attorney Kizobe Suzuki (1st name) Figure 1

Claims (1)

[Claims] 1) In a top-gate thin film transistor having a gate electrode on the side opposite to the substrate with respect to the channel layer, the top-gate thin film transistor covers all or part of the channel portion and is in contact with the interface of the channel layer on the substrate side. A thin film transistor characterized in that an impurity semiconductor layer having a conductivity type opposite to that of the source and drain electrodes is provided.