JPH04180628A - Semiconductor wafer - Google Patents

Abstract

PURPOSE:To easily control a nondefective layer in the order of mum so as to obtain an ideal IC structure by constituting a semiconductor wafer used for manufacturing ICs by sticking a thin silicon wafer which is low in initial oxygen concentration and has no crystal defect to a thick silicon wafer which is high in density and has very small defects. CONSTITUTION:A thin silicon wafer 2 which is low in initial oxygen concentration and has no crystal defect is stuck to a thick silicon wafer 1 which is high in density and has very small defects 3. It is preferable to set the initial oxygen concentration of the wafer 2 at <=14X10<17>/cm<3> and the wafer 1 can be prepared by heating a wafer having an initial oxygen concentration of, for example, 17X10<17>/cm<2> at about 650 deg.C so as to remove the oxygen and produce the very small defects. The wafers 1 and 2 are stuck to each other in such way that the wafer 1 from which an oxide film formed on the surface at the time of the heat treatment for producing the very small defects 3 is removed with buffered hydrofluoric acid and the wafer 2 are put together and heat-treated in an O2/N2 atmosphere after they are washed with a mixed solution of H2O2 and H2SO4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor wafers used in the manufacture of ICs.

[Conventional technology]

For ultra-LSIs such as IMDRAMs and image sensors, preventing contamination from entering during the manufacturing process is extremely important to improving yields. Intrinsic gettering that is formed and gettered inside (
There is a technology (hereinafter referred to as IG).

Conventionally, in order to give wafers this IG ability, C2 silicon wafers were treated at multiple temperatures, such as low temperatures around 650°C and high temperatures of over 1000°C, in order to effectively achieve oxygen outward diffusion and oxygen precipitation. By controlling the method, a structure having a defect-free layer (hereinafter referred to as 02 layer) on the wafer surface and a micro-defect layer inside was formed on the wafer (hereinafter referred to as IG silicon wafer). These IG silicon wafers were then used to manufacture ICs and improve the yield of good pellets.

[Problem to be solved by the invention]

In the conventional IG silicon wafer described above, as shown in FIG. 2, it was necessary to form a DZ layer 10 and a microdefect layer 11 having completely contradictory properties in the same wafer by heat treatment. Therefore, if you want the DZ layer 10 to be of high quality with absolutely no defects, the initial oxygen concentration of the wafer should be lowered, or the microscopic particles inside the wafer should be reduced, such as by shortening the nucleation treatment time for oxygen precipitation at low temperatures. Measures must be taken to suppress the occurrence of defects and weaken the gettering force. On the other hand, if a stronger gettering force is required, the DZ layer width becomes narrower, which has the disadvantage that micro defects 3A are more likely to occur in the DZ layer.

In addition, the initial oxygen concentration of the silicon ingot from which silicon wafers are cut differs depending on the ingot, and the initial oxygen concentration and thermal history when pulling the ingot differ depending on the position within the ingot, making it easier for oxygen to precipitate from each silicon wafer. In other words, the ease with which micro-defects are formed varies, leading to major problems in the uniformity of the width of the DZ layer and the density of micro-defects, which are important parameters for the quality of IG silicon wafers.

[Means to solve the problem]

The semiconductor wafer of the present invention has a sufficiently low initial oxygen concentration on the surface side (for example, 14 x 10 "cta-3 or less), so that it is defect-free so that no defects will occur due to oxygen precipitation even after the IC manufacturing thermal process. It is formed by bonding a thin silicon wafer with a thick silicon wafer whose back surface has been subjected to a precipitation treatment to sufficiently generate micro defects.

The defect-free silicon wafer on the front side where IC elements are formed strengthens the gettering force due to micro defects on the back side1.
The thickness should be approximately 0 μm. The silicon wafer on the back side undergoes precipitation treatment by heat treatment to form micro defects, but the residual oxygen concentration after treatment is diffused outward into the defect-free layer during the IC manufacturing thermal process and is low enough to prevent defects from being induced (e.g. 13×10"Ca1-' or less) is used.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a longitudinal sectional view of one embodiment of the present invention.

In Figure 1, the semiconductor wafer has a high density of micro defects 3.
It is formed by laminating a thin silicon wafer 2 with a low initial oxygen concentration and no crystal defects on a thick silicon wafer 1 having a crystalline structure.

The initial oxygen concentration of thin silicon wafer 2 is 14×10
A high initial oxygen concentration (for example, 17×101
A silicon wafer of 7 Cal-') in which minute defects are generated by performing oxygen precipitation at a temperature of about 650° C. is used.

The thick silicon wafer 1 and the thin silicon wafer 2 are bonded together by heat-treating the silicon wafer 1 to generate minute defects, and then removing the oxide film on the surface with buffered hydrofluoric acid.
After cleaning with a mixed solution of H, O, and H, So, they are stacked and heat treated for about 2 hours in an 027N2 atmosphere at about 100°C.The depth of the source, drain, and well of the IC element is For example, if the thickness of the thick silicon wafer 1 is 580 μm and the thickness of the thin silicon wafer is 70 μm and they are bonded together, the thin silicon wafer 2 is removed by polishing it by approximately 50 μm.

In the above example, an IG tank structure wafer was made by forming minute defects on thick silicon wafers and bonding them together, but of course, the silicon wafer on the side where IC elements are formed is a silicon wafer with an extremely low initial oxygen concentration (for example, MCZ).
If a silicon wafer (11 x 101) Cal-' or less) is used, an IG silicon wafer can be made by bonding the wafers together and then performing heat treatment to form micro defects.

This embodiment has the advantage that removal and cleaning of oxide films caused by precipitation and dirt caused by precipitation treatment before lamination can be performed at the same time after heat treatment for lamination.

〔Effect of the invention〕

As explained above, the present invention provides a DZ for forming an IC element.
Since the layer and the defect layer for gettering contamination are constructed from separate silicon wafers with completely different initial oxygen concentrations and different heat treatments, an ideal IG tank structure silicon wafer can be obtained. Further, by processing after bonding, the thickness of the DZ layer can be controlled on the μm order, so that a semiconductor device-c with improved yield and quality can be obtained with less variation in the DZ layer.

[Brief explanation of drawings]

FIG. 1 is a sectional view of one embodiment of the present invention, and FIG. 2 is a sectional view of a conventional example. DESCRIPTION OF SYMBOLS 1... Thick silicon wafer, 2... Thin silicon wafer, 3... Micro defect, 10... Defect-free layer, 1
1...Minute defect layer.

Claims (1)

[Claims] A semiconductor wafer characterized by laminating a thin silicon wafer with a low initial oxygen concentration and no crystal defects on a thick silicon wafer having a high density of micro defects.