JPH04177852A - Method for testing semiconductor storing circuit element - Google Patents

Abstract

PURPOSE:To shorten test time by judging whether one storing element of a semiconductor storing circuit element is defective or not, separating a semiconductor storing circuit element which has a storing element decided defective, and subjecting a semiconductor storing circuit element decided nondefective to function test. CONSTITUTION:Function test is performed for the one storing element of semiconductor storing circuit elements 4-7, a signal is inputted to the bit line and the word line of the one storing element of the plurality of semiconductor storing circuit by probes 2, and each storing element is judged whether defective or not. Then, a laser trimmer attached to a test device 1 cuts the connection of the signal and the bias with the semiconductor storing circuit element which is decided defective by the function test of the one storing element. The function test is simultaneously performed for all the semiconductor storing circuit elements which are judged nondefective by the function test of the one storing element. Thus, the function test is simultaneously performed for the plurality of semiconductor circuit elements without reducing the accepting rate of the function test and the test time is shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for testing a semiconductor memory circuit element, which is a method for testing the functionality of a memory circuit element formed on a semiconductor wafer.

[Conventional technology]

Conventionally, when performing a functional test on a large number of semiconductor memory circuit elements formed on a semiconductor wafer, each test is performed serially on each semiconductor memory circuit element, or the DC characteristics are first tested. The method used was to remove semiconductor memory circuit elements with defective DC characteristics from the test object after conducting a test and determining whether they were good or bad, and then continuing with a functional test.

[Problem to be solved by the invention]

The former conventional method described above has the disadvantage that even if a test device capable of simultaneous testing is used, only the functional test is performed serially, and therefore the test takes a long time. Also,
In the latter method, for example, if there is a semiconductor memory circuit element that passes the functional test but fails the DC characteristics test, that semiconductor memory circuit element will fail the DC characteristics test and be excluded from the functional test. The disadvantage is that the passing rate of the functional test cannot be accurately determined. Furthermore, the DC characteristic test has the disadvantage that it requires a long test time because it serially tests a plurality of semiconductor memory circuit elements.

An object of the present invention is to provide a method for testing semiconductor memory circuit elements that eliminates such drawbacks.

[Means to solve the problem]

The testing method for a semiconductor memory circuit element of the present invention is a method for testing a semiconductor memory circuit element in which a plurality of semiconductor memory circuit elements formed on a semiconductor wafer are functionally tested at the same time. A process of determining whether the element is good or bad, a process of separating the semiconductor memory circuit element including the memory element that became defective in this process from other circuits and connection lines, and a process of determining whether the semiconductor memory circuit element which became a good product in the process is functional. It consists of a process of testing.

〔Example〕

Next, the present invention will be explained with reference to the drawings. FIGS. 1 and 2 are a block diagram and a flowchart of a test apparatus for explaining an embodiment of the method for testing semiconductor memory circuit elements of the present invention. For example, as shown in FIG. 1, this method of testing semiconductor memory circuit elements involves transmitting input/output signals from a test device 4 via probe needles 2 to four semiconductor memory circuit elements 4 on a semiconductor wafer 83. 7 to 7 is input/output, and first, the quality of each semiconductor memory element is determined.

That is, as shown in FIG. 2, first, in a "functional test of one memory element for each semiconductor memory circuit element", the probe needle 2 is used to test the bit line of one memory element in a plurality of semiconductor memory circuit elements. , a signal is input to the word line, and the quality of each memory element is determined by "Does it pass?" Next, in ``Disconnect the signal and bias connections to the semiconductor memory circuit element that failed the functional test for one memory element,'' the connection wire is cut off using a laser trimmer attached to the test equipment. Then r 1
6 [Effects of the invention] As explained above, in the test method for semiconductor memory circuit elements of the present invention, when a plurality of semiconductor memory circuit elements are functionally tested at the same time, a single functional test in a semiconductor memory device is carried out serially as a preliminary test to determine pass/fail. By removing defective semiconductor memory circuit elements that may have a negative impact on the test from the functional test target, it is possible to perform functional tests on multiple semiconductor memory circuit elements simultaneously without lowering the pass rate of the functional test. This has the effect of shortening the test time. Furthermore, by reducing the number of memory elements to be subjected to the preliminary test, for example by testing 16 bits of a 106-bit memory element, there is an effect that the increase in time for the preliminary test can be ignored.

[Brief explanation of drawings]

FIGS. 1 and 2 are a block diagram and a flowchart for explaining one embodiment of the method for testing semiconductor memory circuit elements of the present invention. DESCRIPTION OF SYMBOLS 1... Test device, 2... Probe needle, 3... Semiconductor wafer, 4, 5, 6.7... Semiconductor memory circuit element.

Claims (1)

[Claims] A method for testing a semiconductor memory circuit element in which a plurality of semiconductor memory circuit elements formed on a semiconductor wafer are functionally tested at the same time includes a step of determining whether one memory element in the semiconductor memory circuit element is good or bad; The method includes the steps of: separating the semiconductor memory circuit element including the defective memory element from other circuits and connection lines; and performing a functional test on the semiconductor memory circuit element which was found to be a good product in the step. A method for testing a semiconductor memory element.