JPH04176153A - Manufacture of lead frame - Google Patents

Manufacture of lead frame

Info

Publication number
JPH04176153A
JPH04176153A JP30347890A JP30347890A JPH04176153A JP H04176153 A JPH04176153 A JP H04176153A JP 30347890 A JP30347890 A JP 30347890A JP 30347890 A JP30347890 A JP 30347890A JP H04176153 A JPH04176153 A JP H04176153A
Authority
JP
Japan
Prior art keywords
etching
thickness
small
etch
etching process
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP30347890A
Other languages
Japanese (ja)
Other versions
JP2542738B2 (en
Inventor
Naoto Kimura
直人 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP2303478A priority Critical patent/JP2542738B2/en
Publication of JPH04176153A publication Critical patent/JPH04176153A/en
Application granted granted Critical
Publication of JP2542738B2 publication Critical patent/JP2542738B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • ing And Chemical Polishing (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable a part small in dimensions to be accurately etched even if it is small in size as compared with the thickness of a material plate by a method wherein small holes are bored in the part to etch, and then an etching process is executed. CONSTITUTION:When a semiconductor device lead frame is manufactured, an etching process is carried out after small holes 4 are bored in a part of a material plate to etch. For instance, an island 1, suspension pins 2, and inner leads 3 of a material metal 5 excluding a part which is to be etched are coated with resist. The small holes 4 are made in the part of the material metal 5 to etch at the prescribed positions through a wire cut processing method, a discharge processing method, or the like. Then, an etching process is executed. By this setup, etchant enters the holes 4 to accelerate an etching rate in the direction vertical to the direction of the thickness of the metal 5, whereby an etching rate is relatively lessened in the direction of the thickness of the material plate 5, in result an etching pattern excellent in dimensional accuracy can be obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はリードフレームの製造方法に関し、特にエツチ
ング加工工程を含むリードフレームの製造方法に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a lead frame, and particularly to a method for manufacturing a lead frame including an etching process.

〔従来の技術〕[Conventional technology]

従来、この種のリードフレームをエツチングにて加工す
る場合は、素材金属にレジスト液を塗布し、現象、焼付
けを行ない被エツチング部分のレジスI〜液を除去した
後、エツチング加工を行なっていた。
Conventionally, when processing this type of lead frame by etching, the etching process was carried out after applying a resist solution to the raw metal, performing drying and baking, and removing the resist I solution from the portion to be etched.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のエツチング加工法では、被エツチング寸
法が素材板厚に比較して小さい場合、板厚と垂直方向の
みでなく、板厚方向にもエツチングされるために狭い寸
法が精度良く確保できないという欠点があった。
In the conventional etching method described above, if the dimension to be etched is small compared to the thickness of the material, narrow dimensions cannot be achieved with high accuracy because the etching is performed not only in the direction perpendicular to the thickness of the material, but also in the direction of the thickness of the material. There were drawbacks.

本発明の目的は、被エツチング寸法が素材厚に比較して
小さい場合でも狭い寸法が精度良く確保できるリードフ
レームの製造方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a lead frame manufacturing method that can ensure a narrow dimension with high accuracy even when the dimension to be etched is small compared to the thickness of the material.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、半導体装置用リードフレームの製造方法にお
いて、被エツチング箇所に複数の小孔を穿孔した後にエ
ツチング加工を行う工程を含んで構成されている。
The present invention is a method for manufacturing a lead frame for a semiconductor device, which includes a step of drilling a plurality of small holes in a location to be etched and then performing an etching process.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図<a)、(b)は本発明の一実施例の製造方法を
説明する平面図及び要部断面図である。
FIGS. 1(a) and 1(b) are a plan view and a sectional view of a main part for explaining a manufacturing method according to an embodiment of the present invention.

第1図(a)、(b)に示すように、まず、素材金属5
の被エツチング部を除くアイランド部1、つりピン部2
.インナリード部3にレジストを被覆する。
As shown in FIGS. 1(a) and (b), first, the material metal 5
Island part 1 and hanging pin part 2 excluding the etched part
.. The inner lead portion 3 is coated with a resist.

次に、素材金属5の被エツチング部にワイヤカット加工
法や放電加工法等により、所定の位置に小孔4を穿孔す
る。
Next, a small hole 4 is bored at a predetermined position in the portion of the raw metal 5 to be etched by a wire cutting method, an electric discharge machining method, or the like.

次に、エツチング加工を行う。このときエツチング液が
小孔4に侵入し、素材金属5の板厚と垂直方向へのエツ
チング速度を加速することにより、板厚方向へのエツチ
ングが相対的に遅くなり、寸法精度の高いエツチングパ
ターンが得られる。
Next, etching is performed. At this time, the etching liquid enters the small holes 4 and accelerates the etching speed in the direction perpendicular to the thickness of the raw metal 5, thereby making the etching in the thickness direction relatively slow and creating an etching pattern with high dimensional accuracy. is obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、被エツチング部に小孔4
を設けることにより、板厚と垂直方向へのエツチング速
度が加速され、微細寸法部加工時に板厚方向へのエツチ
ング進行を遅くすることができ、寸法精度の高い工ツヂ
ンク°パターンが得られる効果かある。
As explained above, the present invention has small holes 4 in the part to be etched.
By providing this, the etching speed in the direction perpendicular to the plate thickness can be accelerated, and the etching progress in the plate thickness direction can be slowed down when processing fine dimensions, resulting in a machining pattern with high dimensional accuracy. be.

【図面の簡単な説明】 第1図(a)、(b)は本発明の一実施例の製造方法を
説明する平面図及び要部断面図である。 1・・・アイランド部、2・・・つりピン部、3・・イ
ンナリード部、4・・・小孔、5・・素材金属。
BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1(a) and 1(b) are a plan view and a sectional view of a main part, illustrating a manufacturing method according to an embodiment of the present invention. 1... Island part, 2... Hanging pin part, 3... Inner lead part, 4... Small hole, 5... Material metal.

Claims (1)

【特許請求の範囲】[Claims]  半導体装置用リードフレームの製造方法において、被
エッチング箇所に複数の小孔を穿孔した後にエッチング
加工を行う工程を含むことを特徴とするリードフレーム
の製造方法。
A method for manufacturing a lead frame for a semiconductor device, the method comprising the step of drilling a plurality of small holes in a location to be etched and then performing an etching process.
JP2303478A 1990-11-08 1990-11-08 Manufacturing method of lead frame Expired - Fee Related JP2542738B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2303478A JP2542738B2 (en) 1990-11-08 1990-11-08 Manufacturing method of lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2303478A JP2542738B2 (en) 1990-11-08 1990-11-08 Manufacturing method of lead frame

Publications (2)

Publication Number Publication Date
JPH04176153A true JPH04176153A (en) 1992-06-23
JP2542738B2 JP2542738B2 (en) 1996-10-09

Family

ID=17921439

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2303478A Expired - Fee Related JP2542738B2 (en) 1990-11-08 1990-11-08 Manufacturing method of lead frame

Country Status (1)

Country Link
JP (1) JP2542738B2 (en)

Also Published As

Publication number Publication date
JP2542738B2 (en) 1996-10-09

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