JPH04163972A - Variable color light emitting diode - Google Patents
Variable color light emitting diodeInfo
- Publication number
- JPH04163972A JPH04163972A JP2290054A JP29005490A JPH04163972A JP H04163972 A JPH04163972 A JP H04163972A JP 2290054 A JP2290054 A JP 2290054A JP 29005490 A JP29005490 A JP 29005490A JP H04163972 A JPH04163972 A JP H04163972A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- emitting diode
- layer
- diode chip
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 14
- 239000004065 semiconductor Substances 0.000 claims abstract description 9
- -1 gallium nitride compound Chemical class 0.000 claims abstract description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- 150000001875 compounds Chemical class 0.000 claims description 2
- 239000003086 colorant Substances 0.000 abstract description 9
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 2
- 230000001105 regulatory effect Effects 0.000 abstract 2
- 239000010410 layer Substances 0.000 description 95
- 229920002120 photoresistant polymer Polymers 0.000 description 11
- 238000010894 electron beam technology Methods 0.000 description 9
- 239000000758 substrate Substances 0.000 description 9
- 229910052594 sapphire Inorganic materials 0.000 description 8
- 239000010980 sapphire Substances 0.000 description 8
- 239000011777 magnesium Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 239000007789 gas Substances 0.000 description 5
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000002356 single layer Substances 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000005587 bubbling Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 101000650578 Salmonella phage P22 Regulatory protein C3 Proteins 0.000 description 2
- 101001040920 Triticum aestivum Alpha-amylase inhibitor 0.28 Proteins 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- MHYQBXJRURFKIN-UHFFFAOYSA-N C1(C=CC=C1)[Mg] Chemical compound C1(C=CC=C1)[Mg] MHYQBXJRURFKIN-UHFFFAOYSA-N 0.000 description 1
- NTWRPUHOZUFEDH-UHFFFAOYSA-N C[Mg]C1C=CC=C1 Chemical compound C[Mg]C1C=CC=C1 NTWRPUHOZUFEDH-UHFFFAOYSA-N 0.000 description 1
- 241000218202 Coptis Species 0.000 description 1
- 235000002991 Coptis groenlandica Nutrition 0.000 description 1
- 241000282326 Felis catus Species 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000295 emission spectrum Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 150000002902 organometallic compounds Chemical class 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
本発明は、発光色を可変できる発光ダイオードに関する
。The present invention relates to a light emitting diode that can change the color of its emitted light.
従来、発光ダイオード（以下ｒＬＥＤＪという）は一対
のリードフレームの一方に発光ダイオードチップをボン
ディングし、上部電極ともう一方のリードフレームとを
Ａｕなどのワイヤで接続後、樹脂成形したものが知られ
ている。Conventionally, light-emitting diodes (hereinafter referred to as rLEDJs) have been known to be made by bonding a light-emitting diode chip to one of a pair of lead frames, connecting the upper electrode to the other lead frame with a wire such as Au, and then molding the chip with resin. There is.
しかし、従来は、高輝度の青色の発光ダイオードが得ら
れないことから、青色を１つの原色として変化させる可
変色発光ダイオードは知られていない。
本発明は、青色を原色に含む可変色発光ダイオードを提
供することを目的とする。
本発明は、本発明者らにより、初めて、窒化ガリウム系
化合物半導体から成るｐ層とｎ層の接合型の発光ダイオ
ードチップが製造できた（従来は、ｉ層半絶縁層とｎ層
との接合であり、窒化ガリウム系化合物半導体では、ｐ
層の形成はできなかった。）ので、動作電圧を下げるこ
とができ、また、青色の発光高度を著しく向上させるこ
とができた。
この高輝度化により、その青色を１つの原色として他の
発光と混合させて、高範囲の可変色制御が可能となった
。However, since a high-intensity blue light-emitting diode cannot be obtained conventionally, a variable color light-emitting diode that changes blue as one primary color is not known. An object of the present invention is to provide a variable color light emitting diode that includes blue as a primary color. According to the present invention, the present inventors were able to manufacture, for the first time, a p-layer and n-layer junction type light emitting diode chip made of a gallium nitride-based compound semiconductor (conventionally, a junction type light emitting diode chip between an i-layer semi-insulating layer and an n-layer was manufactured). In the gallium nitride compound semiconductor, p
No layer could be formed. ), the operating voltage could be lowered, and the blue light emission height could be significantly improved. This increase in brightness has made it possible to control colors over a wide range by mixing the blue color with other emitted light as a primary color.
上記ｍａを解決するための発明の構成は、ｐ型を示す窒
化ガリウム系化合物半導体（ＡｌｙＧａｌ−Ｘ１４；ｘ
＝０を含む）からなるｐ層と、ｐ層に接合するｎ型窒化
ガリウム系化合物半導体（Ａ１ｘＧｔｌ＋−ｘＮ：Ｘ＝
０を含む）から成るｎ層とを有し、ｐ層及びｎ層の電極
が同一平面上に形成された第１の発光ダイオードチップ
と、第１の発光ダイオードチップと異なる発光色を有す
る第２の発光ダイオードチップと、第１の発光ダイオー
ドチップの両電極が接合される離間して形成された第１
及び第２のランドを有し、その一方のランドは第２の発
光ダイオードチップの１つの電極が接合されており、そ
のランドと離間して形成され、第２の発光ダイオードチ
ップの他の電極がリード接続される第３のランドを有す
るリードフレームとを設けたことである。
尚、ｐ層のドーピング元素は、例えば、マグネシウム（
Ｍｇ）である、、Ｈ８を単にドーピングした場合には、
ｉ型（絶縁）とな・る。このｉ型の層に電子線を照射す
ることで、ｐ導電型に変化させることができる。電子線
の照射条件としては、−例であるが、加速電圧ＩＫＶ〜
５０ＫＶ、試料電流０．１μＡ〜１’ｍ Ａである。The configuration of the invention for solving the above ma is a p-type gallium nitride compound semiconductor (AlyGal-X14; x
=0), and an n-type gallium nitride compound semiconductor (A1xGtl+-xN:X=
a first light-emitting diode chip having an n-layer consisting of n-layers (including 0), in which the p-layer and n-layer electrodes are formed on the same plane; a first light emitting diode chip and a first light emitting diode chip formed apart from each other to which both electrodes of the first light emitting diode chip are joined.
and a second land, one of the lands is connected to one electrode of the second light emitting diode chip, is formed apart from the land, and the other electrode of the second light emitting diode chip is connected to the land. A lead frame having a third land to which the lead is connected is provided. Note that the doping element for the p layer is, for example, magnesium (
When simply doping H8, which is Mg),
I type (insulated). By irradiating this i-type layer with an electron beam, it can be changed to p-type conductivity. As an example, the electron beam irradiation conditions include an acceleration voltage of IKV~
50 KV, sample current 0.1 μA to 1′ mA.
第１の発光ダイオードチップは、従来のｉ層とｎ層との
接合に代えて、ｐ層とｎ層との接合で構成されている。
この結果、動作電圧が低下し注入キャリアの量が増加し
、発光効率及び発光輝度を向上させることができた。
又、第２の発光ダイオードチップは、青色以外の色を発
光する。又、リードフレームは３つのランドを有しおり
、第１及び第２のランドに対して９Ｊ１の発光ダイオー
ドチップの電極が接合される。
又、ＷＪｌ又は第２のランドに第２の発光ダイオードチ
ップの第１の電極が接合されており、ｇＪ２の発光ダイ
オードチップの第２の電極は第３のランドとリード接続
されている。このような構成により、発光色の異なる２
つの発光ダイオードチップを集積することができ、両発
光ダイオードチップの電極間の印加電圧を調整すること
で、発光色を可変することができる。特に、第１の発光
ダイオードチップにおいて、ｐｎ接合が可能となり青色
の発光輝度を向上させることが出来たので、可変色の範
囲を拡大することができた。The first light emitting diode chip is composed of a junction between a p layer and an n layer instead of a conventional junction between an i layer and an n layer. As a result, the operating voltage was reduced and the amount of injected carriers increased, making it possible to improve luminous efficiency and luminance. Further, the second light emitting diode chip emits a color other than blue. Further, the lead frame has three lands, and the electrodes of the light emitting diode chip 9J1 are bonded to the first and second lands. Further, the first electrode of the second light emitting diode chip is connected to WJl or the second land, and the second electrode of the light emitting diode chip of gJ2 is lead-connected to the third land. With this configuration, two luminescent colors with different colors can be produced.
Two light emitting diode chips can be integrated, and the color of the emitted light can be varied by adjusting the voltage applied between the electrodes of both light emitting diode chips. In particular, in the first light emitting diode chip, a pn junction became possible and blue light emission brightness could be improved, so the range of variable colors could be expanded.
以下、本発明を具体的な実施例に基づいて説明する。
まず、第１の発光ダイオードチップ１０の構成について
説明する。
第１図において、発光ダイオードチップ１０は、サファ
イア基板１を有しており、そのサファイア基板１に５０
０人のＡＩＭのバッファ層２が形成されている。そのバ
ッファ層２の上には、順に、膜厚的２．２μｍのＧａＮ
から成る高キヤリア濃度ｎ十暦３と膜厚的１．５μｍの
ＧａＮから成る低キヤリア濃度ｎ層４が形成されており
、更に、低キヤリア濃度ｎ層４の上に膜厚的０．２μｍ
のＧａＮから成る９層５が形成されている。そして、９
層５に接続するアルミニウムで形成さ１れた電極７と高
キャリア濃・度ｎ＋層３に達するアルミニウムで形成さ
れた電極８とが形成されている。
次に、この構造の第１の発光ダイオード１０の製造方法
について説明する。
上記発光ダイオード１０は、有機金属化合物気相成長法
（以下ｒＭＯＶＰｔｌ Ｊと記す）による気相成長によ
り製造された。
用いられたガスは、ＮＨａとキャリアガスＨ２とトリメ
チルガリウム（Ｇａ （ＣＬ） −） （以下ｒＴＭＧ
Ｊ ト記す）とトリメチルアルミニウム（ＡＩ（Ｃｌ
（、）、） （以下ｒＴＭＡＪと記す）とシラン（Ｓｉ
Ｈ，）とシクロペンタジェニルマグネシウムＭｇ （Ｃ
５Ｈ８） ２ （以下ｒｃＰ２ＭｇＪと記す）である。
まず、洗浄したａ面を主面とする単結晶のサファイア基
板１をＭＯＶＰＥ装置の反応室に載置されたサセプタに
装着する。
次に、常圧でＨ２を流速２１ ／分で反応室に流しなが
ら温度１１００℃でサファイア基板１を気相エツチング
した。
次に、温度を４００℃まで低下させて、Ｈ３を２０１／
分、ＮＨ３を１０１／分、ＴＭＡをＨ３でバブリングし
て１．８ Ｘｌ０−’モル／分で供給してＡＩＮのバッ
ファ層２が約５００人の厚さに形成された。
次に、サファイア基板１の温度を１１５０℃に保持し、
■２を２０１／分、ＮＨ，を１０１／分、ＴＭＧをＨ２
をバブリングして１．７ Ｘｌ０−’モル／分、Ｈ３で
０．８６ｐｐｍまで希釈したシラン（ＳｉＨ４）を２０
０ｎｊ！／分の割合で３０分間供給し、膜厚約２．２μ
ｍ１キヤリア濃度１゜５×１０１ｓ／ＣＩＩＩのＧａＮ
から成る高キヤリア濃度ｎ４層３を形成した。
続いて、サファイア基板１の温度を１１５０℃に保持し
、Ｈ２を２０１７分、ＮＨｓを１０１／分、ＴＭＧを１
．７Ｘ １０−’モル／分の割合で２０分間供給し、膜
厚約１゜５μｍ１キヤリア濃度ｌｘ １０”／ ｃａｔ
のＧａＮから成る低キヤリア濃度ｎ層４を形成した。
次に、サファイア基板１を９００℃にして、Ｈ２を２０
１７分、ＮＨｌｌを１０１／分、ＴＭＧをＨ３でバブリ
ングして１．７ ｘｉｏ−’モル／分、ＣｈＭｇをＨ２
でバブリングして３Ｘ １０−’モル／分の割合で３分
間供給して、膜厚０．２μｍのＧａＮから成る１層５を
形成した。この状態では、１層５は絶縁体である。
次に、反射電子線回折装置・を用いて、この１層５に一
様に電子線を照射した。電子線の照射条件は、加速電圧
１０ＫＶ、試料電流１μＡ１ビームの移動速度０．２ｍ
ｍ／ｓｅｃ 、ビーム径６０μｍφ、真空度２゜Ｉ Ｘ
１０−’Ｔｏｒｒである。この電子線の照射により、
１層５は抵抗率は１０＠Ω叩以上の絶縁体から抵抗率３
５Ω印のｐ導電型半導体となった。このようにして、ｐ
導電型を示す９層５が得られる。
このようにして、第２図に示すような多層構造のウェハ
が得られた。
以下に述べられる第３図から第７図は、ウェハ上の１つ
の素子のみを示す断面図であり、実際は、この素子が連
続的に繰り返されたウェハについて、処理が行われ、そ
の後、各素子毎に切断される。
第３図に示すように、９層５の上に、スパッタリングに
よりＳｉｎ、層１１を２００ＯＡの厚さに形成した。次
に、そのＳ＋０２層１１上にフォトレジスト１２を塗布
して、フォトリソグラフにより、そのフォトレジスト１
２を高キヤリア濃度ｎ１層３に対する電極形成部位Ａと
、その電極形成部位Ａを９層５に対する電極と絶縁分離
するための溝を形成する部位Ｂを除去したパターンに形
成した。
次に、第４図に示すように、フォトレジスト１２によっ
て覆われていない５ｉｎｓ層１１をフッ化水素酸系エツ
チング液で除去した。
次に、第５図に示すように、フォトレジスト１２及びＳ
ｉＯ＊層１１層上１て覆われていない部位の９層５とそ
の下の低キヤリア濃度ｎ層４と高キヤリア濃度ｎ１層３
の上面一部を、真空度０．０４Ｔｏｒｒ、高周波電力０
．４４１１／ＣＩＩＩ、 ＣＣｊ？、Ｆ、ガスを１０ｄ
／分の割合で供給しドライエツチングした後、引き続い
てＡｒでドライエツチングした。
次に、第６図に示すように、９層５上に残っているＳ＋
０２層１１をフッ化水素酸で除去した。
次に、第７図に示すように、試料の上全面に、Ａ１層１
３を蒸着により形成した。そして、そのＡＩ層１３の上
にフォトレジスト１４を塗布して、フォトリソグラフに
より、そのフォトレジスト１４が高キヤリア濃度ｎ＋層
３及び９層５に対する電極部が残るように、所定形状に
パターン形成した。
次に、第７図に示すようにそのフォトレジスト１４をマ
スクとして下層のＡ１層１３の露出部を硝酸系エツチン
グ液でエツチングし、フォトレジスト１４をアセトンで
除去し、第１図に示すように高キャリア濃度ｎ“層３の
電極８．９層５の電極７を形成した。
その後、上記の如く処理されたウェハは、各素子毎に切
断され、第１図に示すｐｎ構造の窒化ガリウム系発光素
子を得た。
このようにして製造された発光ダイオード１０の発光強
度を測定したところｌｏｍｃｄであった。これは、単純
にｉ層とキャリア濃度５ｘ １０′？／ ａｄ。
厚さ４μｍのｎ層とを接続した従来の発光ダイオードに
比べて、発光強度が１０倍に向上した。
又、発光面を観察した所、発光点の数が増加しているこ
とも観察された。
尚、比較のために、低キヤリア濃度ｎ層４のキャリア濃
度を各種変化させた上記試料を製造して、発光強度及び
発光スペクトラムを測定した。その結果を、第８図に示
す。
キャリア濃度が増加するに連れて、発光強度が減少し、
且つ、発光波長が赤色側に変位することが分かる。この
ことは、ドーピング元素のシリコンが９層５に不純物元
素として拡散または混入するためであると思われる。
尚、上記低キヤリア濃度ｎ層４のキャリア濃度はＩ Ｘ
１０”〜ｌｘ １０”／ ｃｘｌで膜厚は０．５〜２
／ｊｍが望ましい。キャリア濃度が１ｘｌＯ”／ｃ！１
以上となると発光強度が低下するので望ましくなく、Ｉ
ＸＩＱ”／ｃｏ！以下となると発光素子の直列抵抗が高
くなりすぎ電流を流すと発熱するので望ましくない。又
、膜厚が２μｍ以上となると発光素子の直列抵抗が高く
なりすぎ電流を流すと発熱するので望ましくなく、膜厚
が０．５μｍ以下となると発光強度が低下するので望ま
しくない。
更に、高キヤリア濃度ｎ４層３のキャリア濃度はｌｘ
ＩＱＩ７〜ｌｘ １０”／ ｃｏ！で膜厚は２〜１０μ
ｍが望ましい。キャリア濃度がｌＸ１０”／ａ＋！以上
となると結晶性が悪化するので望ましくなく、ｌＸ１０
”／ｃｕｔ以下となると発光素子の直列抵抗が高くなり
すぎ電流を流すき発熱するので望ましくない。
又、膜厚が１０μｍ以上となると基板が湾曲するので望
ましくなく、膜厚が２μｍＪ２Ｊ下きなると発光素子の
直列抵抗が高くなりすぎ電流を流すと発熱するので望ま
しくない。
次に、可変色発光ダイオード３０について説明する。
第１０図、第１１図において、リードフレーム２０は間
隔を隔てて並列に配設された正負一対の第１及び第２の
リード部材４１．３１、第３のリード部材３５により構
成されている。
第１及び第２のリード部材４１．３１にはそれらの先端
部４２．３２に第１及び第２のランドを構成する平坦部
４３．３３が形成されており、その平坦部４３．３３に
続いて外側に傾斜した反射部４４．３４が一体的に形成
されている。又、第３のリード部材３５の端面３５１は
第３のランドを構成している。
このようなリード部材４１．３１の平坦部（第１及び第
２のランド）４３．３３に、前述した第１の発光ダイオ
ードチップ１０が架橋され、そのチップ１０の電極７，
８が、それぞれ、平坦部４３．３３に対して導電性ペー
ストでバンブ接合されている。
又、第２の発光ダイオードチップ３６は、第１２図に示
すように、ｐ−Ａｊ’ＧａＡｓ層３６１とｎ−ＡｌＧａ
Ａｓ層３６２とを有し、ｐ−ＡＡ’ＧａＡｓＡｌＧａＡ
ｓ層３６２ＧａＡｓ層３６２の上面に、それぞれ、金糸
の電極３６３，３８４が形成されている。
第２の発光ダイオードチップ３６は、一方の面側にある
電極３６３は第２のリード部材３１の平坦部（第２のラ
ンド）３３に載置され、導電性ペーストによって接合さ
れている。又、他方の面倒にある電極３６４は第３のリ
ード部材３５の端面（第３のランド）３５１と金線３７
によりワイヤボンディングされている。
次に、第１の発光ダイオードチップ１ｏと第２の発光ダ
イオードチップ３６とが接合されたリードフレーム２０
には、第・９図に示すように、エポキシ樹脂等の透明樹
脂がポツティングされる。このボッティングによりレン
ズ部材３９が成形される。
このような配設状態において、第１のリード部材４１、
第２のリード部材３１、第３のリード部材３５の順に、
低くなる正電位を印加することで、第１の発光ダイオー
ドチップ１ｏと第２の発光ダイオードチップ３６は共に
順方向のバイアスが印加され、共に発光する。このとき
可変色発光ダイオード３０は、全体として、赤紫色で発
光する。
又、第１のリード部材４１と第２のリード部材３１０間
にのみ、正電圧を印加すると、第１の発光ダイオードチ
ップ１ｏのみが発光し、この可変色発光ダイオード３０
は青色で発光する。又、第２のリード部材３１と第３の
リード部材３５間にのみ、正電圧を印加すると、第２の
発光ダイオードチップ３６のみが発光し、この可変色発
光ダイオード３０は赤色で発光する。
又、各リード部材に印加する電圧の大きさを変化させる
ことで青、赤の間の混合色の発光が可能となる。
以上述べたように、第１の発光ダイオードチップ１０を
ｐ層とｎ層とのｐｎ接合で構成すると共にｎ層を低キヤ
リア濃度ｎ層と高キヤリア濃度ｎ１層との二重構造とし
たので、青色ＬＥＤの動作電圧を低くすることができ、
青色発光の輝度を向上させることができた。この結果、
初めて、赤色との混合が可能となり、高範囲の発光色の
制御が可能となった。
以上の実施例では、第１の発光ダイオードチップのｎ層
は低キヤリア濃度ｎ層と高キヤリア濃度ｎ＋層との二重
構造としているが、単層構造であっても良い。ｎ層が単
層構造であっても、ｐｎ接合による発光ダイオードは、
従来のｉ層とｎ層との接合による発光ダイオードよりは
、発光効率及び発光効率が向上するので、上記実施例と
同様に他の色の発光ダイオードと組み合わせることが可
能である。
又、マグネシウムＭｇのドーピングガスは、上述のガス
の他、メチルシクロペンタジェニルマグネシウムＭｇ（
Ｃ５Ｈ５）Ｃ１８を用いても良い。
又、第２の発光ダイオードチップの発光色は赤色とした
が、ＧａＰ等の緑色発光の発光ダイオードチップを用い
ても良い。
又、リードフレーム２０を上記の構造とすることで、２
つの発光ダイオードチップ１０．３６の表面から出た光
に加えて、それら２つのチップの端面から出た光も第１
のリード部材４１．ｉ２のリード部材３１に設けられた
反射部４４．３４により前方に反射されるので、発光効
率を向上させることができる。
他の実施例
ｐｎ接合を有する第１の発光ダイオード１０は、次のよ
うにして製造することもできる。
上述したのと同様な方法で、第２図に示すように各層を
積層させる。ただし、９層５に代えて１層５０ （第１
３図）が積層されている。即ち、１層５０には電子線が
照射されていない。従って、この積層状態では、１層５
０は半絶縁体（ｉ型）である。
次に、この積層されたウェハにおいて、第１３図に示す
ように、１層３に対する電極形成部位Ａだけに、エツチ
ングにより溝が形成された。
次に、第１４図に示すように、１層５０の一部にのみ、
電子線を照射して、ｐ導電型半導体のｐ型部５が形成さ
れた。この時、ｐ型部５以外の部分、即ち、電子線の照
射されなかった部分は、半絶縁体の１層５０のままであ
る。従って、ｐ型部５は、縦方向に対しては、１層３と
ｐｎ接合を形成するが、横方向には、９層５は、周囲に
対して、１層５０により電気的に絶縁分離される。
次に、第１５図に示すように、ｐ型部５と１層５０と１
層３に対する電極形成部位Ａの上全面に、Ａ１層６０が
蒸着により形成さ
れた。そして、そのＡｆ層６０の上にフォトレジスト６
１を塗布して、フォトリソグラフにより、そのフォトレ
ジスト６１が１層３及び９層５に対する電極部が残るよ
うに、所定形状にパターン形成した。
次に、そのフォトレジスト６１をマスクとして下層のへ
１層６０の露出部を硝酸系エツチング液でエツチングし
、フォトレジスト６１をアセトンで除去し、第１６図に
示すように、１層３の電極５２、ｐ型部５の電極５１を
形成した。
その後、上述のように形成されたウェハが各素子毎に切
断され、ｐｎ接合を有する第１の発光ダイオードチップ
が得られた。The present invention will be described below based on specific examples. First, the configuration of the first light emitting diode chip 10 will be explained. In FIG. 1, a light emitting diode chip 10 has a sapphire substrate 1, and a sapphire substrate 1 has a
A buffer layer 2 of 0 AIMs is formed. On the buffer layer 2, GaN with a film thickness of 2.2 μm is sequentially formed.
A high carrier concentration n layer 4 made of GaN with a film thickness of 1.5 μm is formed on the low carrier concentration n layer 4 with a film thickness of 0.2 μm.
Nine layers 5 made of GaN are formed. And 9
An electrode 7 made of aluminum that connects to the layer 5 and an electrode 8 made of aluminum that reaches the high carrier concentration n+ layer 3 are formed. Next, a method for manufacturing the first light emitting diode 10 having this structure will be described. The light emitting diode 10 was manufactured by vapor phase growth using an organometallic compound vapor phase growth method (hereinafter referred to as rMOVPtl J). The gases used were NHa, carrier gas H2, and trimethyl gallium (Ga (CL) -) (hereinafter rTMG).
J ) and trimethylaluminum (AI (Cl
(,),) (hereinafter referred to as rTMAJ) and silane (Si
H,) and cyclopentadienylmagnesium Mg (C
5H8) 2 (hereinafter referred to as rcP2MgJ). First, a cleaned single-crystal sapphire substrate 1 having the a-plane as its main surface is mounted on a susceptor placed in a reaction chamber of a MOVPE apparatus. Next, the sapphire substrate 1 was subjected to vapor phase etching at a temperature of 1100° C. while flowing H2 into the reaction chamber at a flow rate of 21/min at normal pressure. Next, reduce the temperature to 400°C and reduce H3 to 201/
The buffer layer 2 of AIN was formed to a thickness of about 500 nm by bubbling NH3 with H3 and supplying 1.8 Xl0-' mol/min. Next, the temperature of the sapphire substrate 1 is maintained at 1150°C,
■201/min, NH, 101/min, TMG H2
Silane (SiH4) diluted to 0.86 ppm with H3 at 1.7
0nj! /min for 30 minutes, film thickness approximately 2.2μ
m1 carrier concentration 1°5×101s/CIII GaN
A high carrier concentration n4 layer 3 was formed. Subsequently, the temperature of the sapphire substrate 1 was maintained at 1150°C, and H2 was heated for 2017 minutes, NHs was heated at 101/min, and TMG was heated at 1/min.
．． Supplied for 20 minutes at a rate of 7X 10-' mol/min, film thickness approximately 1°5 μm, 1 carrier concentration lx 10"/cat
A low carrier concentration n-layer 4 made of GaN was formed. Next, the sapphire substrate 1 is heated to 900°C and H2 is heated to 20°C.
17 min, NHll at 101/min, TMG by bubbling with H3 to 1.7 xio-' mol/min, ChMg into H2
One layer 5 of GaN having a thickness of 0.2 μm was formed by bubbling with the gas and supplying the material at a rate of 3×10 −′ mol/min for 3 minutes. In this state, the first layer 5 is an insulator. Next, this single layer 5 was uniformly irradiated with an electron beam using a reflection electron beam diffraction apparatus. The electron beam irradiation conditions were an acceleration voltage of 10 KV, a sample current of 1 μA, and a beam movement speed of 0.2 m.
m/sec, beam diameter 60μmφ, degree of vacuum 2゜I
10-'Torr. By irradiating this electron beam,
1 layer 5 has a resistivity of 3 from an insulator with a resistivity of 10@Ω or more.
It became a p-conductivity type semiconductor with a 5Ω mark. In this way, p
Nine layers 5 are obtained, each exhibiting a conductivity type. In this way, a wafer with a multilayer structure as shown in FIG. 2 was obtained. 3 to 7 described below are cross-sectional views showing only one element on a wafer; in reality, processing is performed on a wafer in which this element is successively repeated, and then each element is disconnected every time. As shown in FIG. 3, a layer 11 of Sin was formed to a thickness of 200 OA on the 9 layers 5 by sputtering. Next, a photoresist 12 is coated on the S+02 layer 11, and the photoresist 12 is applied by photolithography.
2 was formed into a pattern in which the electrode formation area A for the high carrier concentration n1 layer 3 and the area B for forming a groove for insulating and separating the electrode formation area A from the electrode for the 9 layer 5 were removed. Next, as shown in FIG. 4, the 5ins layer 11 not covered by the photoresist 12 was removed using a hydrofluoric acid etching solution. Next, as shown in FIG.
iO* layer 11, top layer 1, uncovered portion 9 layer 5, lower carrier concentration n layer 4 and high carrier concentration n layer 3
A part of the upper surface of the
．． 4411/CIII, CCj? , F, gas 10d
After dry etching was carried out by supplying the film at a rate of 1/min, dry etching was performed using Ar. Next, as shown in FIG.
02 layer 11 was removed with hydrofluoric acid. Next, as shown in FIG. 7, an A1 layer 1
3 was formed by vapor deposition. Then, a photoresist 14 was coated on the AI layer 13, and the photoresist 14 was patterned into a predetermined shape by photolithography so that electrode portions for the high carrier concentration n+ layer 3 and 9 layer 5 remained. . Next, as shown in FIG. 7, using the photoresist 14 as a mask, the exposed portion of the lower A1 layer 13 is etched with a nitric acid-based etching solution, and the photoresist 14 is removed with acetone. An electrode 8 of the high carrier concentration n'' layer 3 and an electrode 7 of the layer 5 were formed.Then, the wafer processed as described above was cut into individual devices, and a gallium nitride based pn structure shown in FIG. A light emitting device was obtained. The light emitting intensity of the light emitting diode 10 manufactured in this manner was measured and found to be LOMCD. This is simply the i layer and the carrier concentration of 5x 10'?/ad. Compared to conventional light emitting diodes that connect layers, the light emission intensity was improved 10 times.Also, when observing the light emitting surface, it was observed that the number of light emitting points increased. For this purpose, the above samples were manufactured with various carrier concentrations in the low carrier concentration n-layer 4, and the emission intensity and emission spectrum were measured.The results are shown in Fig. 8.As the carrier concentration increases, As a result, the emission intensity decreases,
Moreover, it can be seen that the emission wavelength shifts to the red side. This seems to be because silicon, which is a doping element, is diffused or mixed into the 9th layer 5 as an impurity element. The carrier concentration of the low carrier concentration n-layer 4 is IX
10"~lx 10"/cxl, film thickness 0.5~2
/jm is desirable. Carrier concentration is 1xlO”/c!1
If it is more than that, the emission intensity will decrease, which is undesirable, and I
XIQ"/co! or less is undesirable because the series resistance of the light emitting element becomes too high and generates heat when current is passed through it. Also, when the film thickness exceeds 2 μm, the series resistance of the light emitting element becomes too high and heat generation occurs when current flows through it, which is undesirable. If the film thickness is less than 0.5 μm, the emission intensity will decrease, which is undesirable.Furthermore, the carrier concentration of the high carrier concentration n4 layer 3 is lx
IQI 7~lx 10"/co! and film thickness 2~10μ
m is desirable. If the carrier concentration exceeds lX10"/a+!, it is undesirable because the crystallinity deteriorates.
``/cut or less is undesirable because the series resistance of the light emitting element becomes too high, causing current to flow and generating heat.Furthermore, if the film thickness is 10 μm or more, the substrate will curve, which is undesirable.If the film thickness is less than 2 μmJ2J, no light will be emitted. This is not desirable because the series resistance of the element becomes too high and heat is generated when current is passed through it.Next, the variable color light emitting diode 30 will be explained.In Figs. 10 and 11, the lead frames 20 are arranged in parallel at intervals. It is composed of a pair of positive and negative lead members 41.31 and a third lead member 35.The first and second lead members 41.31 have their tip portions 42.32. A flat portion 43.33 constituting the first and second lands is formed at the top, and a reflective portion 44.34 that slopes outward is integrally formed following the flat portion 43.33. , the end surface 351 of the third lead member 35 constitutes a third land.The flat portions (first and second lands) 43.33 of the lead member 41.31 are A light emitting diode chip 10 is cross-linked, and the electrodes 7 of the chip 10,
8 are bump-bonded to the flat portions 43 and 33 using conductive paste, respectively. Further, the second light emitting diode chip 36 has a p-Aj'GaAs layer 361 and an n-AlGaAs layer 361, as shown in FIG.
As layer 362, p-AA'GaAsAlGaA
Gold thread electrodes 363 and 384 are formed on the upper surface of the S layer 362 and the GaAs layer 362, respectively. In the second light emitting diode chip 36, the electrode 363 on one side is placed on the flat part (second land) 33 of the second lead member 31, and is bonded with a conductive paste. Further, the electrode 364 on the other side is connected to the end surface (third land) 351 of the third lead member 35 and the gold wire 37.
wire bonded. Next, the lead frame 20 to which the first light emitting diode chip 1o and the second light emitting diode chip 36 are bonded is assembled.
As shown in FIG. 9, transparent resin such as epoxy resin is potted. The lens member 39 is molded by this botting. In such an arrangement state, the first lead member 41,
In the order of the second lead member 31 and the third lead member 35,
By applying a lower positive potential, a forward bias is applied to both the first light emitting diode chip 1o and the second light emitting diode chip 36, and both of them emit light. At this time, the variable color light emitting diode 30 emits red-purple light as a whole. Further, when a positive voltage is applied only between the first lead member 41 and the second lead member 310, only the first light emitting diode chip 1o emits light, and this variable color light emitting diode 30
emits blue light. Further, when a positive voltage is applied only between the second lead member 31 and the third lead member 35, only the second light emitting diode chip 36 emits light, and this variable color light emitting diode 30 emits red light. Furthermore, by changing the magnitude of the voltage applied to each lead member, it is possible to emit light in a mixed color between blue and red. As described above, since the first light emitting diode chip 10 is composed of a pn junction of a p layer and an n layer, and the n layer has a double structure of a low carrier concentration n layer and a high carrier concentration n1 layer, The operating voltage of the blue LED can be lowered,
The brightness of blue light emission could be improved. As a result,
For the first time, it has become possible to mix with red, making it possible to control a wide range of emitted colors. In the above embodiments, the n layer of the first light emitting diode chip has a double structure consisting of a low carrier concentration n layer and a high carrier concentration n+ layer, but it may have a single layer structure. Even if the n-layer has a single layer structure, a light emitting diode with a pn junction
Since the light emitting efficiency and luminous efficiency are improved compared to the conventional light emitting diode formed by joining an i layer and an n layer, it is possible to combine it with light emitting diodes of other colors as in the above embodiment. In addition to the above-mentioned gases, the doping gas for magnesium Mg is methylcyclopentadienylmagnesium Mg (
C5H5)C18 may also be used. Further, although the second light emitting diode chip emitted light in red, a green light emitting diode chip such as GaP may be used. In addition, by making the lead frame 20 have the above structure, 2
In addition to the light emitted from the surfaces of the two light emitting diode chips 10.36, the light emitted from the end faces of those two chips is also
Lead member 41. Since the light is reflected forward by the reflecting portion 44.34 provided on the lead member 31 of i2, the light emitting efficiency can be improved. Other Examples The first light emitting diode 10 having a pn junction can also be manufactured as follows. In a manner similar to that described above, each layer is laminated as shown in FIG. However, instead of 9 layers 5, 1 layer 50 (1st
Figure 3) are stacked. That is, the first layer 50 is not irradiated with the electron beam. Therefore, in this laminated state, one layer has 5
0 is a semi-insulator (i-type). Next, in this stacked wafer, as shown in FIG. 13, a groove was formed by etching only in the electrode forming area A for one layer 3. Next, as shown in FIG. 14, only a part of the first layer 50 has
A p-type portion 5 of a p-conductivity type semiconductor was formed by irradiation with an electron beam. At this time, the portion other than the p-type portion 5, that is, the portion not irradiated with the electron beam, remains as a single layer 50 of semi-insulator. Therefore, the p-type part 5 forms a pn junction with the first layer 3 in the vertical direction, but in the horizontal direction, the nine layers 5 are electrically isolated from the surroundings by the first layer 50. be done. Next, as shown in FIG.
An A1 layer 60 was formed by vapor deposition over the entire upper surface of the electrode formation site A for layer 3. Then, a photoresist 6 is applied on top of the Af layer 60.
1 was applied, and the photoresist 61 was patterned into a predetermined shape by photolithography so that electrode portions for the 1st layer 3 and the 9th layer 5 remained. Next, using the photoresist 61 as a mask, the exposed portion of the lower layer 1 60 is etched with a nitric acid-based etching solution, and the photoresist 61 is removed with acetone, so that the electrodes of the layer 1 3 are etched as shown in FIG. 52, the electrode 51 of the p-type part 5 was formed. Thereafter, the wafer formed as described above was cut into each element to obtain a first light emitting diode chip having a pn junction.
第１図は本発明の具体的な一実施例に係る可変色発光ダ
イオードの１つの構成要素の第１の発光ダイオードチッ
プの構成を示した構成図、第２図乃至第７図はその発光
ダイオードチップの製造工程を示した断面図、第８図は
低キャリア濃度ｎ層のキャリア濃度と発光強度及び発光
波長との関係を示した測定図、第９図は同実施例の可変
色発光ダイオードの全体の構成を示した縦断面図、第１
０図は同可変色発光ダイオードのリードフレームを示し
た縦断面図。９Ｊ１１図は第１０図におけるリードフレ
ームを発光ダイオードチップ側から見た平面図。第１２
図は、第２の発光ダイオードチップの構成を示した構成
図。第１３図乃至第１５図は、他の製造方法による第１
の発光ダイオードの製造工程を示した断面図。第１６図
は他の製造方法による第１の発光ダイオ−゛トチツブの
構成を示した構成図である。
１０−゛第１の発光ダイオード
１ ”−サファイア基板 ２′−″バッファ層３−高キ
ャリア濃度ｎ＋層、ｎ層
４°゛・−低キヤリア濃度ｎ層 ５°°ｐ層５０・−１
層 ？、８，５１．５２°゛電極４１′第１のリード部
材
３１ ゛第２のリード部材
３５ 第３のリード部材
４３．３３．３５１゛・・平坦部（第１、第２、第３の
ランド） ４４．３１・−反射部３６−第２の発光
ダイオードチップ
３９゛−・レンズ部材
２０− リードフレーム
特許出願人 ・豊田合成株式会社FIG. 1 is a block diagram showing the configuration of a first light emitting diode chip, which is one component of a variable color light emitting diode according to a specific embodiment of the present invention, and FIGS. 2 to 7 are diagrams showing the structure of the light emitting diode. FIG. 8 is a cross-sectional view showing the manufacturing process of the chip. FIG. 8 is a measurement diagram showing the relationship between the carrier concentration of the low carrier concentration n-layer, the emission intensity, and the emission wavelength. FIG. Longitudinal cross-sectional view showing the overall configuration, 1st
Figure 0 is a vertical sectional view showing the lead frame of the variable color light emitting diode. 9J11 is a plan view of the lead frame in FIG. 10, viewed from the light emitting diode chip side. 12th
The figure is a configuration diagram showing the configuration of a second light emitting diode chip. FIG. 13 to FIG. 15 show the first
FIG. FIG. 16 is a block diagram showing the structure of a first light emitting diode chip produced by another manufacturing method. 10-゛First light emitting diode 1 "-Sapphire substrate 2'-"Buffer layer 3-High carrier concentration n+ layer, n layer 4°.--Low carrier concentration n layer 5°°p layer 50.-1
Layer? , 8, 51.52°゛Electrode 41'First lead member 31゛Second lead member 35 Third lead member 43.33.351゛...Flat part (first, second, third land) ) 44.31 - Reflection part 36 - Second light emitting diode chip 39 - Lens member 20 - Lead frame patent applicant - Toyoda Gosei Co., Ltd.
Claims (1)
＿１＿−＿ＸＮ；Ｘ＝０を含む）からなるｐ層と、前記
ｐ層に接合するｎ型窒化ガリウム系化合物半導体（Ａｌ
＿ＸＧａ＿１＿−＿ＸＮ；Ｘ＝０を含む）から成るｎ層
とを有し、前記ｐ層及び前記ｎ層の電極が同一面上に形
成された第１の発光ダイオードチップと、 前記第１の発光ダイオードチップと異なる発光色を有す
る第２の発光ダイオードチップと、前記第１の発光ダイ
オードチップの両電極が接合される離間して形成された
第１及び第２のランドを有し、その一方のランドは前記
第２の発光ダイオードチップの１つの電極が接合されて
おり、そのランドと離間して形成され、前記第２の発光
ダイオードチップの他の電極がリード接続される第３の
ランドを有するリードフレームとを有する可変色発光ダ
イオード。[Claims] Gallium nitride-based compound semiconductor (Al_XGa
_1_-_XN; including X=0), and an n-type gallium nitride compound semiconductor (Al
a first light emitting diode chip having an n layer consisting of _XGa_1_−_XN; a second light emitting diode chip having a different emission color from that of the chip, and first and second lands formed apart to which both electrodes of the first light emitting diode chip are bonded, one of the lands; is a lead to which one electrode of the second light emitting diode chip is bonded, a third land formed apart from the land and to which the other electrode of the second light emitting diode chip is connected as a lead; A variable color light emitting diode having a frame.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2290054A JPH04163972A (en) | 1990-10-27 | 1990-10-27 | Variable color light emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2290054A JPH04163972A (en) | 1990-10-27 | 1990-10-27 | Variable color light emitting diode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04163972A true JPH04163972A (en) | 1992-06-09 |
Family
ID=17751191
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2290054A Pending JPH04163972A (en) | 1990-10-27 | 1990-10-27 | Variable color light emitting diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04163972A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06151968A (en) * | 1992-10-29 | 1994-05-31 | Toyoda Gosei Co Ltd | Nitrogen-iii group semiconductor luminous element and manufacture thereof |
| JPH07335942A (en) * | 1994-06-14 | 1995-12-22 | Nichia Chem Ind Ltd | Full-color led display |
| WO1998034285A1 (en) * | 1997-01-31 | 1998-08-06 | Matsushita Electronics Corporation | Light emitting element, semiconductor light emitting device, and method for manufacturing them |
| US6357889B1 (en) | 1999-12-01 | 2002-03-19 | General Electric Company | Color tunable light source |
| CN100405622C (en) * | 1997-01-31 | 2008-07-23 | 松下电器产业株式会社 | Light-emitting element |
| US8017967B2 (en) | 2004-09-09 | 2011-09-13 | Toyoda Gosei Co., Ltd. | Light-emitting element including a fusion-bonding portion on contact electrodes |
-
1990
- 1990-10-27 JP JP2290054A patent/JPH04163972A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06151968A (en) * | 1992-10-29 | 1994-05-31 | Toyoda Gosei Co Ltd | Nitrogen-iii group semiconductor luminous element and manufacture thereof |
| JPH07335942A (en) * | 1994-06-14 | 1995-12-22 | Nichia Chem Ind Ltd | Full-color led display |
| WO1998034285A1 (en) * | 1997-01-31 | 1998-08-06 | Matsushita Electronics Corporation | Light emitting element, semiconductor light emitting device, and method for manufacturing them |
| US6333522B1 (en) | 1997-01-31 | 2001-12-25 | Matsushita Electric Industrial Co., Ltd. | Light-emitting element, semiconductor light-emitting device, and manufacturing methods therefor |
| US6597019B2 (en) | 1997-01-31 | 2003-07-22 | Matsushita Electric Industrial Co., Ltd | Semiconductor light-emitting device comprising an electrostatic protection element |
| US6642072B2 (en) | 1997-01-31 | 2003-11-04 | Matsushita Electric Industrial Co., Ltd. | Light-emitting element, semiconductor light-emitting device, and manufacturing methods therefor |
| CN100405622C (en) * | 1997-01-31 | 2008-07-23 | 松下电器产业株式会社 | Light-emitting element |
| US6357889B1 (en) | 1999-12-01 | 2002-03-19 | General Electric Company | Color tunable light source |
| US8017967B2 (en) | 2004-09-09 | 2011-09-13 | Toyoda Gosei Co., Ltd. | Light-emitting element including a fusion-bonding portion on contact electrodes |
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