JPH04163621A - Memory switch control system - Google Patents

Abstract

PURPOSE:To eliminate the burden of a user, which is to frequently reload the same program of OS and the like, by switching and using one of plural memories arranged on the same address and allowing the continuous use of plural programs when they are once loaded on the memory. CONSTITUTION:A system bus 1, CPU 2, BIOS-ROM 3, a status storage memory 4, a memory switch circuit 5, the memories 6 and 7, a keyboard controller (KBC) 8, a keyboard (KB) 9, VRAM 10, a display controller 11 and a display device 12 are provided. One of plural memories 6 and 7 arranged on the same address is switched and used. When plural programs are once loaded on the memory, the continuous use of them is allowed. Thus, the burden of the user, which is to frequently reload the programs of OS and the like, is eliminated and operability can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a memory switching control method that can realize a multi-personality system and is particularly suitable for use in a personal computer.

(Prior Art) In recent years, in personal computers, not only the hardware but also the software has been substantially standardized, and efforts are being made to effectively utilize distributed software. In addition, it is essential to add value to this type of personal computer, and simple examples are designed to be able to operate in Japanese mode as well as English mode, and high-end ones have different operating systems (
Some systems have even appeared that support O8).

Hereinafter, such a system will be referred to as a multi-personality system and the explanation will continue.

By the way, conventionally, in a personal computer that can run multiple O8 programs, if one O8 program is used and then another O8 program is used, the O8 program to be used must be loaded into memory each time. I had to. For example, in the case of a personal computer that can operate English O8 and Japanese O8,
When switching from Japanese OA to English O8, -dan English O8
When switching the operation from English O8 to Japanese O8, it became necessary to load Japanese O8 into memory.

(Problems to be Solved by the Invention) According to the conventional example, when switching programs such as O8 frequently, it is necessary to reload the same program such as O8 many times, which is time consuming and troublesome.

This invention was made in view of the above circumstances, and once multiple O8 programs are loaded into memory, they can be used by switching memories without having to load them into memory multiple times. The purpose is to provide a memory switching control method.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides a plurality of memories located at the same address and storing programs such as a plurality of operating systems, and a plurality of memories located at the same address. a memory switching control circuit for switching and using one of the plurality of memories; and a memory switching control circuit for performing memory switching control when a program according to any one of the plurality of memories is executed and the execution of the program is interrupted. A status storage memory in which various necessary hardware status information is saved and used to restore the system to the state before interruption when the program is started again, and memory for multiple programs under the control of the CPU. BiO2 (basic input/output control system) that stores programs for controlling each of the above hardware, including load and memory switching control.
memory, and is characterized in that it switches to use one of a plurality of memories arranged on the same address, and once a plurality of programs are loaded into the memory, they are allowed to be used continuously. .

(Function) As described above, the present invention allows multiple O8s on the same address.
The so-called BIO is a memory in which hardware control programs are distributed and distributed, including loading multiple O8 programs to memory and controlling memory switching.
In accordance with the program stored in the S memory, various notes and hardware statuses required to perform memory switching control each time memory switching is saved and restored, and the memory switching circuit saves and restores the information in multiple memories located at the same address. This makes it possible to switch to one memory and make it usable. With this, by switching to one of the multiple memories located on the same address and making it usable,
Once multiple O8 programs are loaded into memory,
Allows you to use them as many times as you like.

This has the effect of eliminating the burden on the user of having to load programs such as O8.

(Example) Embodiments of the present invention will be described below using the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, the symbol ] is a system bus, which is used to transfer data between each piece of hardware. Reference numeral 2 denotes a CPU, which is a central processing unit that controls each 71-ware. Reference numeral 3 is a BrO3-ROM, which is a nonvolatile memory in which B) the OS is stored. Reference numeral 4 denotes a status storage memory, which is a memory that stores the status of various hardware. Reference numeral 5 denotes a memory switching circuit, which is a piece of hardware for switching the program stored in the memory 6.7, which will be described below, according to the program stored in the BrO3-ROM3. Reference numbers 6 and 7 are memories (memory A).

B), which are arranged at the same address, one of which can be used by the memory switching circuit 5, and which stores a plurality of programs such as O8.

Reference numeral 8 denotes a keyboard controller (KBC), which is a peripheral control LSI that controls the keyboard 9. code 9
is a keyboard (KB), which is a device in which the user manually presses the keys in order to switch memories. Reference numeral 10 is a video RAM (VRAM), which is a memory in which display data to be displayed on the display device 12 is stored. code 11
is a display control device, which is hardware that controls the display device 12. Reference numeral 12 is a display device, and VRAMI
This is a device that displays display data stored in O.

FIG. 2 is a flowchart illustrating the operation of the embodiment of the present invention. In the figure, reference numeral a indicates a step that is operated under the control of the program stored in the memory A (6) or the CPU 2. Step 3 is a key input step in which the user presses a specific key on KB9 to perform memory switching. Symbol C is a step in which the memory switching control program is started, and the operation of the program stored in memory A (6) is interrupted by the key input in step b, and the memory switching control program in the B I OS-ROMB is started. will be activated. Reference numeral d is a step for saving various hardware statuses for the memory A, in which the statuses of various hardwares that were operated by the program in the memory A (6) are saved in the battery-backed status storage memory 4. Symbol e is a step for memory switching, in which the memory switching circuit 5 switches from memory A (6) to memory B (7), and memory B (
7) is the step to enable use. Symbol f is a step for setting various hardware statuses for memory B, and various hardware statuses for memory B stored in the status storage memory 4 are set to the corresponding hardware. Symbol g is a step for starting the operation of the program in memory B (7), in which control is transferred to the previously interrupted program in memory B (7) and the program in memory B (7) is started.
This is the step (7) for starting the program.

The operation of the present invention will be explained below with reference to FIGS. 1 and 2. Memory A (6) and memory B (7) are arranged at the same address, and the memory switching circuit 5 determines which memory is used. These memories 6
．． It is assumed that a program including O8 to be used is loaded and stored in 7 in advance. The method of loading into memory is not particularly limited in the present invention. It is also assumed that the status storage memory 4 stores a status that determines which memory stores the program to be executed.

First, it is assumed that the memory switching circuit 5 is set so that the memory A(6) can be used, and the program stored in the memory A(6) is running. In this case, memory B (7
), the status of various hardware necessary for the program to operate is stored in the status storage memory 4, and then control is passed to the program in memory A (6).

The various types of hardware that are subject to status storage refer to hardware necessary to start the operation of the program in memory B (7). When the program in memory A (6) is in the execution state (step a), if the user presses the key on KB9 to switch the memory (step b).
), the key human power content is transmitted to the CPU 2 through the KBC 8.

This starts the memory switching control program in CPU2LtB 10108-RO (step C).

At this time, the operation of the program in memory A (6) is interrupted.

When the memory switching control program is started, the status of various hardware including the address of the program when the program in memory A (6) was interrupted is saved in the status storage memory 4 according to the program (step d). ). After this, the CPU 2 controls the memory switching circuit 5 to switch from memory A (6) to memory B (7) (
Step e), make memory B (7) available for use.

After switching the memory, the CPU 2 stores the status storage memory 4.
Step f): Set the various hardware statuses for memory B that were saved in the corresponding hardware to the corresponding hardware.
This is the state of the hardware necessary to operate the program in memory B (7). Thereafter, control is transferred to the program address for starting the operation of the program in memory B (7), and the operation of the program in memory B (7) is started (step g). Step C to Step G above
The steps up to this point are performed according to the memory switching control program.

As described above, the operation is switched from the program in memory A (6) to the program in memory B (7). Similarly, by switching the memory from memory B (7) to memory A (6), the program in memory A (6) can be used.

In this way, it is possible to reload and reuse a program such as O8 many times.

In the embodiment of the present invention, a case has been described in which the memory switching control program is activated manually using a key from the KB, but it can also be activated using a method such as a switch.

[Effects of the Invention] As explained above, according to the present invention, by switching and using one of a plurality of memories located at the same address, programs such as O8 do not have to be reloaded many times. This eliminates the burden on the user of not having to do this, and it is possible to improve operability.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a flow chart showing the operation of the embodiment of the present invention. 1...System bus, 2...CPU, 3...BI
O5-ROM, 4...Status storage memory, 5...
・Memory switching circuit, 6, 7...Memory (memory A,
Memory B), 8...Keyboard controller (KBC)
), 9...Keyboard (KB), 10...VRAM
. 11...Display control device,]2...Display device. Applicant's agent Patent attorney Takehiko Suzue

Claims (1)

[Claims] a plurality of memories arranged on the same address and storing a plurality of programs such as operating systems; a memory switching control circuit for switching and using one of the plurality of memories arranged on the same address; When a program that follows one of the memories is executed and the execution of that program is interrupted, various hardware status information necessary for memory switching control is saved and the program is started again. A status storage memory used to restore the system to the state before interruption, and a memory for controlling each of the above-mentioned hardware, including memory loading of multiple programs and memory switching control under the control of the CPU. It is equipped with a BIOS (basic input/output control system) memory in which programs are stored, and once multiple programs are loaded into the memory by switching to one of multiple memories located on the same address, A memory switching control method characterized by allowing their use continuously.