JPH04162886A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To reduce the scale of the system, weight and cost without need of a mechanical light shield means by providing a timing signal generating means so as to use the solid-state image pickup element. CONSTITUTION:The changeover control of a switch circuit 27, the operation of an image pickup element 20, and the operation of a frame memory 25 are implemented by a signal from a timing signal generator 24. That is, a power changeover switch circuit 27 is operated by a control signal from the timing signal generator 24 and a reset voltage VRST is applied to an overflow signal voltage rower supply terminal V3 of an image pickup element 20. In this case, Since a period for application of an overflow signal to each picture element of the image pickup element 20 is a period when no picture element signal is read, that is, a horizontal blanking time, the gate of each picture element of the image pickup element 20 receives a reset signal voltage for each horizontal blanking time and the exposure time of each picture element is less than one horizontal effective scanning period. Thus, no mechanical light shield means is required.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a charge modulation element (Charge ModulaHo) that prevents accumulation time differences between pixels.
The present invention relates to a solid-state imaging device with a shutter function using an nDevice (hereinafter abbreviated as CMD) as a pixel.

[Prior Art] Various types of solid-state imaging devices are conventionally known, each consisting of an image sensor having an MIS type light receiving/accumulating section.
There is a solid-state imaging device that uses an imaging element that has an MIS type light receiving/storage section and has an internal amplification function.

As an example, there is a solid-state imaging device using a CMD imaging device proposed by the applicant, published in Japanese Patent Application Laid-Open No. 61-84059.
issue, and International held in 1986.
ional Electron Device Mee
“ANEW MOS IMAGE 5ENSOR0PE” on pages 353-356 of the proceedings of ting (IEDM)
RATING IN A N0N-DESTRUCTI
The content is disclosed in a paper entitled ``VE READOUT MODE''.

Next, a conventional solid-state imaging device using such a CMD imaging device will be explained based on the circuit configuration diagram in FIG. First, CMDI-11°1-12. which constitutes each pixel. ...1
-mn are arranged in a matrix, and a video bias VDD (>0) is commonly applied to each drain thereof. The gate terminals of the CMD groups arranged in the X direction are connected to row lines 2-1.
2-2. ...2-m, and the source terminals of the CMD groups arranged in the Y direction are connected to the column lines 3-1.3-
2,...3-n, respectively. Above column line 3
-1.3-2. . . 3-n are column selection transistors 4-1, 4-2, . ...4-n and anti-selection transistor 5-1.5-2. . . 5-n, a reference line 7 grounded to the signal line 6 and GND.
are commonly connected to each other. The signal line 6 is connected to a current-voltage conversion type preamplifier 12 whose input is virtually grounded,
A video signal of negative polarity is read out in time series at the output terminal 9 of the preamplifier 12. Also, row line 2-1.2-2.・
...2-m is connected to the vertical scanning circuit 10 and applies signals φO1+ φG 2 + ...φG, respectively,
Column selection transistor 4-1.4-2. ...4-n and anti-selection transistor 5-1.5-2. ...5-n
The gate terminals of are connected to the horizontal scanning circuit 11 and receive signals φ, 1 . φ52. . . . φS and each inverted signal are applied.

Note that each CMD is formed on the same substrate, and a substrate voltage Vpp is applied to the substrate.

FIG. 3 is a signal waveform diagram for explaining the operation of the solid-state imaging device using the CMD imaging element shown in FIG. Row line 2-1.2-2. ...signal φ applied to 2-m
G++ φG2+ ... φG is composed of read gate voltage VRD, reset voltage "R8T + overflow voltage VOP + storage voltage VINT, and in non-selected rows, storage voltages V, N, and horizontal retrace are applied during the horizontal valid period of the video signal. During the period, the overflow voltage V0p becomes
In the selected row, the read gate voltage VHO is applied during the horizontal valid period of the video signal, and the reset voltage ■R57 is applied during the horizontal retrace period. Further, column selection transistors 4-1.4-2. ... Signal φ51. applied to the gate terminal of 4-n. φ5□,...φ54 are column lines 3-1.3-2. . . 3-n, and the low level is the signal for selecting the column selection transistors 4-1.
4-2. ...Turn off 4-n, anti-selection transistor 5
-1.5-2. ...5-n is turned on, and the high level is the column selection transistor 4-1.4-2. ...Turn on 4-n,
Anti-selection transistor 5-1.5-2. ...5-n
The optical signal of each CMD pixel is read out sequentially through the signal line 6, and the preamplifier 1
2 to amplify and output.

In addition, in FIG. 2, φH57, φ84. φH2 indicates a start signal and a clock signal for driving the horizontal scanning circuit 11. φvs↑ and φV l +φv2 indicate a start signal and a clock signal for driving the vertical scanning circuit 10. V, , V2 and V3 respectively indicate terminals for applying the read voltage vRDx and the reset voltage "R5T% overflow voltage V" to the gate of the pixel.

However, in this solid-state image sensor, so-called fixed pattern noise (hereinafter referred to as FPN), which appears in the signal output due to the variation in characteristics of each pixel, is large, and is the main noise source of this solid-state image sensor. . The causes of this FPN are thought to be variations in the pixel transistor characteristics and variations in the amount of dark charge generated in the photocharge storage section, but the former is more dominant, and this can be considerably improved by offset correction of the output voltage. I've recently come to realize that. (Reference: “FPN Suppression Driving Method for CMD Image Sensor” National Conference of the Television Society, Proceedings, 3-7, 1990) As the solid-state imaging device having the offset correction function,
There is a solid-state imaging device having a configuration as shown in FIG. That is,
A solid-state image sensor 20, a mechanical light shielding means 23 disposed in its optical system, a frame memory 25 capable of holding all pixel signal outputs of the solid-state image sensor 20, and an output of the solid-state image sensor 20. A differential amplifier 26 that takes the differential output of the frame memory 25, and the solid-state image sensor 2.
0. In a solid-state imaging device comprising a timing signal generator (timing signal generation means) 24 that provides the operation timing of the light shielding means 23 and the frame memory 25,
By operating the light shielding means 23, the timing signal generator 24, and the frame memory 25, light is shielded for at least one frame period, and the output of the solid-state image sensor 20 during this period is held in the frame memory 25 as a dark FPN signal; During the period when light is not blocked, the signals of each pixel are read out from the solid-state image sensor 20 in sequence, and at the same time, the dark FPN signal of the same pixel is outputted from the frame memory 25, and the differential amplifier 26 reads out the signal of each pixel from the solid-state image sensor 20. By taking the differential between the output and the dark FPN signal output, a video signal corrected for dark FPN is obtained.

[Problems to be Solved by the Invention] However, in a conventional solid-state imaging device having an FPN correction function, a mechanical light shielding means 23 is required.
This increases the size, weight, and bulk of the system.

The present invention has been made to solve the above problems, and provides a CMD image sensor that does not require mechanical light shielding means, and a solid-state image sensor similar to the CMD image sensor that has an FPN correction function for a solid-state image sensor. The purpose is to

[Means for Solving the Problems] In order to achieve the above object, the present invention includes a transistor as a component of one pixel, whose source/drain current is modulated by the amount of charge generated and accumulated by light irradiation, and the pixel are arranged in a matrix, and on the periphery thereof are a readout signal for reading out the source/drain current corresponding to the accumulated charge of the pixel, a reset signal for discharging all the accumulated charge of the pixel, and a signal for the pixel. A solid-state imaging device including driving means for selectively applying an overflow signal to the gate of the pixel for discharging a part of the accumulated charge after reset and before the next readout, and an overflow signal for the solid-state imaging device. an overflow signal voltage control means for controlling voltage; a first means for holding all pixel signal outputs of the solid-state image sensor; and an output of the solid-state image sensor and the output of the means for holding all pixel signal outputs; , a second means for obtaining an image signal; a reset signal and an overflow signal for the solid-state image sensor; and a timing signal generating means for providing operation timing of the overflow signal voltage control means and the first means. That is.

[Function] By configuring and operating as described above, when the overflow signal voltage is set as the reset signal voltage, the exposure time of the solid-state image sensor becomes one horizontal scanning time or less, which is considered equivalent to a dark state. Therefore, it is possible to realize a solid-state imaging device that does not require mechanical light shielding means.

[Embodiment] FIG. 1 is a configuration diagram showing an embodiment of a solid-state imaging device according to the present invention.

Since the CMD image sensor 20 is the same as that shown in FIG. 2, a description of its configuration will be omitted.

The output of the CMD image sensor 20 is connected to a preamplifier 12, and the output thereof is connected to be applied to one input terminal of a differential amplifier 26 and an input terminal of a frame memory 25.

The output of this frame memory 25 is transmitted to the differential amplifier 26.
Connect so that it is applied to the other input terminal of The read signal voltage power supply terminal v1. of the image sensor 20. Among the reset signal voltage power supply terminal V2 and the overflow signal voltage power supply terminal ■, the power supply terminal v1 and the power supply terminal v2 are connected to the power supply 21, and the read signal voltage VRD and the reset signal voltage ■R5T are respectively applied thereto. V3 is connected to the power supply via the power supply switching circuit 27, and has a reset signal voltage vR5T and an overflow signal voltage V. P is applied to the power supply terminal V.

Furthermore, the switching control of the switch circuit 27, the operation of the image sensor 20, and the operation of the frame memory 25 are as follows:
The configuration is such that the signal from the timing signal generator 24 is used.

Next, the operation of this solid-state imaging device will be explained.

The power supply switching circuit 27 is activated by the control signal from the timing signal generator 24, and the reset voltage V is applied to the overflow signal voltage power supply terminal (2) of the image sensor 20.
R5T is applied.

In this case, since the period during which the overflow signal is applied to each pixel of the image sensor 20 is the period during which no pixel signal is read out, that is, the horizontal blanking time, the gate of each pixel of the image sensor 20 is applied every horizontal blanking time. The reset signal voltage becomes the reset signal voltage, and the exposure time of each pixel becomes one horizontal effective scanning period or less.

Therefore, the signal output due to the incident light is 1/(the number of scanning lines in one field), so according to the NTSC standard, the image sensor 20
When operated, the output is 0.4% or less and can be considered as dark output.

The power supply terminal ■3 is set to a reset voltage V for one frame period or more.
By setting BB7, the dark output signal number of all pixel bones is read out from the image sensor 20, amplified to a predetermined voltage power supply by the preamplifier 12, and held in the frame memory 25 as a dark FPN signal.

Subsequently, when the power supply switching circuit 27 is activated by the control signal from the timing signal generator 24, and an overflow signal voltage VOP near the readout signal voltage is applied to the overflow signal voltage power supply terminal V of the image sensor 20, The image sensor 20 operates in exactly the same manner as in the conventional example, the signal output of each pixel is read out, and a video signal can be obtained from the output of the preamplifier 12.

At this time, in response to the reference signal from the timing signal generator 24, the frame memory 25 sequentially reads out the pixel signal read out from the image sensor 20 and the dark FPN signal of the same pixel. input to amplifier 26;

By taking the differential of these signals using the differential amplifier 26, a video signal from which the dark FPN signal has been removed can be obtained from its output terminal. Although this solid-state imaging device does not correct the variation in the amount of dark charge, as mentioned above, the variation in the amount of dark charge is not the main factor of the FPN of the image sensor 20, so it is equivalent to the solid-state imaging device shown in the conventional example. FPN
Has a removal effect. Furthermore, since this solid-state imaging device does not require mechanical light shielding means, it is possible to provide a lightweight, compact, and inexpensive solid-state imaging device.

In this embodiment, the power supply switching circuit 27 is configured separately from the CMD image sensor 20, but it may of course be built into the CMD image sensor 20.

Furthermore, in this embodiment, when the dark FPN signal is stored in the frame memory 25, if the signal of the same pixel is averaged a plurality of times and then stored, the CMD solid-state image sensor 2
The random noise superimposed on the 0 signal output is reduced, and the FPN removal effect is further improved.

Furthermore, in the above embodiment, an imaging system using the CMD imaging device 20 was shown, but for example,
Like the SIT image sensor disclosed in Publication No. 05272, excessively accumulated charges among the charges generated and accumulated by light irradiation are removed during a period when no signal is extracted from the pixels, similar to the CMD image sensor 20. It goes without saying that even if a solid-state image sensor that performs an overflow operation is used, a solid-state image sensor having the same functions as those of the embodiments described above can be obtained.

[Effects of the Invention] According to the present invention, a CMD image sensor and a similar solid-state image sensor are used to eliminate the need for mechanical light shielding means.
It is possible to provide a solid-state imaging device whose system size, weight, and cost can be reduced compared to conventional systems.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a solid-state imaging device according to the present invention, FIG. 2 is a circuit diagram showing an example of a solid-state imaging device using a conventional CMD imaging device, and FIG. 3 is an operation of the solid-state imaging device shown in FIG. FIG. 4 is a configuration diagram showing an example of a conventional solid-state imaging device that solves the problem shown in FIG. 2. 12... Preamplifier, 21... Power supply, 22... Lens, 24... Timing signal generator, 25... Frame memory, 26... Differential amplifier, 27... Power supply switch circuit. Applicant's agent Patent attorney Atsushi Tsuboi Figure 1 Figure 2

Claims (2)

[Claims] (1) One pixel includes a transistor whose source/drain current is modulated by the amount of charge generated and accumulated by light irradiation, and the pixels are arranged in a matrix, and the accumulated charge of the pixel is located at the periphery. A readout signal for reading out the source/drain current corresponding to the pixel, a reset signal for discharging all the accumulated charge of the pixel, and a part of the accumulated charge for the pixel after resetting and before the next readout. a solid-state imaging device comprising driving means for selectively applying an overflow signal to the gate of the pixel; an overflow signal voltage control means for controlling the overflow signal voltage of the solid-state imaging device; a first means for holding the all-pixel signal output; a second means for receiving an output of the solid-state image sensor and the output of the means for holding the all-pixel signal output to obtain an image signal; A solid-state imaging device characterized by comprising a reset signal, an overflow signal, and timing signal generation means for providing operation timings of the overflow signal voltage control means and the first means. (2) For at least one frame period, the overflow signal voltage is used as the reset signal voltage, and the output of the solid-state image sensor for this period is held in the first means, and for a period other than the at least one frame period, the overflow signal voltage is used as the reset signal voltage. The signal voltage is a voltage close to the readout signal voltage, and each pixel signal is sequentially read out from the solid-state image sensor, and the pixel signal is simultaneously output from the first means,
1. The second means is a differential amplifier, and the video signal is obtained by calculating the difference between the output of the solid-state image sensor and the signal output output from the first means. The solid-state imaging device described.