JPH0416075A - Nonlinear filter circuit - Google Patents

Nonlinear filter circuit

Info

Publication number
JPH0416075A
JPH0416075A JP2120240A JP12024090A JPH0416075A JP H0416075 A JPH0416075 A JP H0416075A JP 2120240 A JP2120240 A JP 2120240A JP 12024090 A JP12024090 A JP 12024090A JP H0416075 A JPH0416075 A JP H0416075A
Authority
JP
Japan
Prior art keywords
circuit
output
pass filter
input
variable coefficient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2120240A
Other languages
Japanese (ja)
Inventor
Tokikazu Matsumoto
松本 時和
Fumiaki Koga
文明 古賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2120240A priority Critical patent/JPH0416075A/en
Publication of JPH0416075A publication Critical patent/JPH0416075A/en
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

PURPOSE:To improve the S/N effectively without concentration of noise onto a picture edge by extracting a low frequency component through a variable coefficient circuit extracting a high frequency component and whose output is smaller as an input level is higher, multiplying the low frequency component with the above-mentioned high frequency component and subtracting the product from an input signal. CONSTITUTION:Only a high frequency component is extracted from an inputted video signal by using a high pass filter 2. A variable coefficient circuit 3 whose output is smaller as the input signal is higher is employed and a low pass filter 4 is provided to the output of the circuit 3. An output of the low pass filter 4 is multiplied with an output of the high pass filter 2 at a multiplier circuit 5, an output of the multiplier circuit 5 is subtracted from the input signal at a subtractor 6 to realize the nonlinear filter circuit which eliminates noise effectively without concentration of noise to the edge.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、VTR等で映像信号のノイズを効果的に除去
するために用いられるノイズキャンセラ回路の如き非線
形フィルタ回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a nonlinear filter circuit such as a noise canceler circuit used for effectively removing noise from a video signal in a VTR or the like.

従来の技術 従来、VTR等の再生装置では映像信号のS/Nを改善
するためにメイズキャンセラ回路が用いられていた。
2. Description of the Related Art Conventionally, a maze canceller circuit has been used in playback devices such as VTRs to improve the S/N ratio of video signals.

第4図は従来のノイズキャンセラ回路の構成を示すブロ
ック図である。入力端子20から入力された映像信号は
ハイパスフィルタ(HPF)21で高域成分が抜き出さ
れる。次に、この信号はリミッタ回路22に入力される
。リミッタ回路22は入力信号が一定レベルより小さい
ときだけ信号を通過させる特性を有するので、リミッタ
回路22の出力は入力端子20に入力された映像信号の
高域成分のうち小さいレベルの信号だけが現れる。
FIG. 4 is a block diagram showing the configuration of a conventional noise canceler circuit. A high-pass filter (HPF) 21 extracts high frequency components from the video signal input from the input terminal 20. This signal is then input to the limiter circuit 22. Since the limiter circuit 22 has a characteristic of allowing the signal to pass only when the input signal is lower than a certain level, the output of the limiter circuit 22 shows only a signal with a small level among the high frequency components of the video signal input to the input terminal 20. .

次に、この信号を減算回路28でもとの入力映像信号か
ら減算し、出力端子24に出力する。したがって、出力
端子24に現れた信号は入力映像信号のレベルの小さい
高域成分が除去され、S/Nの改善された信号が得られ
る。
Next, this signal is subtracted from the original input video signal by the subtraction circuit 28 and outputted to the output terminal 24. Therefore, low-level high-frequency components of the input video signal are removed from the signal appearing at the output terminal 24, resulting in a signal with an improved S/N ratio.

このような例は「ビデオ技術ハンドブック」(電波新聞
社)p p 85〜pp87に示されている。
Such an example is shown in "Video Technology Handbook" (Denpa Shimbunsha), pp. 85-87.

発明が解決しようとする課題 しかしながら上記の構成では入力信号のエツジ部におい
てノイズが目立つ欠点があった。エツジ部は高域成分の
レベルが大きいのでIJ ミッタ回路22の出力は小さ
くなり、出力端子24には入力映像信号がそのまま現れ
る。すなわち、エツジ部のノイズは除去されない。しか
しながらエツジ部の前後においてはノイズが除去され、
s/Nが改善されるので、再生画面上でエツジ部のS/
Nが急激に変化し、ノイズが集中したように見える課題
があった。
Problems to be Solved by the Invention However, the above configuration has a drawback in that noise is noticeable at the edge portions of the input signal. Since the level of high-frequency components in the edge portion is high, the output of the IJ emitter circuit 22 is small, and the input video signal appears at the output terminal 24 as it is. In other words, noise at the edges is not removed. However, noise is removed before and after the edge,
Since the S/N is improved, the S/N of the edge part is displayed on the playback screen.
There was an issue where N suddenly changed and the noise appeared to be concentrated.

課題を解決するための手段 上記課題を解決するため本発明の非線形フィルタ回路は
、入力された映像信号の高域成分を抜き出すハイパスフ
ィルタと、前記ハイパスフィルタの出力が入力され、そ
の入力レベルが大きい程出力が小さくなる可変係数回路
と、前記可変係数回路の出力の低域を抜きaすローパス
フィルタと、前記0− ハスフィルタの出力と前記ハイ
パスフィルタの出力とを乗算する乗算回路と、前記入力
信号から前記乗算回路の出力信号を減算する減算回路か
ら構成されるものである。
Means for Solving the Problems In order to solve the above problems, the nonlinear filter circuit of the present invention includes a high-pass filter for extracting high-frequency components of an input video signal, and an output of the high-pass filter is input, and the input level thereof is high. a variable coefficient circuit whose output becomes smaller as the frequency increases; a low-pass filter that extracts a low frequency band from the output of the variable coefficient circuit; a multiplier circuit that multiplies the output of the 0-has filter by the output of the high-pass filter; It is composed of a subtraction circuit that subtracts the output signal of the multiplication circuit from the signal.

作用 本発明は上記の構成により、エツジ部にノイズが集中す
ることなく効果的にノイズを低減する非線形フィルタ回
路を得ることができる。
Effect: With the above-described configuration, the present invention can provide a nonlinear filter circuit that effectively reduces noise without concentrating noise on the edge portions.

実施例 以下、本発明の非線形フィルタ回路について図面を参照
しながら説明する。
EXAMPLE Hereinafter, a nonlinear filter circuit of the present invention will be explained with reference to the drawings.

第1図は本発明の実施例の構成を示したブロック図であ
り、第3図(b)は第1図に示す実施例の可変係数回路
3の入出力特性を示した特性図である。第1図において
、入力された映像信号はハイパスフィルタ2で高域成分
だけが抜き出される。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 3(b) is a characteristic diagram showing the input/output characteristics of the variable coefficient circuit 3 of the embodiment shown in FIG. In FIG. 1, an input video signal is passed through a high-pass filter 2 in which only high-frequency components are extracted.

従来例ではこの高域成分はリミッタ回路22でレベルの
小さいときだけ通過させていた。リミッタ回路22の入
出力特性は例えば第3図(a)に示すように入力信号レ
ベルの小さいときだけ信号を通過させるものであるが、
この回路は入力のレベルによって利得の変化する可変利
得増幅器と考えてもよい。
In the conventional example, this high frequency component was passed through the limiter circuit 22 only when the level was low. The input/output characteristics of the limiter circuit 22, for example, as shown in FIG. 3(a), allow the signal to pass only when the input signal level is low.
This circuit can be thought of as a variable gain amplifier whose gain changes depending on the input level.

この場合利得は入力信号の大きいほど減少することにな
るので、例えば第3図(b)に示したような入出力特性
をもつ可変係数回路3を用い、その出力で利得を制御す
ればリミッタ回路22と同様の特性を得ることができる
。したがって、本実施例では第3図(b)に示す入出力
特性を有する可変係数回路3を用いている。この可変係
数回路3の出力を乗算回路5に直接入力すれば上に述べ
たように従来例と同様の特性が得られる。本実施例では
従来例の欠点であったエツジ部へのノイズの集中を避け
るために可変係数回路3の出力にローパスフィルタ4を
設けている。可変係数回路3は入力に応じて係数を変化
させて出力するのであるが、入力にノイズが重畳されて
いるときは出力する係数が入力のノイズで変動する。こ
の変動はローパスフィルタ4により除去する。したがっ
て、ローパスフィルタ4の出力とハイパスフィルタ2の
出力を乗算回路5で乗算し、減算回路6で入力信号から
乗算回路5の出力を減算することにより、エツジ部にノ
イズが集中することなく効果的にノイズを除去する非線
形フィルタ回路が実現できる。
In this case, the gain decreases as the input signal becomes larger, so if a variable coefficient circuit 3 with input/output characteristics as shown in FIG. 3(b) is used, and the gain is controlled by its output, a limiter circuit Characteristics similar to those of No. 22 can be obtained. Therefore, in this embodiment, a variable coefficient circuit 3 having input/output characteristics shown in FIG. 3(b) is used. If the output of the variable coefficient circuit 3 is directly input to the multiplication circuit 5, characteristics similar to those of the conventional example can be obtained as described above. In this embodiment, a low-pass filter 4 is provided at the output of the variable coefficient circuit 3 in order to avoid concentration of noise on the edge portion, which is a drawback of the conventional example. The variable coefficient circuit 3 changes the coefficient according to the input and outputs it, but when noise is superimposed on the input, the output coefficient changes due to the input noise. This fluctuation is removed by a low-pass filter 4. Therefore, by multiplying the output of the low-pass filter 4 and the output of the high-pass filter 2 by the multiplication circuit 5, and by subtracting the output of the multiplication circuit 5 from the input signal by the subtraction circuit 6, it is possible to effectively prevent noise from concentrating on the edge portion. A nonlinear filter circuit that removes noise can be realized.

以上の処理はディジタル信号処理で行えば容易であり、
その場合可変係数回路3には予め入出力特性のデータを
書き込んだROM(Read  0nly  Memo
rY:  リード・オンリー拳メモリ)を用いることが
できる。
The above processing can be easily done using digital signal processing.
In that case, the variable coefficient circuit 3 is equipped with a ROM (Read Only Memo) in which input/output characteristic data is written in advance.
rY: read-only fist memory) can be used.

次に、第2図を参照して第2の発明に対応する具体実施
例について説明する。本実施例は第1の実施例のハイパ
スフィルタ2乗算回路5との間にイコライザ回路8を設
け、非線形フィルタ回路の周波数特性の微調整を可能に
するものである。第1の実施例では従来例との構成の違
いにより入出力の周波数特性が少し異なることがある。
Next, a specific embodiment corresponding to the second invention will be described with reference to FIG. In this embodiment, an equalizer circuit 8 is provided between the high-pass filter 2 multiplier circuit 5 of the first embodiment, thereby making it possible to finely adjust the frequency characteristics of the nonlinear filter circuit. In the first embodiment, the input/output frequency characteristics may differ slightly due to the difference in configuration from the conventional example.

特に、入力信号が小さいときの周波数特性に違いが生じ
る。この違いはノイズを除去する機能においては少しも
問題にならないが、従来例と同じ特性を得たい場合には
本実施例のようにイコライザ回路8を設けることで、第
1の実施例と同様の効果に加え、従来例と同一の周波数
特性を実現できる。イコライザ回路8は、第1の実施例
で従来例に比べ高域で利得の下がる場合には、−萬域の
利得を低下させる特性にすればよい。
In particular, differences occur in frequency characteristics when the input signal is small. This difference does not pose any problem in terms of the function of removing noise, but if you want to obtain the same characteristics as the conventional example, by providing the equalizer circuit 8 as in this embodiment, you can achieve the same characteristics as in the first embodiment. In addition to the effects, it is possible to achieve the same frequency characteristics as the conventional example. If the gain of the equalizer circuit 8 in the first embodiment is lower in the high range than in the conventional example, the equalizer circuit 8 may have a characteristic that reduces the gain in the -1000 range.

発明の効果 以上述べたように本発明の非線形フィルタ回路は、画像
のエツジ部にノイズが集中することなく効果的にS/N
を改善することができる。
Effects of the Invention As described above, the nonlinear filter circuit of the present invention effectively improves S/N without concentrating noise on the edge portions of an image.
can be improved.

また、本発明は乗算回路の入力にイコライザ回路を設は
周波数特性を調整することができる。
Furthermore, the present invention can adjust the frequency characteristics by providing an equalizer circuit at the input of the multiplication circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例における非線形フィルタ
回路の構成を示したブロック図、第2図は本発明の第2
の実施例における非線形フィルタ回路の構成を示したブ
ロック図、第3図(a)は従来例におけるリミッタ回路
の入出力特性を示した特性図、第3図(b)は本発明の
可変利得回路の入aカ特性を示した特性図、第4図は従
来例の非線形フィルタ回路の構成を示したブロック図で
ある。 2・・・ハイパスフィルタ、  3・・・可変係数回路
、4・・・ローパスフィルタ、  5・・・乗算回o、
8・・・イコライザ回路。 代理人の氏名 弁理士 粟野 m4 はか1名1 図 第3図 第 図 入力 第4図
FIG. 1 is a block diagram showing the configuration of a nonlinear filter circuit according to a first embodiment of the present invention, and FIG.
FIG. 3(a) is a characteristic diagram showing the input/output characteristics of the limiter circuit in the conventional example, and FIG. 3(b) is the variable gain circuit of the present invention. FIG. 4 is a block diagram showing the configuration of a conventional nonlinear filter circuit. 2...High pass filter, 3...Variable coefficient circuit, 4...Low pass filter, 5...Multiplication times o,
8... Equalizer circuit. Name of agent Patent attorney Awano m4 Haka 1 person 1 Figure 3 Figure input Figure 4

Claims (2)

【特許請求の範囲】[Claims] (1)入力された映像信号の高域成分を抜き出すハイパ
スフィルタと、 前記ハイパスフィルタの出力が入力され、その入力レベ
ルが大きい程出力が小さくなる可変係数回路と、 前記可変係数回路の出力の低域を抜き出すローパスフィ
ルタと、 前記ローパスフィルタの出力と前記ハイパスフィルタの
出力とを乗算する乗算回路と、 前記入力信号から前記乗算回路の出力信号を減算する減
算回路とを具備する非線形フィルタ回路。
(1) a high-pass filter that extracts high-frequency components of an input video signal; a variable coefficient circuit to which the output of the high-pass filter is input and whose output decreases as the input level increases; and a variable coefficient circuit that reduces the output of the variable coefficient circuit. A nonlinear filter circuit comprising: a low-pass filter that extracts a frequency range; a multiplier circuit that multiplies the output of the low-pass filter and the output of the high-pass filter; and a subtraction circuit that subtracts the output signal of the multiplier circuit from the input signal.
(2)入力された映像信号の高域成分を抜き出すハイパ
スフィルタと、 前記ハイパスフィルタの出力が入力され、その入力レベ
ルが大きい程出力が小さくなる可変係数回路と、 前記可変係数回路の出力の低域を抜き出すローパスフィ
ルタと、 前記ハイパスフィルタの出力の周波数特性を調整するイ
コライザ回路と、 前記ローパスフィルタの出力と前記イコライザ回路の出
力とを乗算する乗算回路と、 前記入力信号から前記乗算回路の出力信号を減算する減
算回路とを具備する非線形フィルタ回路。
(2) a high-pass filter that extracts high-frequency components of an input video signal; a variable coefficient circuit to which the output of the high-pass filter is input and whose output decreases as the input level increases; and a variable coefficient circuit that reduces the output of the variable coefficient circuit; an equalizer circuit that adjusts the frequency characteristics of the output of the high-pass filter; a multiplier circuit that multiplies the output of the low-pass filter and the output of the equalizer circuit; and an output of the multiplier circuit from the input signal. A nonlinear filter circuit comprising a subtraction circuit that subtracts a signal.
JP2120240A 1990-05-10 1990-05-10 Nonlinear filter circuit Pending JPH0416075A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2120240A JPH0416075A (en) 1990-05-10 1990-05-10 Nonlinear filter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2120240A JPH0416075A (en) 1990-05-10 1990-05-10 Nonlinear filter circuit

Publications (1)

Publication Number Publication Date
JPH0416075A true JPH0416075A (en) 1992-01-21

Family

ID=14781314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2120240A Pending JPH0416075A (en) 1990-05-10 1990-05-10 Nonlinear filter circuit

Country Status (1)

Country Link
JP (1) JPH0416075A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005065196A (en) * 2003-08-20 2005-03-10 Sony Corp Filter, signal processor, signal processing method, recording medium, and program
CN102319985A (en) * 2011-08-16 2012-01-18 浙江海亮股份有限公司 Process for coarsening working surface of holding clamp

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005065196A (en) * 2003-08-20 2005-03-10 Sony Corp Filter, signal processor, signal processing method, recording medium, and program
CN102319985A (en) * 2011-08-16 2012-01-18 浙江海亮股份有限公司 Process for coarsening working surface of holding clamp

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