JPH04159867A - Video signal processing circuit - Google Patents

Abstract

PURPOSE:To prevent the occurrence of a DC offset by commonly using a voltage follower circuit for both pedestal clamping time and black clipping time and making the output of the voltage follower circuit into one, and then, providing a switch which respectively switches necessary additional circuits at the clamping and clipping time and is operated by a clamp pulse. CONSTITUTION:Input video signals are pedestal-clamped when a clamp pulse is turned on and black-clipped when the clamp pulse is turned off. At the time of clamping and clipping, a reference voltage source 5 and voltage follower circuit 8 are commonly used for both functions and their outputs are made into one. Accordingly, no DC offset occurs at both of the clamp and clip levels. In addition, since a switch circuit which respectively switches necessary circuits at the clamping and clipping time is provided, a system can be realized with a less number of circuit elements without producing any DC offset at both of the clamp and clip levels.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video signal processing circuit that performs pedestal clamping and black clipping.

[Conventional technology]

FIG. 5 shows a block diagram of a conventional video signal processing circuit. In the figure, the conventional video signal processing circuit is composed of a pedestal clamp section 3 and a black clip section 4, and the pedestal clamp section 3 clamps the pedestal level of the input video signal to a certain reference potential when the clamp pulse is ON. This system applies a black clip effect by clipping the signal below this pedestal level in the black clip section 4 at the next stage.

FIG. 6 shows an equivalent circuit diagram of the system of FIG.

In the figure, the pedestal clamp section 3 is composed of a current mirror circuit 9 consisting of an NPN) transistor differential amplifier 3' and a PNP) transistor, and a 0N10F
It is composed of a constant current source 6 that can generate a constant current of F and a reference voltage source 5 that determines a clamp level.

Further, the black clip section 4 has a differential amplifier 4' having a load resistance R2, and a reference voltage source 5 that determines the pedestal clamp level is applied to its positive input side, and a resistor R7 is connected to its negative input side from the input terminal 1. The input video signal is input to the connection point between the resistor R5 and the output of the emitter follower transistor via the emitter follower transistor.

Next, the operation will be explained.

First, the operation of the pedestal clamp circuit of the pedestal clamp section 3 will be explained. A video signal inputted from the input terminal 1 through capacitor coupling is charged across the capacitor so that its input level becomes equal to the reference voltage source level of the reference voltage source 5 while the voltage follower circuit 8 is ONL. A discharge occurs. If a switch is provided in the constant current circuit 6 so that the voltage follower circuit 8 is turned on by a clamp pulse, the pedestal 1 novel of the input video signal at the input terminal 1 will be equal to the reference voltage, that is, the DC absolute value. It will be input so that the level is determined. This is a pedestal clamp operation.

Next, the operation of the black clip circuit of the black clip section 4 will be explained. When the level of the output point of the black clip circuit is equal to the reference power supply voltage, the voltage drop from Vco at the load resistor R7 and the V,6 (base-emitter voltage) drop of the emitter follower circuit are combined.
The current values of R2 and each constant current source 6 are set so that the DC level due to the tar drop is equal to the reference voltage.

Now, for example, when the output point DC level is higher than the reference power supply potential, the balance of the differential amplifier 4' will be disrupted because more current flows through the NPN transistor on the right, and the voltage drop P at R2 will be The emitter follower transistor 7 is turned off because the current becomes larger than the current value. Therefore, the input signal is output as it is with the gain l.

On the other hand, if the DC level at the output point is lower than the reference power supply potential, the balance of the differential amplifier 4' will be disturbed because the current flowing to the right NPN transistor will decrease, and the voltage drop at R2 will decrease. Therefore, it works to raise the emitter follower output potential of the emitter follower transistor 7 to a high level. The initial bias setting makes this potential equal to the reference potential.

Therefore, in this circuit, a signal higher than the pedestal clip level passes through as is, and a signal lower than the clip level is always output as a signal at the same potential as this reference potential, thus operating as a black clip circuit.

[Problem to be solved by the invention]

Conventional video signal processing circuits are configured as described above, so many circuit elements are required to realize each of the pedestal clamp section and the black clip section, and the voltage for pedestal clamp operation is Since the follower circuit includes a current mirror circuit, the DC
There was a problem that the pedestal clamp level and the black clip level did not match because of the offset.

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a video signal processing circuit that does not cause DC offset and has a small number of circuit elements.

[Means to solve the problem]

The video signal processing circuit according to the present invention uses a common voltage follower circuit for use during pedestal clamping and black clipping, omits its current mirror circuit, and has only one output, and requires additional additions for clamping and clipping, respectively. It is equipped with a switch operated by a clamp pulse so that the circuit can be switched and used.

[Effect]

In this invention, the voltage follower circuit used during pedestal clamping and black clipping is shared,
The current mirror circuit is omitted and the output is reduced to 1
Furthermore, by providing a switch operated by a clamp pulse without causing an offset between the clamp level and the clip level, the system for clamping and clipping can be simplified.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block diagram of a video signal processing circuit according to an embodiment of the invention. In the figure, 11 is a video signal processing circuit. Further, FIG. 2 shows a concrete equivalent circuit of FIG. 1. In the figure, ■ is an input terminal, 2 is an output terminal, and 10
is a differential amplifier with resistor R2 as a load, 5 is a reference voltage, 5
' is a protection reference voltage source for preventing saturation of the NPN transistor constituting the differential amplifier 10, 6 is a constant current source, 7 is an emitter follower transistor, and 8 is a voltage follower circuit.

Next, the operation will be explained. It is assumed that the switch in FIG. 2 performs 0N10 FF operation due to a clamp pulse synchronized within the back porch of the video signal inputted through the input terminal l.

First, the pedestal clamp operation when the clamp pulse is ON will be explained. When the clamp pulse is ON, the second
The circuit shown in the figure is equivalently represented by a circuit as shown in FIG. At this time, since the voltage follower circuit 8 functions as a low impedance buffer, the DC level of the input terminal 1 is forcibly determined to be equal to the potential of the reference voltage source 5.

The capacitor connected to input terminal 1 is charged with electric charge, and the input video signal is output from the pedestal DC.
1 novel becomes equal to the reference potential at the terminal point, and is output as a pedestal clamped signal from the output point.

Next, the pedestal clamp operation when the clamp pulse is OFF will be explained. When the clamp pulse is OFF, the circuit of FIG. 2 is equivalently represented by a circuit as shown in FIG. 4. At this time, a video signal pedestally clamped to the reference voltage is output at the output point. If a signal higher than the pedestal level is present at the output point, the output of the differential amplifier IO and the base and emitter potentials of the emitter follower transistor 7 are reversed, turning off, and the signal therefore appears at the output point 2 as is.

Also, if a signal lower than the pedestal clamp is to be output to the output point, this time the N on the left side of the differential amplifier 10
Since a large amount of bias current flows through the PN) transistor, the voltage drop at R2 is small, and the base potential of the NPN transistor 7 increases, so that the output level at the output point does not decrease. If the bias of the differential amplifier 10 and the emitter follower circuit is initially set so that the reference voltage and the output DC level at the output point are equal, the signal below the pedestal level of the input video signal at the output point will always be at the pedestal level. It will operate as a black clip circuit that outputs as a level.

As described above, the input video signal is pedestally clamped when the clamp pulse is ON, and black clipped when the clamp pulse is OFF. At this time, since the reference voltage source 5 and the voltage follower circuit 8 are shared for both functions and their output is made into one, no DC offset occurs between the clamp level and the clip level.

In this way, in this embodiment, the voltage follower circuit used during pedestal clamping and black clipping is shared, its current mirror circuit is omitted, and its output is set to one, and the circuits required during clamping and clipping are respectively Since a switching circuit is provided, a DC offset between the clamp level and the clip level does not occur, and a system can be realized with a small number of circuit elements.

〔Effect of the invention〕

As described above, according to the video signal processing circuit of the present invention, the voltage follower circuit used during pedestal clamping and black clipping is made common, the current mirror circuit thereof is omitted, and its output is set to one, and Since a switch circuit is provided to switch the circuits required for the time and clip, the system can be realized with a small number of circuit elements without causing a DC offset between the clamp level and the clip level.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a video signal processing circuit according to an embodiment of the invention, FIG. 2 is an equivalent circuit diagram showing a video signal processing circuit according to an embodiment of the invention, and FIGS. 2 is an equivalent circuit diagram explaining the operation, FIG. 5 is a block diagram showing a conventional video signal processing circuit, and FIG. 6 is an equivalent circuit diagram showing a conventional video signal processing circuit. In the figure, ■ is an input signal terminal, 2 is an output terminal, 3 is a pedestal clamp part, 4 is a black clip part, 5.5
1 is a reference voltage source, 6 is a constant current source, 7 is an emitter follower NPN transistor, 8 is a voltage follower circuit, 1
0 is a differential amplifier, and 11 is a video signal processing circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] (1) A circuit that performs pedestal clamping and black clipping of a video signal, comprising first and second differential transistors whose emitters are commonly connected, and a circuit connected between the collector of the first differential transistor and a power supply. a differential amplifier having a first resistor;
a voltage follower circuit comprising a reference voltage source connected to the base side of the differential transistor; and a transistor whose base and emitter are respectively connected to the collector and base of the first differential transistor; an input terminal connected to the base of the differential transistor via a second resistor; a second switch connected in parallel with the second resistor and opened and closed simultaneously with the first switch by a clamp pulse; and an output terminal connected to the base of a differential transistor.