JPH04158060A - Image forming apparatus - Google Patents

Abstract

PURPOSE:To easily form a halftone image by providing light emitting data generator which outputs light emitting data for designating light emission of each light emitting element in number corresponding to gradations of pixels at each one line. CONSTITUTION:A comparator 17 sequentially compares image data input from a buffer memory 14 with a gradation comparison signal COMP from a gradation comparison signal generating counter 16 at each pixel, and outputs a light emitting data signal for designating light emission of an LED 24 at an 'H' level if the gradation of each pixel is denser than that of the signal COMP. A shift register 22 converts the serial light emitting data signals to be sequentially output at each pixel from the comparator 17 into parallel signals of one line, and a latch 23 latches the parallel signals. The LED 24 emits a light if the signal output from the latch 23 is also an 'H' level when a light emission allowance signal EN becomes an 'H' level, and exposes a photosensitive drum 31. When the drum 31 is exposed with the LED 24, an exposed part is deenergized to form an electrostatic latent image.

Description

[Detailed Description of the Invention] The present invention relates to an image forming apparatus such as a page printer or a copying machine using an electrophotographic method, and in particular is configured to expose a photoreceptor to light using a light emitting element. The present invention relates to an image forming apparatus.

In recent years, page printers using electrophotography have become popular as printers that can use single sheets of plain paper and still print at high speed.

This type of printer is equipped with a photoreceptor having a photosensitive conductive layer and a light emitting element array provided with a plurality of light emitting elements, and each light emitting element emits light based on binary image data sent from a print data processing section. By controlling the presence or absence of the electrostatic latent image, an electrostatic latent image is formed on the photoreceptor.

Furthermore, copying machines and the like that use electrophotography are increasingly being equipped with an image sensor for reading original images and a light emitting element array. In this type of device, for example, image editing or other processing is performed on document image data read by an image sensor, and based on the obtained binary image data, it is determined whether or not each light emitting element emits light, similar to the page printer. control to form an electrostatic latent image on the photoreceptor.

Although the above-mentioned conventional image forming apparatuses are designed to control whether or not the light emitting elements emit light based on binary image data, the resulting image is For example, only a binary image of either white or black can be obtained.In other words, there is a problem in that it is impossible to obtain an image with gradation in which the density varies from pixel to pixel.

Note that it is also possible to charge the photoreceptor to multiple levels of charging states by controlling the light emission intensity and light emission time of each light emitting element based on multivalued image data, so that a grayscale image can be obtained. In order to control the light emission intensity and light emission time as described above, it is necessary to provide a complex light emission control circuit in the light emitting element array. Therefore, the light emitting element array becomes considerably more expensive than one for binary images, and the manufacturing cost of the image forming apparatus also increases.

In view of the above-mentioned points, the present invention aims to provide an image forming apparatus that can form a grayscale image and can reduce manufacturing costs.

In order to solve the above-mentioned problem, the present invention of 7- is provided with one line of light emitting elements, and based on light emission data indicating whether or not each light emitting element emits light, and a light emission permission signal common to each light emitting element. a light emitting element array that exposes a photoreceptor to light; a light emitting data generation circuit that outputs light emitting data that instructs each light emitting element to emit light a number of times corresponding to the gradation of each pixel for each line; 1 photoreceptor each time
It is characterized by comprising an intermittent drive means for intermittently feeding line pitch by line pitch.

According to the above configuration, the light emission data generation circuit outputs light emission data that instructs each light emitting element to emit light a number of times corresponding to the gradation of each pixel for each line, and generates light emission data in the light emitting element array. teeth,
The photoreceptor is exposed to light based on the light emission data, and the photoreceptor is charged to a plurality of charging states. Further, the intermittent driving means intermittently advances the photoreceptor by one line pitch every time 1947 minutes of exposure is completed.

1. An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 is a circuit diagram showing the configuration of a light emission data generation circuit, etc. in an image processing apparatus, and FIG. 2 is a timing chart showing the operation of the same circuit.

In FIG. 1, 11 is a light emission data generation circuit, 12 is an oscillator, 13 is a timing control circuit, 14 is a buffer memory, 5 is a counter for generating an address signal, 16 is a counter for generating a gradation comparison signal, 17 is a comparator, 18 is an arbitration switching circuit (bus arbiter circuit), 21 is the number of pixels N
22 is a shift register, 23 is a latch, 24... is an LED (light emitting diode), 25... is a light emitting element array, 22 is a shift register, 23 is a latch, 24... is an LED (light emitting diode),
... is a transistor, 26 is an AND circuit, 31 is a photosensitive drum, 32 is a stepping motor, and 33 is a stepping motor drive circuit.

Based on the reference clock signal output from the oscillator 12, the timing control circuit 13 generates a horizontal synchronization signal H3YNC1 that goes to "H" level every time one line of exposure is performed, as shown in FIG. Clock signal Lclk becomes "H" level once every time one gradation worth of exposure is performed, clock signal Dclk becomes "H" level N times every time one gradation worth of exposure of each pixel is done, horizontal synchronization signal H3YNC
Immediately after the signal goes to the "H" level, a signal such as the clock signal Vclk that goes to the "HII level" N times is outputted to control the operation timing of each part such as the light emission data generation circuit 11.

The buffer memory 14 is configured to store one line of 4-bit 16-gradation image data VDO from an image data generating section (not shown).

The comparator 17 sequentially compares the image data inputted from the image data generation section or the buffer memory 14 with the gradation comparison signal COMP from the gradation comparison signal generation counter 16 for each pixel, and calculates the gradation of each pixel. Gradation comparison signal CO
When the light is darker than MP, it becomes H'' level and outputs a light emission data signal instructing the LED 24 to emit light.

The shift register 22 converts the serial light emission data signal sequentially output from the comparator 17 for each pixel into a parallel signal for one line, and the mount 23 latches this parallel signal. LED24 is
If the signal output from the latch 23 is also at the "H" level when the light emission permission signal EN becomes "H" level, light is emitted and the photosensitive drum 31 is exposed.

The photosensitive drum 31 is configured by forming a photosensitive conductive layer on the outer periphery of the conductive drum, and is uniformly charged by a charging device (not shown) and then exposed to light by the LEDs 24. The portion is charged and an electrostatic latent image is formed. The photosensitive drum 31 is driven by a stepping motor 32, and is rotated by one line pinch each time one line of exposure is completed.

The detailed operation of each part will be explained below with reference to the timing chart of FIG.

First, when the horizontal synchronization signal H3YNC1 and the Lclk signal reach the "H" level, the address signal generation counter 1
5, and the gradation comparison signal generation counter 16 are reset.

Next, the Vclk signal goes to the "H" level N times, and N-pixel bone image data VDO is input from the image data generation section via the arbitration switching circuit 18.

The image data VDO of each pixel is such that the Dclk signal is
``Increments from 0 to N-1 every time the level changes.
is stored in the buffer memory 14 in response to the address signal AD from the address signal generation counter 15 and the write signal WE.

The image data VDO of each pixel is also input to the A terminal of the comparator 7 via the arbitration switching circuit 18, while the Lclk
A gradation comparison signal COMP having a value of 0 is continuously input from the gradation comparison signal generation counter 16 which is reset by the signal.

Therefore, the comparator 17 sequentially compares the image data of each pixel with the gradation comparison signal COMP each time it is input, and when the value of the image data is 1 or more, the serial light emission data signal becomes "H level". Output.

In the shift register 22, the Dclk signal is at °゛H°.

Each time the level changes, the light emission data signal is shifted and held. The N-pixel bone luminescence data signal is held, and the LA
When the TCH signal becomes "H" level, the light emission data of the N pixel bones are latched into the launch 23 at the same time. When the light emission permission signal EN reaches the "H++" level, only the LEDs 24 corresponding to pixels whose image data has a value of 1 or more emit light, exposing the photosensitive drum 31.

On the other hand, when the Lclk signal becomes “H” level for the second time,
The address signal generation counter 15 is reset, and the gradation comparison signal generation counter 16 is incremented to output a gradation comparison signal COMP having a value of 1.

Thereafter, when the Dclk signal becomes "H" level N times, the address signal generation counter 15 again outputs address signals AD from 0 to N-1. Therefore, the buffer memory 14 sequentially outputs one line of accumulated image data in response to the readout signal OE from the timing control circuit 13. Here, the arbitration switching circuit 18 is
A control signal (not shown) connects only the buffer memory 14 and the comparator 17 so that no signal from the image data generator is input to the comparator 17.

Therefore, each time the image data of each pixel from the buffer memory 14 is input, the comparator 17 sequentially compares it with the gradation comparison signal COMP whose value is 1, and when the value of the image data is 2 or more, " Outputs a light emission data signal that becomes H” level.

The shift register 22 and latch 23 perform serial-to-parallel conversion and latch in the same way as when the value of the gradation comparison signal COMP is O, and the LED 24 is only one that corresponds to a pixel whose image data value is 2 or more. emits light and exposes the photosensitive drum 31.

Thereafter, the same operation is repeated while the value of the gradation comparison signal COMP is sequentially incremented, and the LED 24 corresponding to each pixel whose image data value is larger than the value of the gradation comparison signal COMP emits light to perform exposure. . That is, each LED 24 emits light the number of times according to the value of the corresponding pixel data.

After the value of the gradation comparison signal COMP reaches 15, the horizontal synchronization signal H3YNC1 and the Lclk signal go to "H" level, and the address signal generation counter 15 and the gradation comparison signal generation counter 16 are reset. At the same time, the photoreceptor drum 31 is rotated by one line pitch by the driving of the stepping motor 32, and the next one is similarly rotated.
Line exposure is performed.

As described above, each LED 24 emits light the number of times according to the value of the corresponding pixel data and exposes the photoreceptor drum 31, so that the photoreceptor drum 31 is charged in a charged state according to the number of times of exposure for each pixel. An electrostatic latent image is formed. Therefore, when this electrostatic latent image is developed by applying toner using a developing device (not shown), a gray-scale image with different density for each pixel is obtained.

Here, the light emitting element array 21 performs each exposure operation using a light emission data signal which is a binary signal, and each L
Since ED24 only needs to emit light at the same time and with the same amount of light,
A normal light emitting element array for binary images can be used.

In the above embodiment, an example was explained in which the larger the value of the pixel data, the more the LED 24 emits light. However, in cases such as when toner development is performed using a positive method, the number of times of light emission can be changed according to the value of the image data. Just try to suppress it.

As described above, according to the present invention, a light emitting data generating circuit is provided which outputs light emitting data instructing each light emitting element to emit light a number of times corresponding to the gradation of each pixel for each line. As a result, the photoreceptor can be charged to multiple levels of charging states depending on the gradation for each pixel, making it possible to easily form grayscale images. Since a light emitting element array for images can be used, manufacturing costs can also be kept low.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of a light emission data generation circuit, etc. in an image processing apparatus, and FIG. 2 is a timing chart showing the operation of the same circuit. DESCRIPTION OF SYMBOLS 11... Light emission data generation circuit, 21... Light emitting element array, 24... LED, 31... Photosensitive drum, 3
2...Stepping motor

Claims (1)

[Claims] (1) A light-emitting element array that includes one line of light-emitting elements and exposes a photoreceptor to light based on light-emission data indicating whether each light-emitting element emits light or not, and a light-emission permission signal common to each light-emitting element; A light emitting data generation circuit outputs light emitting data that instructs each light emitting element to emit light a number of times corresponding to the gradation of each pixel, and a light emitting data generation circuit outputs light emitting data that instructs each light emitting element to emit light a number of times according to the gradation of each pixel. An image forming apparatus comprising an intermittent drive means for intermittent feeding.