JP3062201B2 - Image forming device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus, and more particularly, to an image forming apparatus that synthesizes and outputs a color image such as a photograph and a line image such as a character or a graphic, and an image forming control apparatus. .

[Prior art] Conventionally, a color image such as a photograph and a character,
There is no one that easily combines and outputs line images such as figures.

[Problems to be Solved by the Invention] The present invention has been made in view of the background of the related art described above. An object of the present invention is to provide an image forming apparatus for synthesizing and outputting line images and an image forming control apparatus.

[Means for Solving the Problems] The image forming apparatus according to the present invention comprises first input means (in the embodiment, the video data shown in FIG. 6) for inputting multi-value information representing the gradation of pixels constituting an output image. Output unit 100, communication line 2004
And input means for inputting binary image information of a predetermined pixel density (in the embodiment, the video data output unit 100 and the communication line 2002 in FIG. 6). At the time of formation, an image pattern represented by the binary image information input from the second input means is assigned a multivalued information input from the first input means for each constituent pixel. Means for converting the image pattern represented by the predetermined pixel density without changing (in the embodiment, the image processing circuit 2300, the control unit 2500, and the communication line 2007 shown in FIG. 6). ;
(Exemplified by the encoder 2306 and the selector 2305 in FIG. 1)
And forming means for forming an image corresponding to the multi-value information converted by the converting means (in the embodiment, the line shown in FIG. 6)
2005, image gradation circuit 2100, laser driver 2200, laser 222
23, photoreceptor 2900, transfer drum; FIFO2105, LUT210 in FIG.
6, exemplified by D / A2107).

Further, the image forming control device of the present invention includes a first input means (in the embodiment, a video data output unit 100 shown in FIG. Line 2004) and second input means for inputting binary image information of a predetermined pixel density (in the embodiment, video data output unit 100 and communication line 2002 in FIG. 6). At the time of image formation, an image pattern represented by the binary image information input by the second input means is assigned to the multi-value information input by the first input means for each of the constituent pixels. Means for converting without changing the image pattern represented by the predetermined pixel density (in the embodiment, the image processing circuit 2300, the control unit 2500, the communication line
2007; an encoder 2306 and a selector 2305 in FIG. 1) and output means for outputting multi-value information converted by the conversion means (in the embodiment, an output line 2005 from the selector 2305 in FIG. 6) Exemplarily).

[Description of Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 7 is a sectional view of a printer mechanism of a color laser beam printer (C-LBP) 2000 of the embodiment. In the figure, a laser beam emitted from a laser element (not shown) is scanned at high speed in a main (horizontal) scanning direction by a polygon mirror 2289, further reflected by a mirror 2290, and is transferred onto a photosensitive drum 2900 which is uniformly charged in advance by a charger 2297. Performs line dot exposure with a maximum resolution of 16 lines / mm. In this embodiment, one horizontal scanning length of the laser corresponds to one horizontal scanning length of the image information. On the other hand, the photosensitive drum 2900 rotates at a constant speed in the direction of the arrow, thereby forming a planar image (latent image). Next, for example, if the exposed image is yellow image data, the latent image is developed by a yellow developing device (Y) 2292, and further transferred onto a sheet on a transfer drum 2296 by a transfer charger 2298. Thus, the above is changed to magenta (M), cyan (C), black (B _K )
Is repeated for each image data, and a color image is formed by superimposing toner images of each color on the same sheet.

FIG. 6 is a block diagram of the C-LBP2000 of the embodiment. In the figure, reference numeral 100 denotes an externally connected video data output unit, which outputs image data of various properties to the C-LBP2000. That is, multi-value data (R, G, B data) such as a natural image is output to a line 2001, and binary data (BI data) such as a character or a figure is output to a line 2002. Reference numeral 2003 denotes a control signal line, and the video data output unit 100 and the C-LBP20
A video clock signal for synchronizing between 00, a main scanning (horizontal) synchronizing signal, a sub-scanning (vertical) synchronizing signal, and the like are included. Reference numeral 2004 denotes a communication control line through which operation instructions from the video data output unit 100 to the C-LBP 2000 or status transmission from the C-LBP 2000 to the video data output unit 100 are performed.

Reference numeral 2300 denotes an image processing circuit which performs color conversion of R, G, B data such as a natural image into Y, M, C, _BK data. In addition, Y, M, C,
BI data such as characters for synthesizing image data multi-level conversion with respect to B _K data. 2100 is a gradation control circuit, synthesized Y, M, C, and B _K data with correspond to the color reproduction density of the printer, into a PWM signal (video signal) corresponding to the concentration. Reference numeral 2200 denotes a laser driver, and a gradation control circuit 2160
The laser element 2223 is driven by the output video signal.

A control unit 2500 controls the C-LBP2000. Also, the control unit 2500 controls the video data output unit 10 via the line 2004.
Exchange information with 0. In the control unit 2500, 211
Reference numeral 0 denotes a CPU, which performs main control of the control unit 2500. 2502 is ROM
And stores a control program (not shown) executed by the CPU 2110. Reference numeral 2504 denotes RAM, which the CPU 2110 uses as a work area. 2600 is a potential sensor, and the photoconductor 29
Then, the amount of charge on the 00 is detected. Reference numeral 2700 denotes a potential measurement unit (PDU), which amplifies the output of the potential sensor 2600 and inputs it to the A / D converter 2503. This potential data is read by the CPU 2110 and used for controlling the charging of the photoconductor 2900. Reference numeral 2800 denotes a sensor, which detects a tip position to output an image and outputs an image tip signal ITOP. Reference numeral 2298 denotes a temperature sensor, and reference numeral 2299 denotes a humidity sensor, which detect a temperature and a humidity for correcting the development characteristics. Reference numeral 2285 denotes a drive motor of the printer mechanism.

FIG. 1 is a block diagram of an image processing circuit 2300 according to the embodiment. In the figure, reference numeral 2301 denotes a gamma (γ) correction circuit, which converts R, G, B data (8 bits each) into Y, M, C data (8 bits each) matched to the output characteristics of the printer. 2302
Is a masking and UCR circuit, Y, M, as well as correcting the color in correspondence with C data to a printer colorant (toner) to produce an inking signal B _K. 2304 is a selector,
Follow the visible color information (e.g., Y → M → C → order of B _K) in the printer connexion Y, M, C, sequentially selects and outputs the B _K data.

Meanwhile, 2303 is the delay circuit, the delay amount of the processing of the B _K data in the masking and UCR circuit 2302 described above BI
Data delays the synchronizing BI data and B _K data.
Reference numeral 2306 denotes an encoder, which is the video data output unit 10 described above.
According to an instruction from the communication line 2004 of 0, the designated code (for example, code 01H) from the CPU 2110 is converted into multi-valued data (for example, black data FFH). Note that there are various designation codes as such commands, and the encoder 2306 decodes such designation codes, converts them into predetermined multi-value data, and outputs the data to the selector 2305. 2305 is a selector, a delay circuit
Switches the input of A and B terminals according to the BI data of 2303 output. That, Y, M, although the C data selects the A-side terminals, for B _K data, when BI data of the delay circuit 2303 outputs a logic 0 Select A-side input (B _K data), the logic 1
In the case of, the B-side input (output of the encoder 2306) is selected.
Thus, R, G, black data FFH based on B _K data and BI data based on the B data are synthesized and outputted to the line 2005.

FIG. 2 is a block diagram of the gradation control circuit 2100 of the embodiment. In the figure, the line 2005 accordance connexion Y on the order of visible color information of the printer, M, C, B _K data (each 8 bits) is outputted. The data is written to a buffer memory (FIFO) 2105 in accordance with a horizontal synchronization signal (RHSYNC) and a video clock signal (RCLK) of the video data output unit 100, and a horizontal synchronization signal (HSYNC) and a video clock of a synchronization control circuit 2113. The signal is read according to the signal (CLK). As a result, synchronization between the video data output unit 100 and the printer unit 2000 is established.

Image data of Y read from the buffer memory 2105, M, C or B _K is input to the γ-RAM (LUT) 2106. The LUT 2106 corrects the input image data according to the output characteristics of the printer so that the density becomes linear. The image data output from the LUT 2106 is further converted to an analog signal (video signal) by a D / A converter 2107 and input to one terminal of each of comparators 2117 and 2118. An analog pattern signal for binarizing (PWM modulation) the video signal according to its density is input to the other terminals of the comparators 2117 and 2118. By the way, if the comparator 2117 is used for line drawing reproduction of characters, figures, etc., the resolution is important in line drawing reproduction. Therefore, the frequency of the analog pattern signal is, for example, the same as that of the video signal (400 lines in the embodiment).
One pattern signal corresponds to one pixel of the video signal. If the comparator 2118 is used for reproducing a halftone image such as a natural image, the gradation of the halftone image needs to be increased. Therefore, the frequency of the analog pattern signal is, for example, half the frequency of the video signal (200% in the embodiment). Line),
One pattern signal is associated with every two pixels of the video signal.

According to the circuit, the HSYNC signal is the B signal of the BD detection circuit 2111.
Obtained in synchronization with the D signal. The synchronization control circuit 2113 has B
A D signal, a master clock signal from the crystal oscillator (XTAL) 2112 (having a frequency four times or more the frequency of the video clock signal VCLK), a vertical synchronization signal (ITOP) in the sub-scanning direction, and an HSYNC signal , The ITOP signal and the VCLK signal are synchronized, and the clock signals 2124 and 212 for pattern generation are synchronized.
5 is also synchronized with the ITOP and HSYNC signals, 2124 is a double frequency of the video signal, and 2125 is a clock signal of 1 time frequency of the video signal. A frequency dividing circuit 2114 divides the clock signals 2124 and 2125 by 2 to output clock signals TVCLK and PVCLK having a duty ratio of 50%, respectively. Clock signal TVC
LK and PVCLK are input to pattern generation circuits 2115 and 2116, respectively, to generate predetermined analog pattern signals. The analog pattern signal of the embodiment is, for example, a triangular wave pattern signal.

The analog video signal output from the D / A converter 2107 is compared with respective analog pattern signals by comparators 2117 and 2118, and a PWM modulation signal 2126 having a pulse width corresponding to the density thereof is provided.
And 2127, and input to the selector 2119.

Meanwhile, BI data line 2006 is also simultaneously written in the buffer memory 2105 and B _K data is read. The read BI data is input to the selector 2130. Selector 2130
Selection terminal is controlled by the CPU 2110, and normally the B side
The I data is selected, and its output is input to the selection terminal of the selector 2119. As a result, the selector 2119
When the data is logic 1, the terminal A (high-resolution PWM signal) is selected, and when the data is logic 0, the terminal B (low-resolution PWM signal) is selected. Accordingly, the PMW signal output from the selector 2119 has a low resolution and a high gradation for the image related to the original R, G, B data, but has a high resolution for the portion where the BI data is synthesized. Reference numeral 2120 denotes a gate circuit, which passes a PWM signal only in a predetermined area of the output sheet and matches the print area. The output of the gate 2120 is input to a laser driver (LD) 2200, which drives the semiconductor laser 2223 at a constant current for an ON time corresponding to the pulse width of the PWM signal. The BI signal output from the selector 2130 is input to the LD2200 at the same time.
Thereby, the power of laser light (constant current drive value I) is controlled.

FIG. 3 is a timing chart of main signals of the embodiment. From the XTAL 2112, a clock signal (SCLK) having a frequency more than twice the frequency of the VCLK signal is input to the synchronization control unit 2113, and the BD signal and the
An HSYNC signal and a VCLK signal synchronized with the SCLK signal are output. The blanking signal is reset at the falling edge of the BD signal, and is formed by a counter (not shown) that measures a time shorter than the period of the BD signal.

FIGS. 4A and 4B are diagrams for explaining the relationship between the PWM signal and the laser drive current according to the embodiment. In FIGS. 7A and 7B, the rising of the current i flowing through the laser diode 2223 depends on the magnitude of the driving constant current I even if the PWM signal has the same time width T. In addition, the laser light starts to be emitted when the current i exceeds a predetermined threshold current i ₀ . Therefore,
Even when driven by a PWM signal having the same pulse width T, if the laser drive constant current I differs, the amount of laser emission also differs as shown in FIGS. Due to this difference in the amount of laser emission, the potential
Exposure potential on the uniformly charged photosensitive drum to V _D are different as shown.

By the way, C, M, Y, B based on original R, G, B data
_K data has low resolution (200 lines) suitable for halftone reproduction
It is PWM modulated. Original BI for these
B _K data based on the data is PWM-modulated at a high resolution (400 lines) to be suitable for line drawing reproduction. Therefore, in reproducing BI data, it is desirable to set the laser drive current I to a relatively large value to obtain a sharp reproduction characteristic. However, if the laser drive current I is set to be relatively large, the reproduction light amount of the low-resolution R, G, B data becomes too large, resulting in an output image in which the gradation is lost. When the laser drive current I is set to a small value, R, G, B
Although the gradation of data increases, the sense of sharpness of BI data cannot be obtained. If a sufficient amount of laser light is not obtained, the reproduction of fine lines becomes insufficient. Therefore, the laser drive current I is switched according to the nature of such an image.

FIG. 5 is a circuit diagram of the laser driver 2200 of the embodiment. In the figure, transistors 2202 and 2203 constitute a current switch circuit, and the PWM signal 2010 output from the gate circuit 2120 is inverted in level by a buffer circuit 2201 and input to the base of the transistor 2202. This allows the PWM signal 2010
Is a logical 1, a current flows to the laser element 2223 side, and a logical 0
In this case, no current flows to the laser element 2223 side. The transistor 2204 forms a constant current circuit together with the operational amplifier 2205, and determines the driving constant current I of the laser element 2223. That is, the output voltage of the constant voltage source 2206 is divided by the resistors R6 and R7 to form a _first voltage V1.
= Supplying a constant current of V ₁ / R5 current switch circuit.

On the other hand, the BI signal 2011 output from the selector 2130 is
Turn off / on analog switch 2207 via 08. That is, when the BI signal is logic 1, the analog switch 2207 is opened to supply a constant current of approximately I = V ₁ / R5 to the current switch circuit. When the BI signal is logic 0, the analog switch 2207 is opened.
To form a _second voltage V2. Thus, the transistor 2204 supplies a constant current of approximately I = V ₂ / R5 to the current switch circuit. Thus, depending on the resolution, the laser element
The drive power of the 2223 is made variable.

[Another Embodiment] FIG. 8 is a block diagram of an image processing circuit according to another embodiment. Note that the same components as those in FIG. 1 are denoted by the same reference numerals and description thereof is omitted. In this embodiment, multi-value data corresponding to BI data is transmitted using a line of R data. That is, when the BI data is logic 1, the output black data may be multi-valued data corresponding to the BI data regardless of the _BK data (ie, the original R, G, B data). Therefore, when the BI data is logic 0, the original R data is placed on the R data line, and when the BI data is logic 1, multi-value data corresponding to the BI data is loaded. This R data line is led to the delay circuit 2307 together with the γ circuit 2301 and
After delaying the data content by the same amount as the BI data, the data is input to the B-side terminal of the selector 2305. Thereby, multi-value data corresponding to BI data can be determined for each pixel.

[Other Embodiment] FIG. 9 is a circuit diagram of a laser driver 2200 according to another embodiment. Note that the same components as those in FIG. 5 are denoted by the same reference numerals, and description thereof is omitted. In the figure, reference numeral 2210 denotes a D / A converter, whose input data is provided by the CPU 2110. As a result, the laser drive constant current can be set freely, and a higher quality image can be formed according to the nature of the image.

In the above embodiment, a laser beam printer has been described, but the present invention is not limited to this. In addition, an ink jet printer, a thermal printer, or the like may be used.

[Effects of the Invention] According to the present invention, at the time of image formation, conversion into multi-value information is performed by assigning separately input multi-value information to each pixel constituting an image pattern represented by input binary image information. In this case, since the image pattern represented by the predetermined pixel density is converted into multi-valued information without change, the quality of the input binary image information is not degraded and the resolution is extremely high. It is possible to obtain a pattern in which each pixel constituting the value image is converted into desired multi-value information.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image processing circuit 2300 of the embodiment, FIG. 2 is a block diagram of a gradation control circuit 2100 of the embodiment, FIG. 3 is a timing chart of main signals of the embodiment, and FIG. 5A and 5B are diagrams for explaining a relationship between a PWM signal and a laser drive current according to the embodiment. FIG. 5 is a circuit diagram of a laser driver 2200 according to the embodiment. FIG. 6 is a color laser beam printer according to the embodiment. (C
FIG. 7 is a cross-sectional view of the printer mechanism of the C-LBP2000 of the embodiment, FIG. 8 is a block diagram of an image processing circuit of another embodiment, and FIG. 9 is another embodiment. FIG. 21 is a circuit diagram of an example laser driver 2200. In the figure, 2000 ... Color laser beam printer (C-
LBP), 100 Video data output unit, 2289 Polygon mirror, 2290 Mirror, 2297 Charger, 2900 Photosensitive drum, 2292 Yellow developer, 2293 Magenta developer, 2294 .., A cyan developing device, 2295, a black developing device, 2298, a transfer charger.

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-62-208176 (JP, A) JP-A-63-64086 (JP, A) JP-A-64-82957 (JP, A) 109059 (JP, A)

Claims (2)

(57) [Claims] 1. An image forming apparatus comprising: a first input unit for inputting multi-value information representing a gradation of a pixel forming an output image; a second input unit for inputting binary image information having a predetermined pixel density; At this time, by assigning the multi-value information input from the first input means to the image pattern represented by the binary image information input from the second input means, Means for converting without changing the image pattern represented by the predetermined pixel density, and forming means for forming an image according to the multi-value information converted by the converting means An image forming apparatus comprising: 2. An image forming apparatus comprising: first input means for inputting multi-value information representing the gradation of pixels constituting an output image; second input means for inputting binary image information having a predetermined pixel density; At this time, the image pattern represented by the binary image information input by the second input means is converted into multi-value information by allocating the multi-value information input by the first input means to each constituent pixel. Means to do
An image forming control device comprising: a conversion unit that converts an image pattern represented by the predetermined pixel density without changing the image pattern; and an output unit that outputs multi-value information converted by the conversion unit. .