JPH0415751U - - Google Patents
Info
- Publication number
- JPH0415751U JPH0415751U JP5491290U JP5491290U JPH0415751U JP H0415751 U JPH0415751 U JP H0415751U JP 5491290 U JP5491290 U JP 5491290U JP 5491290 U JP5491290 U JP 5491290U JP H0415751 U JPH0415751 U JP H0415751U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- microcomputer
- switching
- input
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Description
図面は本考案のマイクロコンピユータの入力回
路を示す図である。
１……マイクロコンピユータ、２−１〜２−ｎ
……入力端子、３……カウンタ回路、４……切換
回路、５−１〜５−ｎ……トランスフアゲート、
６……切換制御回路。
The drawing is a diagram showing an input circuit of a microcomputer according to the present invention. 1...Microcomputer, 2-1 to 2-n
...Input terminal, 3...Counter circuit, 4...Switching circuit, 5-1 to 5-n...Transfer gate,
6...Switching control circuit.
Claims (1)
れる複数の入力端子を有し、何れが１つのカウン
ト信号をカウントするマイクロコンピユータにお
いて、 前記複数のカウント信号を選択的にカウントす
るためのカウンタ回路と、 前記マイクロコンピユータの何れかの入力端子
と前記カウンタ回路とを切換接続する切換回路と
、 前記切換回路による切換接続を制御するための
切換制御回路と、 を備えたことを特徴とするマイクロコンピユータ
の入力回路。 (2) 切換回路は、マイクロコンピユータの複数
の各入力端子とカウンタ回路とを接続又は遮断す
る複数のゲート回路を有し、切換制御回路は、前
記マイクロコンピユータの何れかの入力端子と前
記カウンタ回路とを接続するゲート回路のゲート
を開くことを特徴とする請求項(1)記載のマイク
ロコンピユータの入力回路。[Claims for Utility Model Registration] (1) A microcomputer having a plurality of input terminals to which a plurality of count signals are independently applied, each of which counts one count signal, a counter circuit for selectively counting; a switching circuit for switching and connecting any input terminal of the microcomputer to the counter circuit; and a switching control circuit for controlling the switching connection by the switching circuit. A microcomputer input circuit characterized by comprising: (2) The switching circuit has a plurality of gate circuits that connect or disconnect each of the plurality of input terminals of the microcomputer and the counter circuit, and the switching control circuit has a plurality of gate circuits that connect or disconnect each of the plurality of input terminals of the microcomputer and the counter circuit. 2. The microcomputer input circuit according to claim 1, wherein a gate of a gate circuit connecting the microcomputer is opened.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5491290U JPH0415751U (en) | 1990-05-25 | 1990-05-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5491290U JPH0415751U (en) | 1990-05-25 | 1990-05-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0415751U true JPH0415751U (en) | 1992-02-07 |
Family
ID=31577397
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5491290U Pending JPH0415751U (en) | 1990-05-25 | 1990-05-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0415751U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5850765A (en) * | 1981-09-21 | 1983-03-25 | Hitachi Ltd | Semiconductor integrated circuit device |
-
1990
- 1990-05-25 JP JP5491290U patent/JPH0415751U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5850765A (en) * | 1981-09-21 | 1983-03-25 | Hitachi Ltd | Semiconductor integrated circuit device |
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