JPH04150207A - Differential amplifier - Google Patents
Differential amplifierInfo
- Publication number
- JPH04150207A JPH04150207A JP2271751A JP27175190A JPH04150207A JP H04150207 A JPH04150207 A JP H04150207A JP 2271751 A JP2271751 A JP 2271751A JP 27175190 A JP27175190 A JP 27175190A JP H04150207 A JPH04150207 A JP H04150207A
- Authority
- JP
- Japan
- Prior art keywords
- differential amplifier
- resistor
- constant
- bias
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 101100535994 Caenorhabditis elegans tars-1 gene Proteins 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は差動アンプに関し、特に外部バイアスを印加す
ることで差動アンプのエミッタ抵抗の抵抗値の調整が可
能な抵抗を備えた差動アンプに関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a differential amplifier, and in particular to a differential amplifier equipped with a resistor whose emitter resistance value can be adjusted by applying an external bias. Regarding the amplifier.
従来の差動アンプでは、外部バイアスを印加することで
抵抗値の調整をするものは特になく、エミッタ抵抗は固
定抵抗である。例えば、第4図に示す様に差動アンプの
利得を調整したい場合は、トランジスタ37.38.抵
抗43.44で形成される定電流回路を、外部端子47
に引き出し、その外部端子47からバイアスを印加する
ことにより、差動アンプ本体の電流を変化させることで
、g、(相互フンダクタンス)を変化させ、適正な利得
になるよう調整を行ってきた。In conventional differential amplifiers, there is nothing in particular to adjust the resistance value by applying an external bias, and the emitter resistance is a fixed resistance. For example, if you want to adjust the gain of the differential amplifier as shown in FIG. 4, transistors 37, 38 . A constant current circuit formed by resistors 43 and 44 is connected to an external terminal 47.
By applying a bias from the external terminal 47, the current in the differential amplifier body is changed, g, (mutual fundance) is changed, and adjustment is performed to obtain an appropriate gain.
尚差動アンプ本体は、抵抗39,40,41゜42とn
pn)ランジスタ31,32.33.34と、定電流4
5.46とを備え、他に定電流回路(後述)を備えてい
る。The differential amplifier itself has resistors 39, 40, 41°42 and n
pn) transistors 31, 32, 33, 34 and constant current 4
5.46, and also includes a constant current circuit (described later).
前述した従来の差動アンプは、適正な利得にするために
外部端子47に定電流回路を引き出し、その外部端子か
らバイアスを印加することに上り差動アンプの電流を変
化させることでg、をコントロールし、利得の調整をし
なければならないため、差動アンプの電流が一定ではな
く出力電圧が常に一定に定まらないという問題がある。In the conventional differential amplifier described above, in order to obtain an appropriate gain, a constant current circuit is connected to the external terminal 47, and a bias is applied from the external terminal to change the current of the differential amplifier. Since the current of the differential amplifier must be controlled and the gain adjusted, there is a problem that the current of the differential amplifier is not constant and the output voltage is not always constant.
本発明の目的は、前記問題点を解決し、出力電圧が一定
になるようにした差動アンプを提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a differential amplifier whose output voltage is constant.
本発明の構成は、外部印加バイアスによって導通チャン
ネルの領域を変化させることで可変となる抵抗が、差動
アンプ本体を構成する一対のトランジスタのエミッタ同
士を結ぶエミッタ抵抗として設けられていることを特徴
とする。The configuration of the present invention is characterized in that the resistor, which is variable by changing the area of the conduction channel by an externally applied bias, is provided as an emitter resistor that connects the emitters of a pair of transistors that constitute the differential amplifier main body. shall be.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の差動アンプを示す回路図で
ある。第1図において、本実施例は、NPN)ランジス
タ1〜8と、ピンチ抵抗11と、抵抗9,10.12〜
15と、定電流源16゜17と、外部端子18.19と
を含み、構成される。FIG. 1 is a circuit diagram showing a differential amplifier according to an embodiment of the present invention. In FIG. 1, this embodiment includes NPN) transistors 1 to 8, a pinch resistor 11, and resistors 9, 10, and 12 to 8.
15, constant current sources 16 and 17, and external terminals 18 and 19.
本実施例が第4図と異なるところは、ピンチ抵抗11と
、外部端子18とが付加されている点である。This embodiment differs from FIG. 4 in that a pinch resistor 11 and an external terminal 18 are added.
第2図は、第1図の差動アンプのエミッタ抵抗の抵抗値
を外部バイアスを印加することで、抵抗値の調整が可能
なピンチ抵抗の構造の断面図である。FIG. 2 is a cross-sectional view of the structure of a pinch resistor whose resistance value can be adjusted by applying an external bias to the resistance value of the emitter resistor of the differential amplifier shown in FIG.
第3図はピンチ抵抗部分の平面図である。第2図、第3
図において、酸化膜22と、高濃度N型拡散Ji23と
、P“拡散層24と、空乏層25と、Epi(エピタキ
シャル)N−層26と、埋込層27と、Sub (サブ
)ストレート28と、コンタクト29と、外部端子30
とが示さている。第2図に於いて、高濃度N型拡散層2
3に外部よりバイアスを印加することで、空乏層25を
広げ、第1図に示すピンチ抵抗11の抵抗値の調整が可
能である。FIG. 3 is a plan view of the pinch resistance portion. Figures 2 and 3
In the figure, an oxide film 22, a high concentration N-type diffusion Ji 23, a P" diffusion layer 24, a depletion layer 25, an Epi (epitaxial) N- layer 26, a buried layer 27, and a Sub straight 28. , contact 29 , and external terminal 30
is shown. In FIG. 2, the high concentration N-type diffusion layer 2
By applying a bias from the outside to 3, the depletion layer 25 is widened, and the resistance value of the pinch resistor 11 shown in FIG. 1 can be adjusted.
以上説明したように、本発明は、外部バイアスを印加す
ることで差動アンプのエミッタ抵抗の抵抗値を調整する
ことができるピンチ抵抗を有することで、適正な利得に
調整を行っても、差動アンプ本体に流れる電流及び負荷
抵抗が一定のため差動アンプの出力電圧が常に一定にで
きるという効果がある。As explained above, the present invention has a pinch resistor that can adjust the resistance value of the emitter resistor of the differential amplifier by applying an external bias, so that even if the gain is adjusted to an appropriate level, the difference Since the current flowing through the main body of the differential amplifier and the load resistance are constant, the output voltage of the differential amplifier can be kept constant at all times.
第1図は本発明の一実施例の差動アンプの回路図、第2
図は第1図のピンチ抵抗の構造を示す断面図、第3図は
第2図のピンチ抵抗の形状を示す平面図、第4図は従来
の差動アンプの回路図である。
1〜8はNPN )ランジスタ、11はピンチ抵抗、9
,10.12〜15.39〜44は抵抗、16.17,
46.47は定電流、18.19は外部端子、22は酸
化膜、23は高濃度N型拡散層、24はP3拡散層、2
5は空乏層、26はEpfN−層、27は埋込層、28
はSubストレート、29はフンタクト、30.47は
外部端子、31〜38はNPN)ランジスタ。FIG. 1 is a circuit diagram of a differential amplifier according to an embodiment of the present invention, and FIG.
3 is a cross-sectional view showing the structure of the pinch resistor shown in FIG. 1, FIG. 3 is a plan view showing the shape of the pinch resistor shown in FIG. 2, and FIG. 4 is a circuit diagram of a conventional differential amplifier. 1 to 8 are NPN) transistors, 11 is a pinch resistor, 9
, 10.12-15.39-44 are resistances, 16.17,
46.47 is a constant current, 18.19 is an external terminal, 22 is an oxide film, 23 is a high concentration N type diffusion layer, 24 is a P3 diffusion layer, 2
5 is a depletion layer, 26 is an EpfN- layer, 27 is a buried layer, 28
is a Sub straight, 29 is a direct contact, 30.47 is an external terminal, and 31 to 38 are NPN) transistors.
Claims (1)
させることで可変となる抵抗が、差動アンプ本体を構成
する一対のトランジスタのエミッタ同士を結ぶエミッタ
抵抗として設けられていることを特徴とする差動アンプ
。A differential amplifier characterized in that a resistor that is variable by changing the area of a conduction channel by an externally applied bias is provided as an emitter resistor that connects the emitters of a pair of transistors constituting a main body of the differential amplifier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2271751A JPH04150207A (en) | 1990-10-09 | 1990-10-09 | Differential amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2271751A JPH04150207A (en) | 1990-10-09 | 1990-10-09 | Differential amplifier |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04150207A true JPH04150207A (en) | 1992-05-22 |
Family
ID=17504329
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2271751A Pending JPH04150207A (en) | 1990-10-09 | 1990-10-09 | Differential amplifier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04150207A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0642218A1 (en) * | 1993-09-02 | 1995-03-08 | TEMIC TELEFUNKEN microelectronic GmbH | Circuit with controlled pinch resistances |
-
1990
- 1990-10-09 JP JP2271751A patent/JPH04150207A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0642218A1 (en) * | 1993-09-02 | 1995-03-08 | TEMIC TELEFUNKEN microelectronic GmbH | Circuit with controlled pinch resistances |
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