JPH04145653A - Connector type ic package - Google Patents

Connector type ic package

Info

Publication number
JPH04145653A
JPH04145653A JP26977390A JP26977390A JPH04145653A JP H04145653 A JPH04145653 A JP H04145653A JP 26977390 A JP26977390 A JP 26977390A JP 26977390 A JP26977390 A JP 26977390A JP H04145653 A JPH04145653 A JP H04145653A
Authority
JP
Japan
Prior art keywords
connector
chip
driver
receiver
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26977390A
Other languages
Japanese (ja)
Inventor
Shunsuke Fujimoto
俊介 藤本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP26977390A priority Critical patent/JPH04145653A/en
Publication of JPH04145653A publication Critical patent/JPH04145653A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce an actually-mounting area and readily cope with multiplication of pin of a connector by a method wherein an IC for an interface or a driver/receiver is so constructed as to be integrated with a connector. CONSTITUTION:A package mold part 1 is actually mounted on a printed substrate 4 and has a plurality of connector pins 2 inside. Further, a IC chip 3 for an interface or a driver/receiver is assembled inside a connector forming the part 1, and a pad of each chip is performed bonding to the pin 2, and the chip 3 is assembled by only the necessary number such as two or upper and lower steps corresponding to the number of signal line. Accordingly, the chip 3 and the connector are integrated. That is, the IC which is normally used for the interface or the driver/receiver is so constructed as to be integrated with the connector, whereby an actually-mounting area is smaller than conventionally and the construction can readily cope with multiplication of the pin of the connector.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はＩＣパッケージに関し、特にコネクタと一体化
したＩＣパッケージの形状に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an IC package, and particularly to the shape of an IC package integrated with a connector.

〔従来の技術〕[Conventional technology]

従来、ＩＣパッケージは、ＩＣを実装上容易にするとか
、ＩＣの信頼性上の問題点（湿気混入による劣化）とか
の対策などの様に、ＩＣの保護が主たる目的であった。Conventionally, the main purpose of IC packages has been to protect the IC, such as to make it easier to mount the IC or to take measures against reliability problems (deterioration due to moisture contamination) of the IC.

又、ＩＣの実装されたボードを他のボードと接続する際
には、コネクタが必要であり、大抵の場合、ドライバ用
のＩＣより信号線が接続されている。つまり、実際の装
！上では、コネクタの前段にドライバ／レシーバ用ＩＣ
が必要であり、コネクタとドライバ／レシーバ用ＩＣと
でボード上のかなりの面積を取っていた。Furthermore, a connector is required when connecting a board on which an IC is mounted to another board, and in most cases, a signal line is connected from the driver IC. In other words, the actual outfit! Above, there is a driver/receiver IC in front of the connector.
The connector and driver/receiver IC take up a considerable amount of space on the board.

即ち、第２図に示すように、コネクタピン１２を有する
コネクタ本体部１１と、ＩＣパッケージ（ＤＩＰ）１７
とが、プリント基板１４上において別々の場所に実装さ
れていた。That is, as shown in FIG. 2, a connector main body 11 having connector pins 12 and an IC package (DIP) 17
and were mounted at different locations on the printed circuit board 14.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のＩＣパッケージ及びコネクタでは、カー
ドに実装される際には、大抵の場合、コネクタからバッ
クボード上のバス又はケーブルに接続され、それ故にコ
ネクタをはさんでカード側にはインターフェイス用のＩ
Ｃか、ドライバ／レシーバ用の駆動能力の大きいＩＣが
必ずといっていい程必要である。したがって、通常はバ
ス又はケーブル駆動用ＩＣとカードのコネクタが並んで
組立てられており、そのパターンは変わらないのにＩＣ
はＩＣで、コネクタはコネクタで別々に組立てられ、非
常に多くの実装面積を必要とする欠点があった。When the above-mentioned conventional IC packages and connectors are mounted on a card, in most cases the connector is connected to a bus or cable on the backboard, so there is an interface on the card side across the connector. I
C or an IC with large driving capacity for driver/receiver is almost always required. Therefore, bus or cable drive ICs and card connectors are usually assembled side by side, and although the pattern remains the same, the IC
is an IC, and the connectors are assembled separately, which has the drawback of requiring a very large mounting area.

また最近では、カードより引き出される信号線も多くの
本数が必要とされてきており、コネクタも多ビンのもの
が必要とされ、コネクタの実装面積も増加の傾向にある
。Furthermore, recently, a large number of signal lines are required to be drawn out from the card, and a connector with many bins is also required, and the mounting area of the connector is also increasing.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のコネクタ型ＩＣパッケージは、プリント基板上
に実装され且つ内部に複数のコネクタビンを有してコネ
クタの形状をなすコネクタ本体と、このコネクタ本体の
内部にて前記コネクタビンにボンディングされて組立て
られたインタフェイス用又はドライバ／レシーバ用のＩ
Ｃチップとを備えている。The connector-type IC package of the present invention includes a connector body that is mounted on a printed circuit board and has a plurality of connector bins therein in the shape of a connector, and is assembled by bonding to the connector bins inside the connector body. interface or driver/receiver
It is equipped with a C chip.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図（ａ）は本発明の一実施例の縦断面図、第１図（
ｂ）は同図（ａ）のＡ−Ａ’線断面図である。FIG. 1(a) is a vertical cross-sectional view of one embodiment of the present invention; FIG.
b) is a sectional view taken along the line AA' in FIG.

本実施例はプリント基板４上に実装され且つ内部に複数
のコネクタビン２を有してコネクタの形状をなすパッケ
ージモールド部１と、このパッケージモールド部１の内
部にてボンディング線５によりコネクタビン２にボンデ
ィングされて組立てられたインタフェース用又はドライ
バ／レシーバ用のＩＣチップ３とを有してなる。This embodiment includes a package mold part 1 which is mounted on a printed circuit board 4 and has a plurality of connector pins 2 inside to form a connector shape, and a connector pin 2 by a bonding wire 5 inside the package mold part 1. An IC chip 3 for an interface or a driver/receiver is assembled by bonding to the IC chip 3.

即ち、インタフェース用又はドライバ／レシーバ用のＩ
Ｃチップ３は、パッケージモールド部１をなすコネクタ
内部に組立てられ、各チップのパッドはコネクタビン２
にボンディングされる。ＩＣチップ３は、信号線の本数
に応じて上下２段など必要な数だけ組立てられる。i.e. I for the interface or for the driver/receiver.
The C-chip 3 is assembled inside the connector forming the package mold part 1, and the pads of each chip are assembled in the connector bin 2.
is bonded to. The IC chips 3 are assembled in the required number, such as in upper and lower stages, depending on the number of signal lines.

このような本実施例によれば、ＩＣチップ３とコネクタ
が一体化されるので、プリント基板４上における実装面
積の効率化が図かれ、またコネクタの多ピン化にも容易
に対応することができる。According to this embodiment, since the IC chip 3 and the connector are integrated, the mounting area on the printed circuit board 4 can be made more efficient, and it is also possible to easily accommodate the increase in the number of pins of the connector. can.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、通常使用されるインター
フェイス用又はドライバ／レシーバ用のＩＣとコネクタ
を一体化した構造にすることにより、次の様な効果があ
る。As explained above, the present invention provides the following effects by integrating a commonly used interface or driver/receiver IC and a connector.

即ち、従来のＩＣパッケージ及びコネクタであると、Ｉ
Ｃ用の実装面積及びコネクタ用の実装面積の和だけの分
がカードの論理分以外に必要になる実装面積であったが
、本発明ではＩＣとコネクタが一体化されたパッケージ
であるため、コネクタのみの実装面積は増加するかもし
れないが、従来の実装方法よりは縮少することができ、
またコネクタの多ビン化にも対応できる効果がある。That is, with conventional IC packages and connectors, I
The mounting area required in addition to the logic part of the card was the sum of the mounting area for C and the mounting area for the connector, but in the present invention, since the IC and connector are integrated into a package, the connector Although the mounting area of the chip may increase, it can be reduced compared to the traditional mounting method.
It also has the effect of being able to cope with the increase in the number of connector bins.

【図面の簡単な説明】[Brief explanation of drawings]

第１図（ａ）は本発明の一実施例の縦断面図、第１図（
ｂ）は同図（ａ）のＡ−Ａ’線断面図、ン 第２図は従来のＩＣパッケージ及びコネクタを使用した
実装構造の一例の断面図である。 １１１・・・パッケージモールド部（コネクタ本体部）
、２．１２・・・コネクタビン、３・・・ＩＣチップ、
４．１４・・プリント基板、５・・・ボンディング線、
６・・・ダイパッド、７・・・ＩＣパッケージ（ＤＩＰ
）。FIG. 1(a) is a longitudinal cross-sectional view of one embodiment of the present invention, FIG.
b) is a sectional view taken along the line AA' in FIG. 2(a), and FIG. 2 is a sectional view of an example of a mounting structure using a conventional IC package and connector. 111...Package mold part (connector main body part)
, 2.12... Connector bin, 3... IC chip,
4.14... Printed circuit board, 5... Bonding wire,
6...Die pad, 7...IC package (DIP
).

Claims (1)

【特許請求の範囲】[Claims] 　プリント基板上に実装され且つ内部に複数のコネクタ
ピンを有してコネクタの形状をなすコネクタ本体と、こ
のコネクタ本体の内部にて前記コネクタピンにボンディ
ングされて組立てられたインタフェイス用又はドライバ
／レシーバ用のＩＣチップとを備えることを特徴とする
コネクタ型ＩＣパッケージ。A connector body mounted on a printed circuit board and having a plurality of connector pins inside to form a connector shape, and an interface or driver/receiver assembled by bonding to the connector pins inside the connector body. A connector-type IC package characterized by comprising an IC chip for
JP26977390A 1990-10-08 1990-10-08 Connector type ic package Pending JPH04145653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26977390A JPH04145653A (en) 1990-10-08 1990-10-08 Connector type ic package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26977390A JPH04145653A (en) 1990-10-08 1990-10-08 Connector type ic package

Publications (1)

Publication Number Publication Date
JPH04145653A true JPH04145653A (en) 1992-05-19

Family

ID=17476955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26977390A Pending JPH04145653A (en) 1990-10-08 1990-10-08 Connector type ic package

Country Status (1)

Country Link
JP (1) JPH04145653A (en)

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