JPH04144423A - A/d converter - Google Patents

Abstract

PURPOSE:To improve differentiated non-linearity by adding a pedestal signal to a peak-held input signal, executing rapid sampling many times, accumulating the sampled results and dividing the accumulated of sampling value by the number of times of sampling to average the sampled values. CONSTITUTION:A signal adder 2 adds a pedestal signal generated from a pedestal signal generator 9 to an analog signal held by a peak holding circuit 1. A flash ADC 3 samples the addition signal between the input signal outputted from the adder 2 and the pedestal signal at a high speed and converts the sampled signal into a digital signal. An accumulator 4 accumulates outputs sampled by the ADC 3 and a divider 5 divides the accumulated output of the accumulator 4 by the number of times of sampling to average the sampled signals. Consequently, the differentiated non-linearity can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an AD converter that averages differential nonlinearity when converting an input analog signal to a digital signal.

[Conventional technology]

AD (Analog-to-Digital) converters that are used for statistical analysis or histodynamics, such as radiation spectrometers, require extremely high differential nonlinearity. For this reason, conventionally, a sliding scale type AD converter using a so-called Wilkinson type AD converter or a successive approximation type AD converter has been used, and has achieved differential nonlinearity of 1% or less.

FIG. 6 is a diagram for explaining the conventional Wilkinson type AD converter. As shown in FIG. In this method, the battery is discharged linearly, and the time until the discharge is completed (valid count period) is counted using clock pulses. This AD converter takes advantage of the good differential nonlinearity of time measurement, and obtains good differential nonlinearity by counting the discharge time using clock pulses with accurate cycles.

Figure 7 is a configuration diagram of a slip ink scale type AD converter. For each AD conversion, the DC voltage, which is changed in △V steps corresponding to the ILSB (minimum pit) voltage of the successive approximation type AD converter, is peaked. AD conversion is performed in addition to the held input analog signal, and the digital value generated by the added DC voltage is subtracted from the obtained result to obtain the final result.

By this operation, as shown in Fig. 8, the area of the conversion ruler that takes the digital code ]0' for the first AD conversion, 9 for the next conversion, and then °8"7"6" for the next conversion.
... By sliding the ruler,
This is an attempt to improve differential nonlinearity by performing statistical averaging.

[Problem to be solved by the invention]

FIG. 10 is a diagram for explaining differential nonlinearity.

The differential nonlinearity of the AD converter is - ILSB (
(minimum bit) is expressed as a deviation from the voltage Δ■, and the largest value among those found at all conversion points is used.

As shown by the solid line, if the analog width at each conversion point is Δ■, the differential nonlinearity of this AD converter is 0%. However, in reality, many AD converters have an analog width of Δ■1, Δ■2, etc. at each conversion point, as shown by the dotted line.
... has a deviation from Δ■, and causes inherent differential nonlinearity due to the AD converter system.

The present invention aims to improve differential nonlinearity in order to apply successive approximation type AD converters and flash type converters, which have differential nonlinearity of up to ±50%, to AD converters for radiation measurement and X-ray measurement. This is the purpose.

[Means to solve the problem]

To this end, the AD converter of the present invention includes a means for holding the peak of an input analog signal, a pedestal signal generating means for generating a pedestal signal that changes with a predetermined waveform, and a signal addition means for adding the pedestal signal to the peak-held input analog signal. means, AD converting means for sampling the output of the signal adding means at high speed and converting it into digital data; accumulating means for accumulating the output of the AD converting means; averaging the output of the accumulating means by the number of sampling links. The present invention is characterized in that it includes an averaging means and is configured to average differential nonlinearity when converting an input analog signal into a digital signal.

[Effect]

In the AD converter of the present invention, the pedestal signal generation means, the signal addition means, and the AD conversion means add the pedestal signal to the input analog signal and sample it at high speed.
Some digital values obtained by converting to digital signals appear as frequencies that reflect differential nonlinearity. Therefore, by accumulating and averaging these values using an accumulating means and an averaging means, it is possible to improve the differential nonlinearity.

〔Example〕

Examples will be described below with reference to the drawings.

FIG. 1 is a diagram showing one embodiment of the AD converter according to the present invention, and FIG. 2 is a waveform diagram for explaining the operation of the AD converter shown in FIG. 1. In the figure, 1 is a peak hold circuit, 2 is a signal addition circuit, 3 is a flash ADC, 4 is an accumulator, 5 is a divider, 6 is a control circuit, 7 is a level adjuster, 8 is a waveform selector, 9 indicates a pedestal signal generator.

In FIG. 1, a peak hold circuit 1 holds the peak value of an input analog signal, and a pedestal signal generator 9 generates a pedestal signal with a level and waveform set by a level adjuster 7 and a waveform selector 8. is generated. The signal addition circuit 2 is configured to add the analog signal held by the peak hold circuit 1 and the pedestal signal generated by the pedestal signal generator 9, and the flash ADC 3 is configured to add the input signal output from the signal addition circuit 2 and the pedestal signal. This is an analog-to-digital converter that samples the added signal at high speed and converts it into a digital signal. The accumulator 4 accumulates the sampled output of the flash ADC 3, and the divider 5 divides the accumulated output of the accumulator 4 by the number of sampling times and averages the result. The control circuit 6 controls the operations of the pedestal signal generator 9, flash ADC 3, accumulator 4, and divider 5 using the peak detection signal of the peak hold circuit 1 as a trigger.

Next, the overall operation will be explained with reference to FIG.

When measuring an input voltage as shown in (input) in FIG. 2, the peak hold circuit 1 holds the peak of this voltage waveform and outputs a peak detection signal (PKDET) to the control circuit 6.

Based on this peak detection signal, the control circuit 6 uses this as an AD start signal, sends the AD sampling clock ■ to the flash ADC 3, sends the product-sum timing clock ■ to the accumulator 4, sends the AD operation period signals ■ and ■ to the peak hold circuit l, The averaged signal is sent to the pedestal signal generator 9, and furthermore, at the end of the AD operation period, the averaged signal is sent to the divider 5.
Send to.

During the AD operation period signal ■, the pedestal signal generator 9
Since the pedestal signal (2) which increases in proportion to time is generated, the signal addition circuit 2 outputs the signal (2) which is the sum of this signal and the peak hold value of the input signal. Therefore, the flash ADC 3 samples this signal at high speed using the AD sampling clock (2), converts it into a digital signal, and outputs it, and the accumulator 4 sequentially accumulates it using the product-sum timing clock (2). Finally, the accumulated output of the accumulator 4 is averaged by a divider 5.

FIG. 3 is a diagram for explaining averaging of differential nonlinearity.

If there is no pedestal signal, the same digital values (in other words, channels) will be accumulated and averaging cannot be calculated, but by adding the pedestal signal as described above, averaging can be performed.

For example, if the pedestal signal is a signal that changes linearly as in the example above, the digital value (channel) distribution after a certain number of samplings will follow the distribution of differential nonlinearity, so the number of samplings will By averaging, the differential nonlinearity is averaged. This relationship is shown in FIG. 3, where (a) shows an exaggerated original differential nonlinearity distribution, and (b) shows an improved differential nonlinearity distribution. In this way, the average value of the a range of the signal obtained by adding the pedestal signal to the input signal is a', the average value of the b range is b', the average value of the e range is e'
is given by Note that in this case, a channel shift occurs due to averaging, but this can be corrected by adding correction.

Further, the improvement of differential nonlinearity lies in how to average and improve the inherent differential nonlinearity distribution (pattern) of the flash ADC. Therefore, the averaging efficiency changes depending on the waveform and level of the pedestal signal added. Therefore, if the pedestal signal generation circuit is configured to be able to generate several types of waveforms and adjust the levels, it is possible to further improve the differential nonlinearity by selecting the waveforms and adjusting the levels.

FIG. 4 is a diagram showing an example of the configuration of a wave height measuring section in radiation measurement, etc., in which 11 is a detector, 12 is a preamplifier, 13 is a main amplifier including a waveform shaping circuit, and 14 is an AD according to the present invention.
It is a converter. FIG. 5 is a diagram for explaining an example of waveform shaping in consideration of the pedestal component.

In the wave height measurement section for radiation measurement, etc., the output signal level of the preamplifier is small and the S/N ratio is poor, so an appropriate filter is applied to improve this and produce a pulse signal corresponding to the wave height value, as shown in Figure 4. It has a waveform shaping circuit 13 as shown in FIG. In this waveform shaping, the waveform shaping is as if the pedestal for averaging mentioned above was installed (Fig. 5 ■)
If this is done, this signal may be directly accumulated and averaged.

Also, if the input signal waveform is a trapezoidal wave or a rectangular wave,
The pedestal waveform may be selected, level adjusted, and added to the input signal to be directly accumulated and averaged.

Note that no signal hold is performed at this time.

By combining waveform shaping and the AD converter according to the present invention as described above, it is possible to construct an AD converter that achieves a high counting rate.

It should be noted that the present invention is not limited to the embodiment described in item 1, and various modifications are possible. For example, in the above embodiment, a flash type AD converter is used, or a sequential type AD converter that can perform conversion at the cycle of the AD sampling link clock may be used. Further, the divider 5 may be other than the divider as long as it obtains averaged data corresponding to the number of summlinks.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, a pedestal signal is added to a peak-halted input signal to swing the input signal within a certain range, and a large number of high-speed samplings are performed to accumulate the results. Since it is divided by the number of sampling times and averaged, it is possible to find the average value of the range shaken by the pedestal signal, and this averaging, that is, averaging the differential nonlinearity, can improve the differential nonlinearity.
- I can do it.

[Brief explanation of drawings]

Fig. 1 is a diagram showing one embodiment of the AD converter according to the present invention, Fig. 2 is a waveform diagram for explaining the operation of the AD converter shown in Fig. 1, and Fig. 3 is an average of differential nonlinearity. Figure 4 is a diagram showing an example of the configuration of a wave height measuring section in radiation measurement, etc. Figure 5 is a diagram explaining an example with a pedestal installed, Figure 6 is a diagram showing a conventional Wilginson type AD A diagram for explaining the converter, FIG. 7 is a configuration diagram of a sliding scale AD converter, and FIG. 8 is a diagram for explaining the averaging of differential nonlinearity of the sliding scale AD converter shown in FIG. 7. 9th
The figure is a diagram for explaining differential nonlinearity. 1...Peak hold circuit, 2...Signal addition circuit,
3... Flash ADC14... Accumulator, 5...
Divider, 6...control circuit, 7...level adjuster, 8...waveform selector, 9...pedestal signal generator. ■

Claims (3)

[Claims] (1) means for holding the peak of the input analog signal;
A pedestal signal generating means that generates a pedestal signal that changes with a predetermined waveform, a signal addition means that adds the pedestal signal to a peak-held input analog signal, and an AD that samples the output of the signal addition means at high speed and converts it into a digital signal. A converting means, an accumulating means for accumulating the output of the AD converting means, and an averaging means for averaging the output of the accumulating means by the number of sampling times, and differential nonlinearity when converting an input analog signal into a digital signal. An AD converter characterized in that it is configured to perform averaging. (2) The AD converter according to claim 1, wherein the pedestal signal generating means is configured to be capable of selecting a plurality of waveforms and adjusting a level. (3) The AD converter according to claim 1, characterized in that a flash type AD converter is used as the AD conversion means.