JPH04144134A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH04144134A JPH04144134A JP26679090A JP26679090A JPH04144134A JP H04144134 A JPH04144134 A JP H04144134A JP 26679090 A JP26679090 A JP 26679090A JP 26679090 A JP26679090 A JP 26679090A JP H04144134 A JPH04144134 A JP H04144134A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon nitride
- nitride film
- silicon
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 29
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 29
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000005530 etching Methods 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 10
- 241000293849 Cordylanthus Species 0.000 abstract description 8
- 238000000034 method Methods 0.000 abstract description 8
- 230000003647 oxidation Effects 0.000 abstract description 8
- 238000007254 oxidation reaction Methods 0.000 abstract description 8
- 238000002955 isolation Methods 0.000 abstract description 7
- 238000001312 dry etching Methods 0.000 abstract description 3
- 238000001039 wet etching Methods 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 229920005591 polysilicon Polymers 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装Ｗの製造方法に関し、特に素子分離膜
の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device W, and particularly to a method for forming an element isolation film.
従来の半導体装置の製造工程における素子分離膜を形成
方法を第３図を用いて説明する。A method of forming an element isolation film in a conventional semiconductor device manufacturing process will be described with reference to FIG.
まず第３図（ａ）に示すように、シリコン基板１上に熱
処理や化学気相成長によって１００〜５００人程度の薄
い酸化シリコン１２を成長させ、更にその上に化学気相
成長によって窒化シリコン膜５を成長させ、その窒化シ
リコン膜５をフォトレジストからなるマスクを使ってパ
ターニングする。次に第３図（ｂ）に示すように、この
半導体基板を熱酸化処理することにより、窒化シリコン
膜５をエツチングした部分に４００〜８００人程度の比
較的厚い酸化シリコン膜１２Ａを成長させ、素子分離膜
としている。First, as shown in FIG. 3(a), a thin layer of silicon oxide 12 of about 100 to 500 layers is grown on a silicon substrate 1 by heat treatment or chemical vapor deposition, and then a silicon nitride film is further grown on top of it by chemical vapor deposition. The silicon nitride film 5 is then patterned using a mask made of photoresist. Next, as shown in FIG. 3(b), by thermally oxidizing this semiconductor substrate, a relatively thick silicon oxide film 12A of about 400 to 800 layers is grown on the etched portion of the silicon nitride film 5. It is used as an element isolation film.
この従来の製造方法では、１００〜５００人程度の薄い
酸化シリコン膜１２をシリコン基板１の上に付け、その
状態で熱処理することにより、厚い酸化シリコン膜１２
Ａを形成していた。その際、厚い酸化シリコン１Ｉ１１
２Ａを形成しない部分、つまり素子形成領域には、酸化
シリコン膜上に窒化シリコン膜を化学気相成長により付
け、シリコンの酸化を抑制しているが、窒化シリコン膜
の端の部分では、シリコンの酸１ヒを抑えることができ
ず、窒化シリコン膜を押し上げて、鳥の嘴状に酸化シリ
コン膜が形成されてしまう。これが、いわゆるバーズビ
ークと呼ばれる現象であり、素子形成領域の両端に厚い
酸化膜が形成されてしまうため素子形成領域か設計寸法
より狭くなる。このため特に高集積化に伴い設計寸法が
短小になるに従い、バーズビークの設計寸法への影響が
問題となってきた。In this conventional manufacturing method, a thin silicon oxide film 12 of about 100 to 500 layers is attached on the silicon substrate 1 and heat-treated in that state.
It formed an A. At that time, thick silicon oxide 1I11
In the area where 2A is not formed, that is, in the element formation area, a silicon nitride film is deposited on the silicon oxide film by chemical vapor deposition to suppress silicon oxidation. The acid oxide film cannot be suppressed and the silicon nitride film is pushed up, forming a silicon oxide film in the shape of a bird's beak. This is a so-called bird's beak phenomenon, in which a thick oxide film is formed at both ends of the element forming area, making the element forming area narrower than the designed dimension. For this reason, the influence of the bird's beak on the design dimensions has become a problem, especially as the design dimensions have become shorter and smaller due to higher integration.
本発明の半導体装置の製造方法は、半導体基板上に酸化
シリコン膜を被着する工程と、この酸化シリコン膜を選
択的にエツチングし凹部を形成する工程と、この凹部内
に選択的に窒化シリコン膜を埋没する工程と、この窒化
シリコン膜をマクスとし半導体基板を熱酸化する工程と
を含んで構成される。The method for manufacturing a semiconductor device of the present invention includes a step of depositing a silicon oxide film on a semiconductor substrate, a step of selectively etching the silicon oxide film to form a recess, and a step of selectively etching silicon nitride into the recess. The method includes a step of burying the film, and a step of thermally oxidizing the semiconductor substrate using the silicon nitride film as a mask.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図＜ａ）〜（ｄ）は本発明の第１の実施例分説明す
るための半導体チップの断面図である。FIGS. 1A to 1D are cross-sectional views of a semiconductor chip for explaining a first embodiment of the present invention.
まず、第１図（ａ）に示すように、シリコン基板１に熱
酸化あるいは化学気相成長によって厚さ２０００〜４０
００人の酸化シリコン膜２を形成する。次でその上に厚
さ１００〜５００人程度のポリシリコン膜３を成長させ
る。尚、ポリシリコン膜３は、窒化シリコン膜のドライ
エ・ンチングの際の酸化シリコン膜２へのダメージ防止
および酸化シリコン膜２のエツチング阻止材として働く
。First, as shown in FIG. 1(a), a silicon substrate 1 is heated to a thickness of 2,000 to 40 mm by thermal oxidation or chemical vapor deposition.
000 silicon oxide film 2 is formed. Next, a polysilicon film 3 having a thickness of approximately 100 to 500 layers is grown thereon. Incidentally, the polysilicon film 3 serves to prevent damage to the silicon oxide film 2 and to prevent the silicon oxide film 2 from being etched during dry etching of the silicon nitride film.
更にフォトレジスト膜４を塗布法により形成したのちパ
ターニングする。Furthermore, a photoresist film 4 is formed by a coating method and then patterned.
次に第１１図（ｂ）に示すように、フォトレジスト膜４
をマスクとし、ドライエツチング法によってポリシリコ
ン膜３と酸化シリコン膜２の工・ンチングを行ない凹部
を形成した後にフォトレジスト膜４を除去する。次で窒
化シリコン膜５を成長させ、再びフォトレジスト膜４Ａ
を形成する。尚、この時窒化シリコン膜５とシリコン基
板１との間に酸化シリコン膜２を介すると窒化シリコン
膜５の応力を緩和でき都合が良い。Next, as shown in FIG. 11(b), the photoresist film 4
Using as a mask, polysilicon film 3 and silicon oxide film 2 are etched by dry etching to form a recessed portion, and then photoresist film 4 is removed. Next, a silicon nitride film 5 is grown, and a photoresist film 4A is grown again.
form. At this time, it is convenient to interpose the silicon oxide film 2 between the silicon nitride film 5 and the silicon substrate 1 because the stress in the silicon nitride film 5 can be relaxed.
次に第１図（ｃ）に示すように、窒化シリコン膜５をフ
ォトレジスト膜４Ａとともにエツチングし、素子形成領
域上の凹部内のみに窒化シリコン膜５分残し、次でポリ
シリコン膜３をウェットエツチング法によって除去する
。次に第１図（ｄ）に示すように、この状態の半導体基
板を熱酸化することにより、素子分離の為の酸化シリコ
ン膜２を更に厚く形成する。Next, as shown in FIG. 1(c), the silicon nitride film 5 is etched together with the photoresist film 4A, leaving 5 minutes of the silicon nitride film only in the recess above the element forming area, and then the polysilicon film 3 is wetted. Remove by etching method. Next, as shown in FIG. 1(d), the semiconductor substrate in this state is thermally oxidized to form an even thicker silicon oxide film 2 for element isolation.
このように第１の実施例によれば、素子形成領域上の凹
部内に窒化シリコン膜を埋め込んでから、素子分離用の
酸化膜を形成するため、窒化シリコン膜成長後の熱酸化
時間を短くでき、バーズビークを極力抑えることができ
る。As described above, according to the first embodiment, the silicon nitride film is buried in the recess on the element formation region and then the oxide film for element isolation is formed, so that the thermal oxidation time after the silicon nitride film is grown can be shortened. It is possible to suppress bird's beak as much as possible.
第２図は本発明の第２の実施例を説明するための半導体
チップの断面図である。FIG. 2 is a sectional view of a semiconductor chip for explaining a second embodiment of the present invention.
第１の実施例同様酸化シリコン膜２を選択的にエツチン
グして凹部を形成するが、窒化シリコン膜５を成長させ
る前にポリシリコン膜３Ａを凹部内に成長させ、その上
から窒化シリコン膜５を成長させて、熱処理を行ない酸
化シリコン膜２を厚くする。耐酸化性被膜としての窒化
シリコン膜５は厚く成長させる程シリコン基板１の酸化
をおさえ、バーズビークの形成を抑制できるが、あまり
窒化シリコン膜５を厚く成長させると、シリコン基板１
にストレスがかかり、表面欠陥が発生するという問題が
ある。このため第２の実施例では、ポリシリコン膜３Ａ
を下に敷くことによって厚し）酸化シリコン膜の成長に
よるシリコン基板へのダメージを防ぎ、かつバーズビー
クの抑制力を更に強めるという利点がある。Similar to the first embodiment, the silicon oxide film 2 is selectively etched to form a recess, but before growing the silicon nitride film 5, a polysilicon film 3A is grown in the recess, and the silicon nitride film 5 is then grown on top of the polysilicon film 3A. is grown and heat treated to thicken the silicon oxide film 2. The thicker the silicon nitride film 5 as an oxidation-resistant film is grown, the more it can suppress the oxidation of the silicon substrate 1 and the formation of bird's beak. However, if the silicon nitride film 5 is grown too thick, the silicon substrate 1
There is a problem in that stress is applied to the surface and surface defects occur. Therefore, in the second embodiment, the polysilicon film 3A
This has the advantage of preventing damage to the silicon substrate due to the growth of a silicon oxide film and further strengthening the ability to suppress bird's beak.
以上説明したように本発明によれ°ば、素子形成領域で
のバーズビークを抑制できるため、厚さ８０００人の酸
化シリコン膜で素子分離構造を形成する場合、従来の技
術では約８０００人の長さのバーズビークが形成されて
いたが、本発明では窒化シリコン膜成長後の熱酸化によ
る酸化膜の厚さを従来の半分の４０００人で済むので、
ノく−ズビークの長さも約４０００人となり、素子形成
領域が従来より約８０００人広くなる。このため半導体
装置の設計において高精窩化か計れ、高集積化か可能に
なるという効果を有する。As explained above, according to the present invention, bird's beak in the element formation region can be suppressed. Therefore, when forming an element isolation structure with a silicon oxide film with a thickness of 8,000 layers, the conventional technology would have a length of approximately 8,000 layers. However, in the present invention, the thickness of the oxide film by thermal oxidation after the growth of the silicon nitride film can be reduced by 4,000 people, which is half of the conventional method.
The length of Noxbeek will also be approximately 4,000 people, and the area for forming elements will be approximately 8,000 people wider than before. This has the effect that it is possible to design a semiconductor device with high accuracy and high integration.
第１図及び第２図は、本発明の第１及び第２の実施例を
説明するための半導体チ・ツブの断面図、第３図は従来
例を説明するための半導体チップの断面図である。
１・・・シリコン基板、２・・・酸化シリコン膜、３３
Ａ・・ポリシリコン膜、４，４Ａ・ フォトレジスト膜
、５・・窒化シリコン膜、１２．１２Ａ・・・酸化シリ
コン膜。
代理入 弁理士 内 原 晋
末１図
第２図
恵３図1 and 2 are cross-sectional views of a semiconductor chip for explaining the first and second embodiments of the present invention, and FIG. 3 is a cross-sectional view of a semiconductor chip for explaining a conventional example. be. 1... Silicon substrate, 2... Silicon oxide film, 33
A...Polysilicon film, 4,4A...Photoresist film, 5...Silicon nitride film, 12.12A...Silicon oxide film. Acting Patent Attorney Susumue Uchihara Figure 1 Figure 2 Megumi Figure 3
Claims (1)
の酸化シリコン膜を選択的にエッチングし凹部を形成す
る工程と、この凹部内に選択的に窒化シリコン膜を埋没
する工程と、この窒化シリコン膜をマクスとし半導体基
板を熱酸化する工程とを含むことを特徴とする半導体装
置の製造方法。A step of depositing a silicon oxide film on a semiconductor substrate, a step of selectively etching this silicon oxide film to form a recess, a step of selectively embedding a silicon nitride film in this recess, and a step of selectively burying a silicon nitride film in this recess. 1. A method of manufacturing a semiconductor device, comprising a step of thermally oxidizing a semiconductor substrate using a film as a mask.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26679090A JPH04144134A (en) | 1990-10-04 | 1990-10-04 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26679090A JPH04144134A (en) | 1990-10-04 | 1990-10-04 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04144134A true JPH04144134A (en) | 1992-05-18 |
Family
ID=17435725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26679090A Pending JPH04144134A (en) | 1990-10-04 | 1990-10-04 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04144134A (en) |
-
1990
- 1990-10-04 JP JP26679090A patent/JPH04144134A/en active Pending
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