JPH04142890A - Output potential clamp device for solid-state image pickup element - Google Patents

Abstract

PURPOSE:To obtain an excellent clamp characteristic by increasing gradually a horizontal transfer frequency or a horizontal scanning frequency of plural light shield pictures from a frequency lower than a horizontal transfer frequency or a horizontal scanning frequency of a valid picture element. CONSTITUTION:Horizontal transmission frequencies phiS1-phiS3 and a sample-and- hold frequency phiSH are low between times t4 and t5 and the number of light shield picture elements included in an output for a prescribed period is less. Moreover, the frequencies are the same as the usual frequencies, that is, the horizontal transmission frequencies and a sample-and-hold frequency between times t5 and t6. Thus, in the case of clamping, an output level of the solid-state image pickup element is fixed to a reference level in terms of an average potential of an optical black picture element, the average is not a simple average but a weighted average, the weight is light toward the first half of the clamp pulse because the effect onto the final value is small and the weight is increased exponentially toward the latter half. Thus, the excellent clamp characteristic is obtained without increasing the number of picture elements of the optical black part.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an output potential clamping device for a solid-state imaging element in a solid-state imaging device.

[Conventional technology]

FIG. 3 is a block diagram of the solid-state imaging device.

In the figure, 122 is a clock circuit that supplies necessary timing pulses to each part of the system.

Reference numeral 101 is a solid-state image sensor that converts an optical image guided by an optical system (not shown) into an electrical signal.
) and blue (B) are output with a phase difference of 120 degrees. 114 is a drive circuit that converts the pulses of the clock circuit 122 into a drive voltage for the solid-state image sensor r101. ,102,103,1
04 is a sample hold (S/H) circuit for removing clock noise from the output of the solid-state image sensor 101. 105, 106, 107 are sample and hold circuits 1
Among the signals obtained from 02, 103, and 104, the light shielding part (
This is a clamp circuit that fixes the potential so that the signal potential of the optical black section (referred to as the optical black section) becomes the reference potential. 10
8 is the output of the clamp circuits 105, 106, 107.
A switching circuit switches with a phase difference of 20 degrees, and its output is used as a luminance signal (Y). 109 is a luminance low-pass filter (YLPF) that removes unnecessary lock noise and limits the band of the luminance signal, 110.111, 11
2 is a color low-pass filter (CLP) that limits the band of the color signal.
F).

115, 116, 117, and 11.8 are gamma correction circuits that perform gamma correction on the luminance signal and color signal. 11
9 is a matrix θ calculation circuit which generates a luminance signal and a color difference bracket from the comma-corrected luminance signal and the R, G, and B signals. Reference numeral 120 denotes an encoder circuit that generates a composite video signal based on the NTSC, PAL, etc. system from the output of the 7-trix calculation circuit 119. 121 is an adder that adds the synchronization signal from the clock circuit 122.

FIG. 4 shows an example of the configuration of the solid-state imaging device 101 used in the solid-state imaging device of FIG. Here, a virtual phase type three-output frame transfer type CCD will be described. However, such a solid-state image sensor is already known and has been described in other documents (I E E 'l'rans,
1ilcc1. ron Dcvices, Vol IE
D-32, 8ugus1. I! 185), but only a brief explanation will be given here. Fourth
In the figure, 201 is a light receiving section that also serves as a vertical transfer CCD, and is driven by a vertical transfer pulse φPI.

202 is a light-shielded vertical transfer CCD, referred to as a memory section, and is driven by i[direct transfer pulse φPs. 20
3, 204, and 205 are the 1st. Second. There is a third horizontal transfer CCD, each with a water transfer pulse φSl.
, φS2. Driven by φs3. 206, 207
．． 208 are the first . Second. This is the third output amplifier.

209a to 209c are a third horizontal transfer CCD 205 from the memory section 202, a second horizontal transfer CCD 204 from the third horizontal transfer CCD 205, and a second water transfer CCD 20.
4 to the first horizontal transfer CCD 203, and is driven by a transfer pulse φT. FIG. 5 is an arrangement diagram of color filters for use as a color solid-state image sensor by using the solid-state image sensor r- shown in FIG. 4 as a color solid-state image sensor. are attached so that they correspond. In the example of Fig. 5, R, G,
It is composed of B vertical stripe filters. FIG. 6 shows the driving timing of the solid-state image sensor of FIG. 4, and the period from time t1 to t2 is a vertical blanking period, during which the vertical transfer pulse φPI is generated.

φPS and transfer pulse φT are driven at high speed in the same phase, and the charges accumulated in the light receiving section 201 by tl are transferred to the memory section 202 through 1-. Then time t
2 to t3, during the horizontal blanking period of the horizontal scanning period, charges for one line are transferred from the memory section 202 to the first horizontal transfer CCD 203 via the transfer gates 209a to 209c, and charges corresponding to the R filter are transferred to the first horizontal transfer CCD 203. , second
The charges corresponding to the G filter are transferred to the third horizontal transfer CCD 204, and the charges corresponding to the B filter are transferred to the third horizontal transfer CCD 205. When the distribution is completed, the charges corresponding to R, G, and B are transferred to the third horizontal transfer CCD 205. 1st each.
Second. It is transferred horizontally at high speed to the third horizontal transfer CCDs 203, 204, 205, and output amplifiers 206, 207.
゜208, it is converted to heavy use and output.

FIG. 7 is an explanatory diagram of an optical black section provided in the light receiving section 201 of the solid-state image sensor 101 used in the conventional example, in which several lines are displayed during the vertical blanking period prior to scanning during the vertical scanning period, and horizontal blanking is performed prior to the horizontal scanning period. A light-shielding section called an optical black section is provided so that outputs of several light-shielded pixels can be obtained during a period. FIG. 8 shows the drive timing and clamp pulse timing of the horizontal scanning period of the solid-state image sensor 101 in the conventional example, which are reduced.
A horizontal blanking period begins after one line of charge is output at time t1. Horizontal blanking period t1 to t
Explain that important actions take place during 5"4-t.
From 2 onwards, the transfer gate pulse φT and the horizontal transfer pulse φS1 are driven in three pulses with opposite phases. The horizontal transfer pulses φS2 and φS3 are also driven in phase with the horizontal transfer pulse φS1. By this operation, the final stage 1 of the memory section 202
Line charge or horizontal transfer CCD203゜204,20
It is divided into 5. This distribution is dynamic ('+ After the end Y, the superposition transfer pulse φPs is driven by one pulse, and the charges of the next line are transferred to the final stage of the memory section 202. Next, the horizontal transfer of the distributed charges is performed. For several clocks after the start of horizontal transfer, there is an idle transfer and no charge from the light receiving section 201 is output.This is because the horizontal transfer CCD normally leads charges to the output amplifiers 206 to 208, so the horizontal pixel of the light receiving section 201 This is because the number of transfer stages is greater than the number of transfer stages.Next, between t4 and t5, the charge of the optical black section described above is output.The above operation from tl to t5 is called horizontal blanking. It must be done within the period.

The output of the first output amplifier 206 becomes Vol.

An output proportional to the amount of irradiation light is output in the negative direction. From t4 to t5 indicates the output of dark charges. φSH is a pulse given to the sample and hold circuit 102, and by sampling and holding at a phase corresponding to the output of the solid-state image sensor 101, an output like S/Hout is obtained.

The polarity of S/Hout is inverted by an inverting amplifier built in the sample and hold circuit 102.

φCLP is a clamp pulse given to the clamp circuit 105, and has a width corresponding to the optical black portion. FIG. 9 is a circuit example of a clamp circuit. 3
01 is a capacitor, 302 is a clamp switch, 303
is the reference voltage source.

Clamp switch 302 is turned on and off by clamp pulse φCLP. It is turned on when the clamp pulse φCLP is at a high level. In normal operation, the clamp pulse φCLP is turned on for a predetermined period during which the pixel output of the optical black portion is performed, so that the capacitor 301 is charged and discharged, and the output potential of the optical black portion is changed to the reference voltage source 303. is fixed at the reference potential VCLP. FIG. 10 shows the clamp pulse φC in the conventional example.
10 is a diagram showing the waveforms of the human power Vin and output Vout of the clamp circuit shown in FIG. 9 when the width of LP is changed. FIG. 1st
0 (a) shows the human power Vin of the clamp circuit, and (b) shows the output Vout when the width of the clamp pulse φCLP is narrow as shown in FIG. 0 (c). (d) shows the output waveform Vout when the clamp pulse φCLP has a wide width as shown in (e) of the figure. When the clamp pulse width is narrow as in (C), the output potential of the optical black section can be stably fixed to the reference potential VCLP when the human power signal amplitude is constant, but if the human power signal amplitude suddenly increases. Since the time constant for charging and discharging the capacitor 301 is constant, it takes time to bring the output potential of the optical black section to the reference potential VCLP with a narrow clamp pulse. When the clamp pulse is wide as shown in Fig. 10(e), it quickly reaches the reference voltage (I7V CL P as shown in Fig. 10(d)).If the width of the clamp pulse is constant, the on-resistance of the clamp switch 302 is low. , the smaller the internal resistance of the reference voltage source 303, the smaller the time constant and the faster it reaches the reference potential VCLP. Setting the clamp time constant to a smaller value is called hard clamping.

[Problem to be solved by the invention]

In order to widen the clamp pulse width, it is necessary to increase the number of pixels in the optical black section. However, increasing the number of pixels in the optical black area is the first step.
This means that the number of pixels in the solid-state image sensor increases, resulting in a decrease in yield. Second, since all signals in the optical black area must be output during the horizontal blanking period, in a solid-state image sensor with a multi-line readout structure, the distribution that should be added between t2 and t3 in Figure 8 is a pulse. , and the time allocated to vertical transfer pulses becomes shorter. This causes fixed vertical stripe noise in a solid-state image pickup device that performs multi-line reading. Conversely, if a heart clamp is performed, there will be a defect as shown in FIG. 11. That is, when an abnormal output due to a pixel defect is present in the optical black portion, the clamp circuit follows the abnormal output, and the output potential deviates from a predetermined reference potential, making horizontal stripe noise more likely to occur.

Therefore, in order to obtain good lamp characteristics, the clamp time constant should not be too small, the clamp pulse width should be as wide as possible, and the optical black part pixel should be shall be designed to be fixed at an average level. Conventionally,
In order to widen the clamp pulse width, the number of pixels in the optical black section was increased recently, which increased the chip area and lowered the yield when manufacturing solid-state image sensors.
I was letting it go.

The present invention has been made in view of such problems, and an object of the present invention is to provide an output potential clamping device for a solid-state image sensor that can obtain good lamp characteristics without increasing the number of pixels in the optical black area. That is.

[Failure to solve the problem]

In order to achieve the above object, the present invention configures an output potential clamping device for a solid-state image sensor as described in (1) below.

(1) A solid-state image sensor having a plurality of light-shielded pixels that is output during the horizontal blanking period, and an output potential that clamps the output potential of the solid-state image sensor to a reference potential using each output potential of the plurality of light-shielded pixels. A solid-state image sensing device comprising: a clamp means; and a clock means for increasing the horizontal transfer frequency or horizontal scanning frequency of the plurality of shaded images from a lower frequency to a higher frequency than the horizontal transfer frequency or horizontal scanning frequency of the effective pixels. Output type (+'7 clamp device.

[Effect]

With the configuration (1) above, the first light-shielded pixel maintains its output for a period longer than the period of horizontal transfer or horizontal scanning of effective pixels.11. Clamped to quasi-potential.

〔Example〕

The present invention will be explained below with reference to Examples.

FIG. 1 is a diagram illustrating the operation of an embodiment of the present invention.

As shown in the figure, between time t4 and t5, the horizontal transfer frequency φS1
~φS3 and sample hold frequency φSH are low,
The number of shaded pixels included in the output for a predetermined period is decreasing. Between t5 and t76, the horizontal transfer frequency and sample hold frequency are the same as normal, ie, effective pixels. Therefore, if the clamp periods are equal, the number of pixels in the optical black portion in the horizontal direction can be smaller than in the conventional example shown in FIG. 7, as shown in FIG. During clamping, the output potential of the solid-state image sensor 101 is fixed to the reference potential at the average level of the optical black area pixels.
, instead of a pure 1-no-average, there is a 1-average, and the first half of the Krumbhals has a small influence on the final value, so it is light, and the weight increases exponentially as it becomes later. increases. Therefore, increasing the number of output pixels per unit time does not contribute to the average effect, and by increasing the number of output pixels per unit time in the latter half, the weight of each pixel with respect to the average value is equalized. become. In this way, unnecessary pixels can be eliminated by keeping the contribution rate of the pixels in the first half of the clamp pulse and the pixels in the second half of the clamp pulse to the average value at the time of clamping constant 1-.

Although the above embodiment has been explained using a CCD, the same effect can be obtained by changing the horizontal scanning frequency in a scanning type high-speed sensor such as a MOS.

Also, in the example, the frequency is switched in two stages, but
The number of switching steps may be increased. Additionally, if the frequency of the final output of the optical black pixel is set to exceed the horizontal transfer frequency or horizontal scanning frequency of the normal effective pixel, the number of output pixels per intermediate time in the second half of the clamp period, which has the greatest weight, will increase and become abnormal. 3. [Effects of the Invention] As explained below, according to the present invention, it is possible to manufacture a solid-state image sensor without increasing the number of pixels in the optical black portion. It is possible to obtain good lamp characteristics without reducing the yield.

[Brief explanation of drawings]

Fig. 1 is a diagram explaining the operation of an embodiment of the present invention, Fig. 2 is a diagram showing the arrangement of the optical black part of the solid-state image sensor r used in the same embodiment, and Fig. 3 is a block diagram of the solid-state imaging device. 4 is a configuration diagram of the solid-state image sensor used in the solid-state image sensor of FIG. 3, FIG. 5 is a diagram of the arrangement of color filters, and FIG. 6 is a diagram showing the drive timing of the solid-state image sensor of FIG. 4. Fig. 7 is a diagram showing the arrangement of the optical black part of the solid-state image sensor used in the conventional example, Fig. 8 is a diagram explaining the operation of the conventional example, Fig. 9 is a circuit diagram of the clamp circuit, and Fig. 10 is the conventional example. Figure 11 is a diagram explaining the problems of the heart clamp. 101... Solid-state image sensor 105-106... Clamp circuit 114...
...Drive circuit 122...Clock circuit

Claims (1)

[Claims] (1) A solid-state image sensor having a plurality of light-shielded pixels that is output during the horizontal blanking period, and an output potential that clamps the output potential of the solid-state image sensor to a reference potential using each output potential of the plurality of light-shielded pixels. The invention is characterized by comprising a clamping means and a clock means for gradually increasing the horizontal transfer frequency or horizontal scanning frequency of the plurality of shaded images from a frequency lower than the horizontal transfer frequency or horizontal scanning frequency of the effective pixels to a higher frequency. An output potential clamp device for solid-state image sensors.