JPH04129278A - Semiconductor photodetector and substrate for semiconductor photodetector - Google Patents

Semiconductor photodetector and substrate for semiconductor photodetector

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Publication number
JPH04129278A
JPH04129278A JP2250680A JP25068090A JPH04129278A JP H04129278 A JPH04129278 A JP H04129278A JP 2250680 A JP2250680 A JP 2250680A JP 25068090 A JP25068090 A JP 25068090A JP H04129278 A JPH04129278 A JP H04129278A
Authority
JP
Japan
Prior art keywords
layer
inp
light
substrate
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2250680A
Other languages
Japanese (ja)
Inventor
Koichi Yuki
結城 幸一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2250680A priority Critical patent/JPH04129278A/en
Publication of JPH04129278A publication Critical patent/JPH04129278A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To maintain an excellent optical power linearity even against an optical intensity of 10mW or more by increasing in thickness an InP cap layer and reducing its resistance value. CONSTITUTION:An InP buffer layer 12 is formed on an InP substrate 10, and an InGaAs light absorption layer 4 is formed thereon. Further, an InP cap layer 16 is formed, its thickness is ranged from 3.5 to 10mum, and formed thicker than that in prior art. An impurity diffused layer 18 is formed in depth in contact with an InGaAs light absorption layer 14 in its photodetecting region. Thus, since the layer 16 is made thick to reduce its resistance value, an excellent optical power linearity can be maintained even for an optical intensity of 10mW or more.

Description

【発明の詳細な説明】 [概要] 光強度の計測に用いられる半導体受光素子及びその半導
体受光素子の製造に用いられる半導体受光素子用基板に
関し、 10mW以上の光強度に対しても優れた光ノくワーリニ
アリテイを有する半導体受光素子及び半導体受光素子用
基板を提供することを目的とし、InP半導体基板と、
前記InP半導体基板上に形成されなInGaAs光吸
収層と、前記InGaAs光吸収層上に形成されたIn
P−’rヤツプ層と、前記InPキャップ層の受光領域
に形成された不純物拡散層とを有する半導体受光素子に
おいて、前記InPキャップ層の厚さが3.5μmから
10μmの範囲内であるように構成する。
[Detailed Description of the Invention] [Summary] Regarding a semiconductor light receiving element used for measuring light intensity and a semiconductor light receiving element substrate used for manufacturing the semiconductor light receiving element, we have developed an optical technology that is excellent even for light intensities of 10 mW or more. The purpose of the present invention is to provide a semiconductor light-receiving device and a substrate for a semiconductor light-receiving device having high linearity, and an InP semiconductor substrate,
An InGaAs light absorption layer formed on the InP semiconductor substrate and an InGaAs light absorption layer formed on the InGaAs light absorption layer.
In a semiconductor light receiving element having a P-'r double layer and an impurity diffusion layer formed in a light receiving region of the InP cap layer, the thickness of the InP cap layer is within a range of 3.5 μm to 10 μm. Configure.

[産業上の利用分野] 本発明は光強度の計測に用いられる半導体受光素子及び
その半導体受光素子の製造に用いられる半導体受光素子
用基板に関する。
[Industrial Field of Application] The present invention relates to a semiconductor light-receiving element used for measuring light intensity and a semiconductor light-receiving element substrate used for manufacturing the semiconductor light-receiving element.

近年の光通信の高度化にともない、光計測分野において
は広い範囲に亘って正確な光強度測定が要求されている
。このため光計測に用いられる半導体受光素子の光パワ
ーリニアリティ(入射光の光強度と出力される光電流と
の間の線形性)を向上させること求められている。
As optical communications have become more sophisticated in recent years, accurate light intensity measurement over a wide range is required in the field of optical measurement. Therefore, it is required to improve the optical power linearity (linearity between the optical intensity of incident light and the output photocurrent) of semiconductor light receiving elements used for optical measurement.

[従来の技術] 従来の半導体受光素子を第4図を用いて説明する。[Conventional technology] A conventional semiconductor light receiving element will be explained using FIG. 4.

約200μm厚のn  −InP基板10上に約1μm
厚のn  −InPバッファ層12が形成され、このn
  −InPバッファ層12上に約2μm厚のn−In
GaAsnGaAs光吸収層上れている。n−InGa
AsnGaAs光吸収層上1μm厚のn−InPキャッ
プ層16が形成されている。n−InP?rヤップ層1
6の受光領域に+ はp 不純物拡散層18がn−InGaAs光吸収N1
4に接する深さまで形成されている。
Approximately 1 μm thick on the approximately 200 μm thick n-InP substrate 10
An n-InP buffer layer 12 with a thickness of n
- About 2 μm thick n-In on the InP buffer layer 12
A GaAsnGaAs light absorption layer is formed on top. n-InGa
A 1 μm thick n-InP cap layer 16 is formed on the AsnGaAs light absorption layer. n-InP? r Yap layer 1
+ is p in the light-receiving region of 6. The impurity diffusion layer 18 is n-InGaAs light absorption N1.
It is formed to a depth that touches 4.

n −I n P ”r ヤップ層16上にはSiN層
20が形成され、このSiN層20を介してp+不純物
拡散層18にコンタクトするリング状のP側電極22が
形成されている。n側電極24はn+InP基板10の
下面に形成されている。
n −I n P ”r A SiN layer 20 is formed on the YAP layer 16, and a ring-shaped P-side electrode 22 is formed in contact with the p+ impurity diffusion layer 18 via this SiN layer 20. n-side The electrode 24 is formed on the lower surface of the n+InP substrate 10.

p側電極22内部の受光領域に照射した入射光はn−I
nGaAs光吸収層14に吸収されて光電流が発生する
。この光電流を測定して照射した光の強度を測定する。
The incident light irradiated onto the light receiving area inside the p-side electrode 22 is n-I.
The light is absorbed by the nGaAs light absorption layer 14 and a photocurrent is generated. This photocurrent is measured to determine the intensity of the irradiated light.

[発明が解決しようとする課題] しかしながら、従来の半導体受光素子では2mW程度の
光強度までは十分な光パワーリニアリティを有している
が、近年は10mW以上の光強度の測定が要求されてお
り、このような高強度の光に対して満足すべき光パワー
リニアリティが維持できなくなるという問題があった。
[Problem to be solved by the invention] However, although conventional semiconductor photodetectors have sufficient optical power linearity up to a light intensity of about 2 mW, in recent years there has been a demand for measuring light intensities of 10 mW or more. However, there is a problem in that satisfactory optical power linearity cannot be maintained for such high-intensity light.

本発明の目的は、10mW以上の光強度に対しても優れ
た光パワーリニアリティを有する半導体受光素子及び半
導体受光素子用基板を提供することにある。
An object of the present invention is to provide a semiconductor light-receiving device and a substrate for a semiconductor light-receiving device, which have excellent optical power linearity even at a light intensity of 10 mW or more.

[課題を解決するための手段〕 上記目的は、InP半導体基板と、前記InP半導体基
板上に形成されたInGaAs光吸収層と、前記I n
GaAs光吸収層上に形成されたInPキャップ層と、
前記InP−qヤップ層の受光領域に形成された不純物
拡散層とを有する半導体受光素子において、前記InP
4ヤッ1層の厚さが3.5μmから10μmの範囲内で
あることを特徴とする半導体受光素子によって達成され
る。
[Means for Solving the Problems] The above object is to provide an InP semiconductor substrate, an InGaAs light absorption layer formed on the InP semiconductor substrate, and the InP semiconductor substrate.
an InP cap layer formed on the GaAs light absorption layer;
In the semiconductor light receiving element having an impurity diffusion layer formed in the light receiving region of the InP-q YAP layer, the InP
This is achieved by a semiconductor light-receiving element characterized in that the thickness of each layer is within the range of 3.5 μm to 10 μm.

[作用] 本発明によれば、InP4ヤップ層を厚くして抵抗値を
低くしたので10mW以上の光強度に対しても優れた光
パワーリニアリティを維持することができる。
[Function] According to the present invention, since the InP4 YAP layer is made thicker and the resistance value is lowered, excellent optical power linearity can be maintained even with a light intensity of 10 mW or more.

[実施例] 本発明の一実施例による半導体受光素子を第1図を用い
て説明する。第4図に示す従来の半導体受光素子と同一
の構成要素には同一の符号を付して説明を省略又は簡略
にする。
[Example] A semiconductor light receiving element according to an example of the present invention will be described with reference to FIG. Components that are the same as those of the conventional semiconductor light-receiving device shown in FIG. 4 are designated by the same reference numerals, and description thereof will be omitted or simplified.

約200μm厚で不純物濃度4X1018cm3  + のn  −InP基板10上に約1μm厚で不17  
−3   + 鈍物濃度1×10  cm  のn  −InPバッフ
ァ層12が形成されている。このn+−InPバッファ
層1層上2上2μm厚で不純物濃度3×1016  −
3のn−InGaAs光吸収層 m 14が形成されている。n−InGaAs光吸収層14
上には約4μm厚で不純物濃度6X1015cm  ’
のn−InPキャップ層16が形成されている0本実施
例では、n−InPキャップ層16が従来より4μmと
厚く形成されている点に特徴がある。n−InPキャッ
プ層16の約1mmφの受光領域には不純物濃度2X1
018cm−3のp+不純物拡散層18がn−InGa
As光吸収層14に接する深さまで形成されている。
On an n-InP substrate 10 with a thickness of about 200 μm and an impurity concentration of 4×10 18 cm 3 + , an impurity layer with a thickness of about 1 μm is formed.
-3+ An n-InP buffer layer 12 with a blunt concentration of 1×10 cm is formed. This n+-InP buffer layer 1 and layer 2 have a thickness of 2 μm and an impurity concentration of 3×1016 −
3 n-InGaAs light absorption layers m14 are formed. n-InGaAs light absorption layer 14
On top is a layer with a thickness of about 4 μm and an impurity concentration of 6 x 1015 cm.
This embodiment, in which the n-InP cap layer 16 is formed, is characterized in that the n-InP cap layer 16 is formed thicker, at 4 μm, than the conventional one. The impurity concentration is 2×1 in the approximately 1 mm diameter light-receiving region of the n-InP cap layer 16.
The p+ impurity diffusion layer 18 of 018 cm-3 is made of n-InGa.
It is formed to a depth that contacts the As light absorption layer 14.

n−JnP−3(ヤップ層16上にはSiN層20が形
成されている。このSiN層20は中央の受光領域では
約1800人と薄く、受光領域の周囲では約3600人
と厚く形成されている。SiN層20の開口部を介して
p 不純物拡散層18にコンタクトするリング状のTi
−Pt−AuのP側電極22が形成され、n  −In
P基板10の下面には全面にAu−Ge−Niのnfl
ll電極24が形成されている。
n-JnP-3 (A SiN layer 20 is formed on the Yap layer 16. This SiN layer 20 is thin by about 1,800 layers in the central light-receiving area, and thicker by about 3,600 layers around the light-receiving area. A ring-shaped Ti contacts the p-type impurity diffusion layer 18 through the opening of the SiN layer 20.
A P-side electrode 22 of -Pt-Au is formed, and n -In
The bottom surface of the P substrate 10 is covered with Au-Ge-Ni nfl.
A ll electrode 24 is formed.

受光領域に入射した入射光はn−InP:’(ヤッグ層
16を透過してn−1nG、aAs光吸収層14に吸収
され、光強度に比例した光電流が発生する9発生した光
$流はn−InGaAs光吸収層14からpfllll
電極22とn側電極24に流れる。
The incident light incident on the light-receiving region passes through the n-InP:' (Yag layer 16 and is absorbed by the n-1nG, aAs light absorption layer 14, and a photocurrent proportional to the light intensity is generated. pfllll from the n-InGaAs light absorption layer 14
It flows to the electrode 22 and the n-side electrode 24.

このため、n−InGaAs光吸収層14からP(Il
l電極22に至る経路の抵抗Rp、スはn−1nG a
 A s光吸収層14からnflll電極24に至る経
路の抵抗Rnが大きいと、光電流が飽和して光パワーリ
ニアリティが制限を受けることになる。
Therefore, from the n-InGaAs light absorption layer 14, P(Il
The resistance Rp of the path leading to the l electrode 22 is n-1nG a
If the resistance Rn of the path from the As light absorption layer 14 to the nflll electrode 24 is large, the photocurrent will be saturated and the optical power linearity will be limited.

本実施例の場合、n+−InP基板10とn+−InP
バッファ層12の抵抗Rnは約5×10−2Ω以下と小
さいので問題にならないが、DInPキャップ層16の
p 不純物拡散層18の抵抗Rpか大きく問題となる虞
がある。
In the case of this embodiment, the n+-InP substrate 10 and the n+-InP
Although the resistance Rn of the buffer layer 12 is as small as approximately 5×10 −2 Ω or less and is not a problem, the resistance Rp of the p-type impurity diffusion layer 18 of the DInP cap layer 16 may become a major problem.

スポット径300μmの光を受光領域の中心部分に入射
しな場合、n−InPキャップ層16のP+不純物拡散
層18の不純物濃度が2X10’8cm−3であると、
比抵抗は約5X10−2Ωcmとなる。従来のようにn
−InP−1iキャップ16の厚さが1μmであると、
その拡がり抵抗は約100Ωであるが、実施例のように
n−rnPキャップ層16の厚さが4μmあると、その
拡がり抵抗は約25Ωと約1/4になる。
When light with a spot diameter of 300 μm is not incident on the central part of the light receiving area, if the impurity concentration of the P+ impurity diffusion layer 18 of the n-InP cap layer 16 is 2X10'8 cm-3,
The specific resistance is approximately 5×10 −2 Ωcm. As before, n
-If the thickness of the InP-1i cap 16 is 1 μm,
Its spreading resistance is about 100Ω, but if the thickness of the n-rnP cap layer 16 is 4 μm as in the embodiment, the spreading resistance becomes about 25Ω, about 1/4.

本実施例による半導体受光素子の光パワーリニアリティ
を第2図に示す。横軸は光強度[m、 W ]であり、
縦軸は光電流[mA]である。光強度か12mW程度ま
で良好な光パワーリニアリティが維持できていることが
わかる。なお、従来の半導体受光素子の光パワーリニア
リティを比較のため第2図に破線で示す。光強度が3m
W程度で良好な光パワーリニアリティが維持できなくな
っていることかわかる。
FIG. 2 shows the optical power linearity of the semiconductor photodetector according to this example. The horizontal axis is the light intensity [m, W],
The vertical axis is photocurrent [mA]. It can be seen that good optical power linearity can be maintained up to a light intensity of about 12 mW. Incidentally, the optical power linearity of a conventional semiconductor light-receiving element is shown by a broken line in FIG. 2 for comparison. Light intensity is 3m
It can be seen that good optical power linearity cannot be maintained at around W.

本発明の他の実施例による半導体受光素子用基板を第3
図を用いて説明する。
A third embodiment of the semiconductor photodetector substrate according to another embodiment of the present invention
This will be explained using figures.

本実施例による半導体受光素子用基板は、半導体受光素
子を製造するために、n+−InP基板30上に、バッ
ファ層となるn+−InP層32と、光吸収層となるn
−InGaAs層34と、キャップ層となるn−InP
層36を形成した状態の半製品のウェーハである。
In order to manufacture a semiconductor light-receiving element, the substrate for a semiconductor light-receiving element according to this embodiment has an n+-InP layer 32 that becomes a buffer layer and an n+-InP layer 32 that becomes a light absorption layer on an n+-InP substrate 30.
-InGaAs layer 34 and n-InP serving as a cap layer
This is a semi-finished wafer with a layer 36 formed thereon.

すなわち、約200μm厚で不純物濃度4×1018c
m−3のn+−InP基板30上に約117  −3 
  + μm厚で不純物濃度lXl0   cm   のnIn
P層32、約2.μm厚で不純物濃度3X1016cm
−3のn−InGaAs層34、約4μm厚で不純物濃
度6X10   cm   のnInP層36層積6さ
れている。
That is, the impurity concentration is 4×1018c with a thickness of about 200 μm.
About 117 −3 on the m−3 n+-InP substrate 30
nIn with + μm thickness and impurity concentration lXl0 cm
P layer 32, about 2. Impurity concentration 3x1016cm with μm thickness
-3 n-InGaAs layer 34 and an nInP layer 36 having a thickness of about 4 μm and an impurity concentration of 6×10 cm 6 .

この半製品の半導体受光素子用基板に対して、n−In
P層36の受光領域にP+不純物拡散層を形成し、pf
!II電極及びn@電極を形成すれば、第1図に示す半
導体受光素子を実現することができる。
For this semi-finished semiconductor photodetector substrate, n-In
A P+ impurity diffusion layer is formed in the light receiving region of the P layer 36, and pf
! By forming the II electrode and the n@ electrode, the semiconductor light receiving element shown in FIG. 1 can be realized.

本発明は上記実施例に限らず種々の変形が可能である。The present invention is not limited to the above embodiments, and various modifications are possible.

例えば、上記実施例ではn−InPキャップ層の厚さを
4μmとしたが、10mW程度の光強度までの光パワー
リニアリティに対しては4μmより薄い3.5μm程度
でもよい。また、n−InPキャップ層を厚くすれば抵
抗Rpがますます小さくなるが、厚いn−InPキャッ
プ層を製造するのには非常に時間がかかり、また、光吸
収層で発生したキャリアが散乱を受は易くなる。このた
め、現実的な製造時間及び応答特性を考慮すると、n−
InP4ヤップ層の厚さは10μm以下が望ましい。
For example, in the above embodiment, the thickness of the n-InP cap layer is 4 μm, but for optical power linearity up to a light intensity of about 10 mW, the thickness may be about 3.5 μm, which is thinner than 4 μm. Furthermore, if the n-InP cap layer is made thicker, the resistance Rp becomes smaller and smaller, but it takes a very long time to manufacture a thick n-InP cap layer, and carriers generated in the light absorption layer are not easily scattered. Uke becomes easier. Therefore, considering realistic manufacturing time and response characteristics, n-
The thickness of the InP4 YAP layer is preferably 10 μm or less.

[発明の効果] 以上の通り、本発明によれば、InP−3rギャップを
厚くして抵抗値を低くしたので10mW以上の光強度に
対しても優れた光パワーリニアリティを維持することが
できる。
[Effects of the Invention] As described above, according to the present invention, since the InP-3r gap is made thicker and the resistance value is lowered, excellent optical power linearity can be maintained even for a light intensity of 10 mW or more.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による半導体受光素子を示す
断面図、 第2図は本発明の一実施例による半導体受光素子の光パ
ワーリニアリティを示すグラフ、第3図は本発明の他の
実施例による半導体受光素子用基板を示す断面図、 第4図は従来の半導体受光素子を示す断面図である。 図において、 10−n+−InP基板 12・・・n”−InPバッファ層 14−−−n−InGaAs光吸収層 16・・・n−InPキャップ層 18・・・p+不純物拡散層 20・・・SiN層 22・・・p側電極 24・・・n側電極 3O−−−n+−InP基板 32・=n+−InP層 34−n−InGaAs層 36−−−n−InP層
FIG. 1 is a sectional view showing a semiconductor light receiving element according to an embodiment of the present invention, FIG. 2 is a graph showing optical power linearity of a semiconductor light receiving element according to an embodiment of the present invention, and FIG. 3 is a graph showing another embodiment of the present invention. FIG. 4 is a cross-sectional view showing a semiconductor light-receiving element substrate according to an embodiment. FIG. 4 is a cross-sectional view showing a conventional semiconductor light-receiving element. In the figure, 10-n+-InP substrate 12...n''-InP buffer layer 14--n-InGaAs light absorption layer 16...n-InP cap layer 18...p+ impurity diffusion layer 20... SiN layer 22...p-side electrode 24...n-side electrode 3O---n+-InP substrate 32=n+-InP layer 34-n-InGaAs layer 36---n-InP layer

Claims (1)

【特許請求の範囲】 1、InP半導体基板と、前記InP半導体基板上に形
成されたInGaAs光吸収層と、前記InGaAs光
吸収層上に形成されたInPキャップ層と、前記InP
キャップ層の受光領域に形成された不純物拡散層とを有
する半導体受光素子において、 前記InPキャップ層の厚さが3.5μmから10μm
の範囲内であることを特徴とする半導体受光素子。 2、InP半導体基板と、前記InP半導体基板上に形
成されたInGaAs層と、前記InGaAs層上に形
成されたInP層とを有する半導体受光素子用基板にお
いて、 前記InP層の厚さが3.5μmから10μmの範囲内
であることを特徴とする半導体受光素子用基板。
[Claims] 1. An InP semiconductor substrate, an InGaAs light absorption layer formed on the InP semiconductor substrate, an InP cap layer formed on the InGaAs light absorption layer, and the InP
In a semiconductor light-receiving element having an impurity diffusion layer formed in a light-receiving region of a cap layer, the thickness of the InP cap layer is 3.5 μm to 10 μm.
A semiconductor light-receiving element characterized by being within the range of. 2. A substrate for a semiconductor light receiving element having an InP semiconductor substrate, an InGaAs layer formed on the InP semiconductor substrate, and an InP layer formed on the InGaAs layer, in which the thickness of the InP layer is 3.5 μm. 1. A substrate for a semiconductor light-receiving element, characterized in that the thickness is within a range of 10 μm from 1 to 10 μm.
JP2250680A 1990-09-20 1990-09-20 Semiconductor photodetector and substrate for semiconductor photodetector Pending JPH04129278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2250680A JPH04129278A (en) 1990-09-20 1990-09-20 Semiconductor photodetector and substrate for semiconductor photodetector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2250680A JPH04129278A (en) 1990-09-20 1990-09-20 Semiconductor photodetector and substrate for semiconductor photodetector

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JPH04129278A true JPH04129278A (en) 1992-04-30

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013175591A (en) * 2012-02-24 2013-09-05 Mitsubishi Electric Corp Semiconductor light-receiving element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013175591A (en) * 2012-02-24 2013-09-05 Mitsubishi Electric Corp Semiconductor light-receiving element

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