JPH04129276A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To delete steps of thermally diffusing and oxidizing to form a guard ring diffused layer as compared with prior art and to shorten a manufacturing schedule by simultaneously opening a guard ring diffused window and an ion implanting window. CONSTITUTION:After a first oxide film 2A made of SiO2 is formed on an N-type semiconductor substrate 1, the film 2A is selectively removed by etching, and a guard ring diffused window 5A and an ion implanted window 5B are simultaneously opened. Then, after the substrate is thermally oxidized to form a second oxide film 2B, with the film 2A as a mask phosphorus ions are implanted as those for exhibiting N-type into the substrate to form a first ion-implanted layer 6 and a guard ring diffused layer 3. Then, it is heat treated at a high temperature to press-diffuse and anneal the layers 6 and 3. Thus, since the impurity ions for exhibiting N-type are implanted after the windows 5A, 5B are simultaneously opened to simultaneously form the diffused layers, steps can be simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a variable capacitance diode.

[Conventional technology]

A conventional method for manufacturing a variable capacitance diode will be explained with reference to FIG.

First, as shown in FIG. 3(a), a first oxide film 4A is formed on an N-type semiconductor substrate 1, and then the first oxide film 4A is selectively etched away by photolithography to form a guard ring diffusion window. Drill a hole of 5A.

Next, as shown in FIG. 3(b), phosphorus is ion-implanted as an N-type impurity into the surface of the semiconductor substrate using the first oxide film 4A as a diffusion mask to form a guard ring diffusion layer 3.
The semiconductor substrate is thermally oxidized to form a second oxide film 4B over the entire surface.

Next, the second and first oxide films 4B and 4A are selectively etched and removed sequentially by photolithography to form a first ion implantation window 5B. The first and second oxide films 4A of order 0 are formed to have a thickness of 30 OA.

Using 4B as a mask, phosphorus is ion-implanted as an N-type impurity into the semiconductor substrate surface from above to form the first ion-implanted layer 6. After that, the first ion-implanted layer 6 is forcedly diffused and annealed by high-temperature heat treatment. implement.

Next, as shown in FIG. 3(c), a large amount of boron is ion-implanted as a P-type impurity into the semiconductor substrate surface from the top again to form a second ion-implanted layer 7, and then high-temperature heat treatment is performed. As a result, intrusion diffusion and annealing of the second ion-implanted layer 7 are performed.

Next, as shown in Figure 3(d), a third
After forming a contact window on the second ion implantation layer 7 by selectively etching and removing the oxide film 4C,
The surface of the semiconductor substrate is coated and protected with a nitride film 8 by a normal vapor phase growth method.

Next, only the nitride film on the contact window is etched away by photolithography, and then aluminum is deposited on the entire surface.

Next, the anode electrode 9 is formed by etching away the aluminum except on the contact window by photolithography.

[Problems to be Solved by the Invention] In the above-mentioned conventional variable capacitance diode manufacturing method, the first problem is as follows. Even though the same impurity (phosphorus) was used to form the second ion implantation layer and the guard ring diffusion layer, they were formed in separate steps.
The manufacturing schedule is long, the process is complicated, and as a result, the reliability and yield of the semiconductor device are degraded.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes a step of forming a first insulating film on a first conductivity type semiconductor substrate and then selectively etching it to simultaneously open a guard ring diffusion window and a first ion implantation window. , a step of forming a thin second insulating film on the entire surface including the window, and ion implantation of a first conductivity type impurity through this second insulating film to simultaneously form a guard ring diffusion layer and a first ion implantation layer. and a step of performing forced diffusion and annealing of the guard ring diffusion layer and the first ion-implanted layer by high-temperature heat treatment.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a cross-sectional view of a semiconductor chip shown in the order of steps for explaining a first embodiment in which the present invention is applied to a variable capacitance diode.

First, as shown in Figure 1(a), as in the conventional manufacturing method, N
After forming a first oxide film 2A made of S i 02 or the like on the type semiconductor substrate 1, the first oxide film 2A is selectively etched and removed by ordinary photolithography to form a guard ring diffusion window 5A. and the ion implantation window 5B are opened at the same time.

Next, as shown in FIG. 1(b), the semiconductor substrate is thermally oxidized to form a second oxide film. After forming B to a thickness of 30 OA, phosphorus is ion-implanted as an N-type impurity into the surface of the semiconductor substrate using the first oxide film 2A as a mask, thereby forming the first ion-implanted layer 6 and the guard ring diffusion layer 3. The first ion implantation layer 6 and the guard ring diffusion layer 3 are subjected to indentation diffusion and annealing by performing zero-order high-temperature heat treatment.

Next, as shown in FIG. 1C, boron is ion-implanted as a P-type impurity from the top surface again to form a second ion-implanted layer 7, and then a second ion-implanted layer 9 is formed by high-temperature heat treatment. Perform indentation diffusion and annealing.

Next, as shown in FIG. 1(d), the second oxide film 2B is selectively etched away by photolithography to form a contact window, and then the surface of the semiconductor substrate is formed by vapor deposition. After removing only the nitride film 8 on the contact window by etching by zero-order photolithography, which is protected by the nitride film 8, aluminum is deposited on the entire surface. Thereafter, the aluminum except on the contact window is etched away by photolithography to form an anode electrode 9 to complete the variable capacitance diode.

In this way, in the first embodiment, the guard ring diffusion window 5A
After simultaneous opening of the ion implantation window 5B and the ion implantation window 5B, a diffusion layer can be formed at the same time by ion implanting an N-type impurity into the semiconductor surface. As a result, the manufacturing schedule of the semiconductor device can be shortened and the manufacturing process can be shortened. It becomes possible to simplify the process. On the other hand, in the first embodiment, since the P-type impurity is ion-implanted into the guard ring diffusion layer, there is a concern that the channel prevention function will deteriorate. Diffusion depth of type impurities is approximately 1 μm
Since it is shallow, there is no problem at all.

FIG. 2 is a cross-sectional view of a semiconductor chip shown in order of steps for explaining a second embodiment of the present invention.

First, as shown in FIG. 2(a), similarly to the first embodiment, a first oxide film 2A is formed on an N-type semiconductor substrate 1, and then two first oxide films are formed by photolithography. The guard ring diffusion window 5A and the ion implantation window 5B are simultaneously opened by selectively etching and removing.

Next, as shown in FIG. 2(b), the semiconductor substrate is thermally oxidized to form a second oxide film 2B with a thickness of 300A, and then the first oxide film 2A is used as a mask to form a second oxide film 2B on the surface of the semiconductor substrate. Phosphorus is ion-implanted to form the first ion-implanted layer 6 and guard ring diffusion layer 3. Second, high-temperature heat treatment is performed to perform forced diffusion and annealing of the first ion-implanted layer 6 and guard ring diffusion layer 3. do.

Next, as shown in FIG. 2(c), after the thin second oxide film 2B on the guard ring diffusion window 5A is covered and protected with a photoresist 10 by photolithography, boron is added as a P-type impurity from the top surface. A second ion-implanted layer 7 is formed by ion-implanting. Thereafter, the second ion-implanted layer 7 is subjected to intrusion diffusion and annealing by high-temperature heat treatment.

Next, as shown in FIG. 2(d), a contact window is formed by selectively etching away the second oxide film 2B by photolithography, and then the surface of the semiconductor substrate is nitrided by vapor phase growth. It is covered and protected by a film layer 8. Next, only the M8 nitride on the contact window is etched away by photolithography, and then aluminum is deposited on the entire surface. Thereafter, the aluminum except on the contact window is etched away by photolithography to form an anode electrode 9, thereby completing the variable capacitance diode.

As explained above, in the embodiment of the wooden tablet 2, it is possible to obtain the same effect as in the first embodiment, and also by preventing ion implantation of P-type impurity into the guard ring diffusion layer 3. For example, even when the diffusion depth of N-type impurities of 1.0 μm and the diffusion depth of P-type impurities of 0.8 μm are close to each other, there is an advantage that the channel prevention function can be maintained.

〔Effect of the invention〕

As explained above, the present invention eliminates the thermal diffusion and thermal oxidation steps for forming the guard ring diffusion layer compared to conventional manufacturing methods by simultaneously opening the guard ring diffusion window and the ion implantation window. Since the manufacturing schedule can be shortened, the reliability and yield of semiconductor devices can be improved.

[Brief explanation of the drawing]

1 and 2 are cross-sectional views of a semiconductor chip for explaining the first and second embodiments of the present invention, and FIG. 3 is a cross-sectional view of a semiconductor chip for explaining a conventional method of manufacturing a semiconductor device. It is a diagram. DESCRIPTION OF SYMBOLS 1... N-type semiconductor substrate, 2A... 1st oxide film, 2
B... second oxide film, 3... guard ring diffusion layer,
4A...first oxide film, 4B...second oxide film, 4
C... Third oxide film, 5A... Guard ring diffusion window, 5B... Ion implantation window, 6... First ion implantation layer, 7... Second ion implantation layer, 8 ...Nitride film, 9
... Anode electrode, 10... Photoresist.

Claims (1)

[Claims] A step of forming a first insulating film on a first conductivity type semiconductor substrate and selectively etching it to simultaneously open a guard ring diffusion window and a first ion implantation window, and a step of forming a thin second insulating film on the entire surface including the window. a step of forming an insulating film, a step of ion-implanting a first conductivity type impurity through this second insulating film to simultaneously form a guard ring diffusion layer and a first ion implantation layer, and a step of forming a guard ring by high-temperature heat treatment. Diffusion layer and first
1. A method for manufacturing a semiconductor device, comprising the steps of: performing intrusion diffusion and annealing of an ion-implanted layer.