JPH0411774A - Solid state image sensor - Google Patents

Solid state image sensor

Info

Publication number
JPH0411774A
JPH0411774A JP2112265A JP11226590A JPH0411774A JP H0411774 A JPH0411774 A JP H0411774A JP 2112265 A JP2112265 A JP 2112265A JP 11226590 A JP11226590 A JP 11226590A JP H0411774 A JPH0411774 A JP H0411774A
Authority
JP
Japan
Prior art keywords
light receiving
groove
photodetector
receiving section
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2112265A
Other languages
Japanese (ja)
Inventor
Takeshi Ando
安藤 岳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2112265A priority Critical patent/JPH0411774A/en
Publication of JPH0411774A publication Critical patent/JPH0411774A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To prevent generation of a false signal by forming a groove buried with an insulator for isolating a photodetector from a vertical transfer path, and reading charge by a thin film transistor formed on the groove. CONSTITUTION:A photodetector 3 and a vertical transfer unit 4 are formed by selectively introducing an n-type impurity to a p-type well 2, surrounded by a groove 5 buried with an insulator 6 therein to be formed deeper, and electrically isolated. Here, photo-excited charge stored in the photodetector 3 in response to the incident light amount is read by a transfer gate electrode 10, a pulse is applied to conduct a thin film transistor to be read to a transfer path 4, and transferred therein. Since the photodetector 3 and the path 4 are isolated by the groove 5. The photo-excited charge generated at the outer region of a depleted layer formed at the lower part of the photodetector 3 is not fed to the path 4. Thus, a smearing, i.e., a false signal can be prevented.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は固体撮像素子に関し、特に、受光部において蓄
積された信号電荷を電荷転送装置(CCD〉によって転
送する固体撮像素子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state image sensor, and particularly to a solid-state image sensor that transfers signal charges accumulated in a light receiving section using a charge transfer device (CCD).

「従来の技術a 従来めCCD固体撮像素子についてインターライン転送
方式のものを例にあげて説明する。第3図は、従来の固
体撮像素子の垂直転送路に垂直な断面の構造を示す図で
ある。同図において、1はn型シリコン基板、2はn型
シリコン基板1内に形成されたp型ウェル、3.4はそ
れぞれp型ウェル2の表面に選択的にn型不純物を導入
することによって形成された受光部と垂直転送路、9は
ケート絶縁膜、10は多結晶シリコンにより形成された
転送ゲート電極、11は眉間絶縁膜、12は受光部3の
直上に開口部を有するアルミニウムの遮光膜、14は受
光部3と垂直転送路4の外側にn型不純物を高濃度に導
入することによって形成されたチャネルストッパ領域で
ある。
``Conventional technology a'' A conventional CCD solid-state image sensor will be explained using an interline transfer method as an example. Fig. 3 is a diagram showing the structure of a conventional solid-state image sensor in a cross section perpendicular to the vertical transfer path. In the same figure, 1 is an n-type silicon substrate, 2 is a p-type well formed in the n-type silicon substrate 1, and 3.4 is a structure in which n-type impurities are selectively introduced into the surface of the p-type well 2. 9 is a gate insulating film, 10 is a transfer gate electrode formed of polycrystalline silicon, 11 is an insulating film between the eyebrows, and 12 is an aluminum film having an opening directly above the light receiving part 3. The light shielding film 14 is a channel stopper region formed by introducing n-type impurities at a high concentration outside the light receiving section 3 and the vertical transfer path 4.

この従来例の固体撮像素子において、入射光量に応じて
受光部3に蓄積された光励起電荷は、転送ゲート電極1
0に電圧を印加し、受光部3と垂直転送路4の間のp型
領域の表面に反転層を形成することにより、垂直転送路
4へ読み出され、然る後に、垂直転送路4の中を図示し
ない水平転送路へ向けて転送される。
In this conventional solid-state image sensor, photoexcited charges accumulated in the light receiving section 3 according to the amount of incident light are transferred to the transfer gate electrode 1.
By applying a voltage to 0 and forming an inversion layer on the surface of the p-type region between the light receiving section 3 and the vertical transfer path 4, the data is read out to the vertical transfer path 4. The inside is transferred toward a horizontal transfer path (not shown).

[発明が解決しようとする課題] 上述した従来の半導体装置では、入射光量が強くなると
、受光部の周囲に形成された空乏層の外側の領域におい
ても光励起電荷が発生し、これが拡散によって直接垂直
転送路に流れ込む。そのため、垂直転送動作°中に同一
の垂直転送路を用いる他の画素からの信号電荷にこの拡
散電荷が加わってスミアと呼ばれる偽信号を発生させる
[Problems to be Solved by the Invention] In the conventional semiconductor device described above, when the amount of incident light increases, photoexcited charges are generated also in the region outside the depletion layer formed around the light receiving part, and these charges are directly vertically transferred by diffusion. Flows into the transfer path. Therefore, during a vertical transfer operation, this diffused charge is added to signal charges from other pixels using the same vertical transfer path, generating a false signal called smear.

[課題を解決するための手段] 本発明の固体撮像素子は、第1導電型の半導体領域と、
前記半導体領域の表面領域内に設けられた第2導電型の
複数の受光部と、前記受光部から前記半導体基板に形成
された溝により分離されて前記半導体基板の表面領域内
に設けられた、前記受光部に蓄積された電荷を転送する
ための電荷転送領域と、前記溝内に埋設された絶縁膜と
、前記絶縁膜上に延在し、少なくともその一部分が第1
導電型になされた、前記受光部と前記電荷転送領域とを
接続する第2導電型の半導体薄膜と、前記半導体薄膜上
に形成された、該半導体薄膜め導電性をコントロールす
るゲート電極とを具備するものである。
[Means for Solving the Problems] A solid-state imaging device of the present invention includes a semiconductor region of a first conductivity type,
a plurality of light receiving portions of a second conductivity type provided within the surface region of the semiconductor region; and a plurality of light receiving portions provided within the surface region of the semiconductor substrate separated from the light receiving portions by a groove formed in the semiconductor substrate. a charge transfer region for transferring charges accumulated in the light receiving section; an insulating film embedded in the groove; and a charge transfer region extending over the insulating film, at least a portion of which
A semiconductor thin film of a second conductivity type that connects the light receiving section and the charge transfer region, and a gate electrode formed on the semiconductor thin film to control the conductivity of the semiconductor thin film. It is something to do.

[実施例1 次に、本発明の実施例について、図面を参照して説明す
る。
[Example 1 Next, an example of the present invention will be described with reference to the drawings.

第1図は、インターライン転送方式に関する実施例の垂
直転送路に垂直な断面の構造を示した図である。同図に
おいて、1はn型シリコン基板、2はn型シリコン基板
1内に形成されたp型ウェル、3.4はそれぞれp型ウ
ェル2の表面に選択的にn型不純物を導入することによ
って形成された受光部と垂直転送路であり、各受光部3
および垂直転送l?84は、受光部3および垂直転送路
4より十分深く形成され、その内部を絶縁膜6によって
埋設された溝5によって囲まれており、互いに電気的に
分離されている。7は前記絶縁膜6が埋設された溝5の
上に選択的に形成さたp型多結晶シリコン膜、8a、8
bはp型多結晶シリコン膜7の両端に選択的に不純物を
導入することによって形成されたn型多結晶シリコン膜
てあり、n型多結晶シリコン膜8aは受光部3に、n型
多結晶シリコン膜8bは垂直転送路4にそれぞれその一
部分が接触している。また、9はゲート絶縁膜、10は
多結晶シリコンからなる転送ゲート電極であって、p型
多結晶シリコン膜7、n型多結晶シリコン膜8a、8b
、ゲート絶縁膜9および転送ゲート電極10によって薄
膜トランジスタが構成されている。11は眉間絶縁膜、
12は受光部3の直上に開口部を有するアルミニウムの
遮光膜である。
FIG. 1 is a diagram showing the structure of a cross section perpendicular to a vertical transfer path of an embodiment related to an interline transfer method. In the figure, 1 is an n-type silicon substrate, 2 is a p-type well formed in the n-type silicon substrate 1, and 3.4 is a p-type well formed by selectively introducing n-type impurities into the surface of the p-type well 2. The formed light receiving section and vertical transfer path, each light receiving section 3
and vertical transfer l? 84 is formed sufficiently deeper than the light receiving section 3 and the vertical transfer path 4, and is surrounded by the groove 5 buried in the insulating film 6, and is electrically isolated from each other. 7 is a p-type polycrystalline silicon film selectively formed on the trench 5 in which the insulating film 6 is buried; 8a, 8;
b is an n-type polycrystalline silicon film formed by selectively introducing impurities into both ends of the p-type polycrystalline silicon film 7; Parts of the silicon films 8b are in contact with the vertical transfer paths 4, respectively. Further, 9 is a gate insulating film, and 10 is a transfer gate electrode made of polycrystalline silicon, including a p-type polycrystalline silicon film 7, n-type polycrystalline silicon films 8a and 8b.
, the gate insulating film 9 and the transfer gate electrode 10 constitute a thin film transistor. 11 is the glabella insulating film,
Reference numeral 12 denotes an aluminum light-shielding film having an opening directly above the light-receiving section 3 .

本実施例の撮像素子において、入射光量に応じて受光部
3内に蓄積されている光励起電荷を、転送ゲート電極1
0に高電圧の読み出しパルスを印加して薄膜トランジス
タを導通させることにより垂直転送路4へ読み出し、該
垂直転送路4の中を転送する。
In the image sensor of this embodiment, the photo-excited charges accumulated in the light receiving section 3 are transferred to the transfer gate electrode 1 according to the amount of incident light.
By applying a high voltage read pulse to 0 and making the thin film transistor conductive, data is read out to the vertical transfer path 4 and transferred within the vertical transfer path 4.

−のように、受光部3と垂直転送路4とは互いに絶縁膜
6か埋設された講5によって分離されているため、受光
部の下部に形成された空乏層の外側領域で発生した光励
起電荷が拡散によって直接垂直転送路へ流れ込むことは
なくなり、スミアリンクは完全に防止される。
- As shown in the figure, since the light receiving section 3 and the vertical transfer path 4 are separated from each other by the insulating film 6 or the buried layer 5, photo-excited charges generated in the outer region of the depletion layer formed at the bottom of the light receiving section will no longer flow directly into the vertical transfer path due to diffusion, and smear linking will be completely prevented.

第2図は、本発明の他の実施例を示す断面図である。本
実施例は、絶縁膜6が埋設された講5の周囲に高濃度の
p型領域13を設けた意思外は先の実施例と同し構造と
なっている。
FIG. 2 is a sectional view showing another embodiment of the invention. This embodiment has the same structure as the previous embodiment except that a highly concentrated p-type region 13 is provided around the groove 5 in which the insulating film 6 is buried.

先の実施例においては、受光部3および垂直転送路4を
絶縁膜6か埋設された溝5て直接分離しているため、受
光部3および垂直転送路4と絶縁膜6との接触面には界
面準位が形成されるが、これらの界面準位を介して熱励
起電荷が発生すると暗電流か増大することになる。しか
し、本実施例ては絶縁膜が埋設された講5の周囲に高濃
度のp型領域13を設け、この領域の電位をp型ウェル
と同電位に固定しているため、界面準位は常に正孔で満
たされる。したがって、これらの界面準位を介しての熱
励起電荷の発生を防ぐことができ、暗電流の増大を防止
することができる。
In the previous embodiment, since the light receiving section 3 and the vertical transfer path 4 are directly separated by the insulating film 6 or the buried trench 5, the contact surface between the light receiving section 3 and the vertical transfer path 4 and the insulating film 6 is interface states are formed, but if thermally excited charges are generated via these interface states, the dark current will increase. However, in this embodiment, a highly concentrated p-type region 13 is provided around the well 5 in which the insulating film is buried, and the potential of this region is fixed to the same potential as that of the p-type well, so that the interface level is Always filled with holes. Therefore, generation of thermally excited charges via these interface states can be prevented, and an increase in dark current can be prevented.

以上、エリア型の固体撮像素子について説明したが、本
発明はこれに限定されるものではなく、リニア型のもの
についても同様に適用しうるものである。また、電荷転
送装置は、埋め込みチャネル型のものに替えて表面チャ
ネル型のものとすることができる。また、実施例におい
ては受光部とうしの分離にも絶縁物を埋設した溝を用い
ていたが、この部分は従来例と同様に高濃度p型拡散領
域とすることができる。
Although the area-type solid-state imaging device has been described above, the present invention is not limited thereto, and can be similarly applied to a linear-type device. Further, the charge transfer device can be of a surface channel type instead of a buried channel type. Further, in the embodiment, a groove filled with an insulator was used to separate the light receiving part from the cowl, but this part can be made into a high concentration p-type diffusion region as in the conventional example.

[発明の効果] 以上説明したように、本発明は、第1導電型半導体領域
に設けた第2導電型の受光部と、受光部に蓄積された電
荷を転送するなめに受光部と近接して前記第1導電型半
導体領域に設けた第2導電型の垂直転送路を有する半導
体装置において、前記受光部と前記垂直転送路とを分離
するために絶縁膜か埋設された溝を設け、前記受光部か
ら前記垂直転送路へ電荷を読み出すために前記溝上に薄
膜トランジスタを設けたものであるので、本発明によれ
ば、受光部の下部に形成された空乏層の外側の領域で発
生した光励起電荷が拡散によって直接垂直転送路に流れ
込むことはなくなり、スミアの発生を完全に防止するこ
とができる。
[Effects of the Invention] As explained above, the present invention provides a light receiving section of the second conductivity type provided in the semiconductor region of the first conductivity type, and a light receiving section provided in the semiconductor region of the first conductivity type, which is located close to the light receiving section in order to transfer the charges accumulated in the light receiving section. In the semiconductor device having a vertical transfer path of a second conductivity type provided in the semiconductor region of the first conductivity type, a groove buried with an insulating film is provided to separate the light receiving part and the vertical transfer path, Since a thin film transistor is provided on the trench in order to read charges from the light receiving section to the vertical transfer path, according to the present invention, the photo-excited charges generated in the region outside the depletion layer formed at the bottom of the light receiving section will no longer flow directly into the vertical transfer path due to diffusion, making it possible to completely prevent the occurrence of smear.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図は、それぞれ本発明の実施例を示す断面
図、第3図は、従来例の断面図である。 1・・n型シリコン基板、  2・・・p型ウェル、3
・・・受光部、  4・・・垂直転送路、  5・・・
溝、6・・絶縁膜、  7・・・p型多結晶シリコン膜
、8a、8b・・n型多結晶シリコン膜、  9・・・
ゲート絶縁膜、   10・・・転送ゲート電極、  
11・・層間絶縁膜、  12・・・遮光膜、  13
・・・高濃度のρ型領域、   14・・・チャネルス
トッパ領域。
FIGS. 1 and 2 are cross-sectional views showing embodiments of the present invention, and FIG. 3 is a cross-sectional view of a conventional example. 1...n-type silicon substrate, 2...p-type well, 3
... Light receiving section, 4... Vertical transfer path, 5...
Groove, 6... Insulating film, 7... P-type polycrystalline silicon film, 8a, 8b... N-type polycrystalline silicon film, 9...
Gate insulating film, 10... Transfer gate electrode,
11... Interlayer insulating film, 12... Light shielding film, 13
...high concentration ρ type region, 14...channel stopper region.

Claims (1)

【特許請求の範囲】[Claims]  第1導電型の半導体領域と、前記半導体領域の表面領
域内に設けられた第2導電型の複数の受光部と、前記受
光部から前記半導体基板に形成された溝により分離され
て前記半導体基板の表面領域内に設けられた、前記受光
部に蓄積された電荷を転送するための電荷転送領域と、
前記溝内に埋設された絶縁膜と、前記絶縁膜上に延在し
、少なくともその一部分が第1導電型になされた、前記
受光部と前記電荷転送領域を接続する第2導電型の半導
体薄膜と、前記半導体薄膜上に形成された、該半導体薄
膜の導電性をコントロールするゲート電極と、を具備す
る固体撮像素子。
a semiconductor region of a first conductivity type; a plurality of light receiving sections of a second conductivity type provided in a surface region of the semiconductor region; and a semiconductor substrate separated from the light receiving section by a groove formed in the semiconductor substrate. a charge transfer region provided in a surface region of the light receiving section for transferring charges accumulated in the light receiving section;
an insulating film buried in the groove; and a semiconductor thin film of a second conductivity type extending over the insulating film, at least a portion of which is of the first conductivity type, connecting the light receiving section and the charge transfer region. and a gate electrode formed on the semiconductor thin film to control conductivity of the semiconductor thin film.
JP2112265A 1990-04-28 1990-04-28 Solid state image sensor Pending JPH0411774A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2112265A JPH0411774A (en) 1990-04-28 1990-04-28 Solid state image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2112265A JPH0411774A (en) 1990-04-28 1990-04-28 Solid state image sensor

Publications (1)

Publication Number Publication Date
JPH0411774A true JPH0411774A (en) 1992-01-16

Family

ID=14582377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2112265A Pending JPH0411774A (en) 1990-04-28 1990-04-28 Solid state image sensor

Country Status (1)

Country Link
JP (1) JPH0411774A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5416346A (en) * 1993-02-25 1995-05-16 Sharp Kabushiki Kaisha Charge transferring device having an FDA type charge detecting section and a method for producing the same
JP2002057319A (en) * 2000-08-07 2002-02-22 Sony Corp Solid-state image sensing element
US6384436B1 (en) 1998-12-04 2002-05-07 Nec Corporation Photoelectric transducer and solid-state image sensing device using the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5416346A (en) * 1993-02-25 1995-05-16 Sharp Kabushiki Kaisha Charge transferring device having an FDA type charge detecting section and a method for producing the same
US6384436B1 (en) 1998-12-04 2002-05-07 Nec Corporation Photoelectric transducer and solid-state image sensing device using the same
JP2002057319A (en) * 2000-08-07 2002-02-22 Sony Corp Solid-state image sensing element

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