JPH04117707A - Semiconductor device - Google Patents

Abstract

PURPOSE:To change the oscillating characteristic by providing plural inverter circuits each having a data input terminal and a control terminal able to bring an output to a high impedance state and having different drive capability and providing a decoder circuit to the device and selecting an inverter optionally among the oscillation inverters. CONSTITUTION:A data input terminal of each of inverters 1, 2,... m with different drive capability is connected in common to a terminal 11 and a control terminal is connected to an output terminal of a decoder circuit 4 independently. Moreover, output terminals of the inverters 1, 2,... m are connected in common to a terminal 10. When the decoder circuit 4 selects a output terminal 4n (n is a natural number, 1<=n<=m) among the output terminals 41-4m, an inverter (n) is selected among the inverters 1, 2,... m and the output of the remaining inverters reaches a high.impedance. Then the oscillation inverter of the oscillation circuit realized already on the chip is optionally selected and plural oscillation characteristics are realized in the operating period.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an oscillation inverter circuit in a complementary MO5 (hereinafter abbreviated as CMO3).

[Conventional technology] A CMO5 oscillation inverter circuit in the conventional technology has 1
[Problems to be solved by the invention] ] However, once the conventional CMO5 oscillation inverter is implemented on a chip, the characteristics of the FET cannot be changed.
The characteristics of the oscillator circuit were constant.

Therefore, it is possible to realize multiple oscillation characteristics, such as realizing an oscillation characteristic that reduces oscillation power consumption in standby mode compared to normal operation, or realizing an oscillation that shortens the oscillation start time only when oscillation starts. However, it was difficult to change the oscillation characteristics during operation. Additionally, it was difficult to deal with changes in oscillation specifications after the chip was manufactured.

The present invention is intended to solve the problems of the prior art, and its purpose is to select one or more than one oscillation inverter from among a plurality of oscillation inverters with different characteristics, so that the It is an object of the present invention to provide an oscillation inverter circuit whose oscillation characteristics can be arbitrarily changed even after the oscillation inverter circuit is realized.

Means for Solving Problem 1 The semiconductor device of the present invention has the following features: (1) In a semiconductor integrated circuit using an insulated gate field effect transistor, it is possible to put a data input terminal and an output in a high impedance state. multiple control terminals,
and has an inverter circuit and a decoder circuit each having a different driving capacity, the data input terminals of the plurality of invercooling circuits are commonly connected, and the control terminals of the plurality of invercooling circuits are independently connected to the decoder circuit. Embodiment FIG. 1 is a circuit diagram showing an embodiment of the semiconductor device of the present invention.

In FIG. 1, inverters 1.2. ...m (m is a natural number) are inverters having different driving capacities. Inverter 1.2,...m data input terminal C1,
C2, . . . cm are commonly connected to the terminal 11, and control terminals d1, d2, . . . dm are each independently connected to output terminals 41, 42, . Also, the inverter], 2.・m output terminals 01.02. . . . Om are connected in common and connected to the terminal 10.

The decoder circuit 4 has four of its output terminals 41 to 4m.
When one inverter n (n is a natural number, lsn≦m) is selected, inverter n is selected from among inverters 1 to m, and the outputs of the remaining inverters become in a high impedance state. Therefore, terminal 11, data input terminal dn of inverter n, inverter n, and output terminal of inverter n on.

and the terminal 10 constitute an inverter circuit in which the input terminal is the terminal 10 and the output terminal is the terminal 11.

The driving ability of this inverter circuit can be arbitrarily changed by changing the values of m and n.

Also, if you select multiple inverters, 1~m
By combining these inverters, it is possible to realize an inverter circuit with even finer differences in drive capability.

FIG. 2 is a circuit diagram showing an example in which the present invention is applied to a crystal oscillation circuit. (To simplify the explanation, m=2.) It is assumed that the inverter 21 has a larger driving capacity than the inverter 22. At this time, when the oscillation starts, the inverter 21
Also, if the decoder 23 is operated so as to select the inverter 22 for normal operation, the oscillation start time will be faster.
Furthermore, an oscillation circuit with low oscillation power consumption can be realized.

FIG. 3 is a circuit diagram showing an example in which a plurality of invercool circuits of the present invention are applied to a CR oscillation circuit. (For simplicity of explanation, m=2.) It is also possible to realize more complex characteristics by using a plurality of inverter circuits of the present invention as shown in FIG.

[Effects of the Invention] In the oscillation circuit using the inverter of the present invention, the oscillation inverter of the oscillation circuit already implemented on the chip can be arbitrarily selected, so it can meet the need to realize multiple oscillation characteristics during the operating period. For example, compared to the original operation, it is possible to reduce the oscillation power consumption in the standby state. Also 2
Compared to normal operation, when starting oscillation, it is possible to advance the oscillation start time or to reduce the one oscillation start/stop voltage.

Further, it has the advantage that maintenance such as dealing with later changes in oscillation specifications and adjustment of oscillation conditions is possible.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment.8 FIG. 2 is a circuit diagram showing an example in which the present invention is applied to a crystal oscillation circuit. FIG. 3 is a circuit diagram showing an example in which the present invention is applied to CR oscillation. 1, 2, m, 21. 22 C], c 2, d 1, d 2, o 1, o 2. 4. 23 ・ m dm ・ ・Inverter/inverter 1.2, m's control terminal/inverter 1.2, m's data input terminal/inverter], 2, m's output terminal/decoder circuit 41. 42. 4 m - Output terminal of decoder 4 Input terminal of the inverter circuit of the present invention - Output terminal of the inverter circuit of the present invention or higher

Claims (1)

[Claims] (1) Insulated gate field effect transistor (hereinafter MO
It is abbreviated as SFET. ) in a semiconductor integrated circuit using a plurality of inverter circuits each having a data input terminal and a control terminal capable of putting the output in a high impedance state, each having a different driving capacity, and a decoder circuit. , the data input terminals of the plurality of inverter circuits are commonly connected, the control terminals of the plurality of inverter circuits are each independently connected to the decoder circuit, and the data input terminals of the plurality of inverter circuits are connected to each other independently. A semiconductor device characterized in that output terminals are commonly connected.