JPH0411738A - Bipolar transistor - Google Patents

Abstract

PURPOSE:To form a stable emitter electrode without increasing an emitter resistance even when an emitter area is made fine by a method wherein a silicon carbide film and a polycrystalline silicon film are formed only on the bottom face inside an opening formed in an insulating film. CONSTITUTION:When individual layers are formed on a P-type silicon substrate 1, a silicon carbide film 12 is formed only on the surface of an epitaxial layer 3 inside an opening part surrounded by a sidewall insulating film 11 and a polycrystalline silicon film 13 is formed only on the film 12. The film 12 and the film 13 which are formed on an emitter region 14 are buried and installed inside the opening surrounded by the film 11 on a base region 10, and are not formed substantially on the side and the surface of the film 11. As a result, the film thickness of the film 13 and the film 12 which are arranged between an upper-part aluminum electrode 15 and the region 14 becomes uniform, and arsenic atoms which are implanted into the individual films are distributed uniformly. Thereby, it is possible to avoid that an emitter resistance is increased and to make the film 13 for emitter electrode fine. Even when an emitter area is made fine, the emitter resistance is not increased and a stable emitter electrode can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bipolar transistor using a silicon carbide film as an emitter.

[Prior Art] In a conventional bipolar transistor, as shown in FIG. 4, a buried collector layer 2 is selectively formed in a P-type silicon substrate 1, and the collector layer 2 is buried in the substrate. An epitaxial growth layer 3 is formed on top of the epitaxial layer 1 . The epitaxial growth layer 3 is isolated by a thick silicon oxide film 4 that reaches the buried collector layer 2. A base region 20 doped with boron atoms is formed in the center of the element formation region on the surface of this epitaxial growth layer 3, and a pair of compensation base regions 9 are further formed to sandwich this base region 20. Further, a P-type polycrystalline silicon film 7 serving as a base extraction region is patterned on the surface of the substrate consisting of the silicon substrate 1 and the epitaxially grown layer 3 so as to be in contact with the compensation base region 9. This P-type polycrystalline silicon film 7 is covered with an insulating film 8. The portions of the insulating film 8 and the P-type polycrystalline silicon film 7 above the base region 20 are selectively removed, and the insulating film 11 is provided on the sidewall of the opening thus formed. There is. A laminated body of a silicon carbide film 22 and a polycrystalline silicon film 23 doped with N-type impurity atoms for an emitter, and an aluminum electrode 15 is embedded in the opening surrounded by this sidewall insulating film 11.

The epitaxial growth layer 3 is in the other element formation region.
A collector lead-out layer 6 is formed on the surface of the substrate, and an N-type polycrystalline silicon film 5 in contact with the collector lead-out layer 6 is patterned on the substrate. This N-type polycrystalline silicon film 5 is connected to an aluminum electrode 15 embedded in a contact hole provided in the insulating film 8.

In this way, in the conventional bipolar transistor, the silicon carbide film 22 and polycrystalline silicon film 23 forming the emitter are formed not only on the base region 20 but also on the side and top surfaces of the sidewall insulating film 11. ing. This silicon carbide film 22 has a band gap of 2.3 eV,
It has a wider bandgap than Si and is useful as a wide-node-gap hetero bipolar transistor with high hre.

[Problems to be Solved by the Invention] However, in this conventional bipolar transistor, N-type impurity atoms are ion-implanted into the silicon carbide film 22 and polycrystalline silicon film 23 for the emitter. After that, N-type impurity atoms are added by heat treatment and diffusion into the silicon carbide film 22, so that the portions deposited on the side surfaces of the sidewall insulating film 11, the bottom of the opening, and the insulating film 11 are The degree of diffusion of ion-implanted impurity atoms differs depending on the portion deposited on the upper surface.

That is, as schematically shown in FIG. 5, the amount of impurity atoms introduced into the polycrystalline silicon M23 and silicon carbide film 22 deposited on the side surface of the insulating film 11 is such that the amount of impurity atoms introduced into the upper surface of the insulating film 11 and the bottom of the opening is Deposited polycrystalline silicon film 2
3 and the amount of impurity atoms introduced into the silicon carbide film 22, and the N-type impurity concentration is lower in the side portions.

Therefore, the resistance R2 of the portion of the polycrystalline silicon film 23 and silicon carbide film 22 deposited on the side surface of the insulating film 11 is as follows.
The resistance R8 is greater than the resistance R8 of the polycrystalline silicon film 23 and silicon carbide film 22 deposited on the bottom of the opening. This increases emitter resistance.

Also, when trying to miniaturize the emitter, the bottom resistance R
1 increases, further increasing the emitter resistance in part.

On the other hand, if an attempt is made to lower the emitter resistance by increasing the impurity atomic concentration in the polycrystalline silicon film portion deposited on the side surface of the sidewall insulating film by heat treatment, the base junction will also become deeper and the cutoff frequency f will increase. This increases the performance, resulting in performance deterioration.

The present invention has been made in view of such problems, and includes:
Even if the emitter area is miniaturized, the emitter resistance does not increase.
An object of the present invention is to provide a bipolar transistor that can obtain a stable emitter electrode.

[Means for Solving the Problems] A bipolar transistor according to the present invention includes a collector region of a first conductivity type selectively formed on the surface of a semiconductor substrate, and a collector region of a first conductivity type formed in a predetermined region of the collector region. a base region of a second conductivity type; an insulating film having an opening at a predetermined position on the base region; and an N-type impurity buried on the bottom of the opening at a height of 100 to 100 mm from the surface of the base region. and a polycrystalline silicon film formed on the insulating film with a portion of the silicon carbide film buried in the opening above the silicon carbide film.

[Operations] In the present invention, the silicon carbide film and the polycrystalline silicon film are formed only on the bottom surface of the opening formed in the insulating film on the base region. Therefore, impurity atoms are uniformly added to the silicon carbide film and the polycrystalline silicon film. Therefore, even if the emitter area is miniaturized, the emitter resistance does not increase and the emitter electrode can be stably formed.

[Embodiments] Next, embodiments of the present invention will be specifically described with reference to the accompanying drawings.

FIG. 1 is a sectional view showing a bipolar transistor according to a first embodiment of the present invention. In FIG. 1, the same parts as in FIG. 3 are given the same reference numerals, and detailed explanations of those parts will be omitted. Hereinafter, the method for forming each layer will be explained, and the layer structure will be explained. A buried collector layer 2 is formed in a predetermined region of the silicon substrate 1 by selectively diffusing phosphorus atoms into the P-type silicon substrate 1 . Then, an epitaxial growth layer 3 is formed on the entire surface to a thickness of about 1 m, and a silicon oxide film 4 for element isolation is selectively formed in a predetermined region of this epitaxial growth layer 3 to a thickness of 1 to 1.2 μm. Thereby, the element formation region is insulated and isolated.

Next, a polycrystalline silicon film 5 is deposited on the entire surface by CVD for approximately 25 min.
After patterning the polycrystalline silicon film 5 by etching, phosphorus atoms are selectively diffused to form an N-type crystalline silicon substrate and a collector lead-out layer 6.

Next, boron atoms are selectively implanted into a predetermined region of this polycrystalline silicon film 5 to turn this predetermined region into a P-type subcrystalline silicon film 7. After that, an insulating film 8 with a thickness of about 300 mm is applied to the entire surface.
Deposits to a thickness of 0.

Next, an opening is selectively formed in the insulating film 8 and the P-type child-crystalline silicon film 7 in the area where the emitter is to be formed, and boron atoms are added to the surface of the epitaxial growth layer 3 and the P-type child-crystalline silicon film 7 exposed through the opening. Ion implantation is performed at an energy of 20 keV and a dose of l x 10"cm-". After that, an insulating film 11 is formed about 20 times over the entire surface including the opening.
After forming the film to a thickness of 0.00 mm, it is heat-treated at 900° C. for 30 minutes to diffuse boron from the P-type child crystalline silicon film 7 into the epitaxial growth layer 3. As a result, a compensation base region 9 is formed on the surface of the epitaxial growth layer 3, and the boron atoms for the base are activated to form a base region 10.

Next, by anisotropically etching the insulating film 11,
The insulating film 11 is left only on the side wall of the opening for forming an emitter, and the other parts of the insulating film 11 are removed.

Thereafter, a silicon carbide film 12 with a thickness of about 1000 Å is formed only on the surface of the epitaxial growth layer 3 within the opening surrounded by the sidewall insulating film 11 by CVD. An example of the conditions for forming silicon carbide film 12 by this CVD method is 5iH2C).

Using a mixture of hydrogen chloride gas and a raw material gas for silicon carbide film formation consisting of a mixed gas of and C2H,
It is sufficient to selectively form a silicon carbide film only within the opening under heat treatment conditions of 00°C.

Next, a polycrystalline silicon film 13 is formed to a thickness of about 2,000 wafers only on this silicon carbide IIu 12.

The conditions for forming this polycrystalline silicon film 13 are, for example, 5i
The raw material gas is a mixture of H2Cf2 gas and hydrogen chloride gas, and the heat treatment temperature is 800''C.

Next, arsenic is applied to this polycrystalline silicon film 13 at an energy of 70 keV 1 and a dose of L x 101016a.
After ion implantation under the conditions of ``, arsenic atoms are diffused into the polycrystalline silicon film 13 and silicon carbide film 12 by heat treatment at a temperature of 900°C. Arsenic atoms are also diffused into the base region to form an emitter region 14 within the base region 10.

Thereafter, contact holes are formed at appropriate positions on the N-type polycrystalline silicon film 5 and the P-type polycrystalline silicon film 7 in the insulating film 8. Then, an aluminum electrode 15 is selectively formed in the opening surrounded by the sidewall insulating film 11 on the emitter region 14 and in the contact hole.

As a result, the bipolar transistor shown in FIG. 1 is constructed.

In the bipolar transistor configured in this manner, the silicon carbide film 12 and polycrystalline silicon film 13 formed on the emitter region 14 are buried in the opening surrounded by the sidewall insulating film 11 on the base region 10. Therefore, it is not substantially formed on the side and top surfaces of the sidewall insulating film 11. Therefore, the polycrystalline silicon film 13 disposed between the upper aluminum electrode 15 and the emitter region 14
The thickness of the silicon carbide film 12 is uniform. Therefore, the arsenic atoms that are implanted into the polycrystalline silicon film 13 and the silicon carbide film 12 and then diffused into the films are uniformly distributed within the films. Therefore, an increase in emitter resistance is avoided, and the polycrystalline silicon film 13 for the emitter electrode can be miniaturized. Therefore, the bipolar transistor according to this embodiment is extremely effective in miniaturizing devices.

FIG. 2 is a graph showing the effect of this embodiment, and shows the relationship between the emitter resistance and the emitter area, with the horizontal axis representing the emitter area and the vertical axis representing the emitter resistance. In the case of the conventional example shown by the solid line in the figure (see Fig. 4), when the emitter area becomes smaller than 2 μm2, the emitter resistance increases significantly, whereas in the case of the embodiment shown by the broken line, the emitter area Even if it becomes smaller than 2 μm2, the emitter resistance does not increase much. In this way, in the case of this example,
The emitter area can be reduced, that is, the emitter region can be made finer without causing a significant increase in emitter resistance.

Next, a second embodiment of the present invention will be described with reference to FIG.

In this embodiment, the steps up to forming the opening surrounded by the insulating film 11 on the base region 10 are the same as those in the first embodiment.

However, in this embodiment, when selectively forming the silicon carbide film 12 and the polycrystalline silicon film 13, the silicon carbide film 12 and the polycrystalline silicon film 13 are grown by adding phosphorus atoms or arsenic atoms at a concentration of 1018 to 1022 cffl-2. Board 1
A base-emitter junction is formed at the interface between the silicon carbide film 12 and the silicon carbide film 12 . Thereafter, after selectively forming an opening in the insulating film 8, an aluminum electrode 15 is formed.

In this example, N-type impurity atoms were added during the growth of the silicon carbide film 12 and the polycrystalline silicon film 13, but after the growth of the silicon carbide film and the polycrystalline silicon film, the N-type impurity atoms were ionized. A bipolar transistor with a similar structure can be obtained by adding it by injection and diffusing it by short-time annealing using a halogen lamp or the like.

In this embodiment, since the emitter region 14 formed by diffusing N-type impurity atoms into the base region 10 in the first embodiment is not present, the depth of the base region 10 can be made shallow. Therefore, the cutoff frequency f
Since t is improved, the transistor characteristics are further improved.

[Effects of the Invention] According to the present invention, since the silicon carbide film and the polycrystalline silicon film are formed only on the bottom surface of the opening formed in the insulating film on the base region, even if the emitter area is miniaturized, An increase in emitter resistance is avoided, and an emitter electrode can be stably formed.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a bipolar transistor according to a first embodiment of the present invention, FIG. 2 is a graph diagram showing the effects of this embodiment, and FIG. 3 is a cross-sectional view showing a bipolar transistor according to a second embodiment of the present invention. FIG. 4 is a sectional view showing a conventional bipolar transistor, and FIG. 5 is a schematic diagram illustrating the drawbacks of the conventional bipolar transistor.

Claims (3)

[Claims] (1) A collector region of a first conductivity type selectively formed on the surface of a semiconductor substrate, a base region of a second conductivity type formed in a predetermined region of the collector region, and a predetermined position on the base region. an insulating film having an opening in the opening, and a silicon carbide film containing an N-type impurity buried on the bottom of the opening at a height of 100 to 1000 Å from the surface of the base region;
A bipolar transistor comprising a polycrystalline silicon film formed on the insulating film and partially buried in the opening above the silicon carbide film. (2) The bipolar transistor according to claim 1, wherein an emitter region of a first conductivity type is formed in a portion of the base region that contacts the silicon carbide film. (3) The bipolar transistor according to claim 1, wherein a base-emitter junction is formed at an interface between the base region and the silicon carbide film.