JPH04116867A - Switching element - Google Patents

Switching element

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Publication number
JPH04116867A
JPH04116867A JP2235641A JP23564190A JPH04116867A JP H04116867 A JPH04116867 A JP H04116867A JP 2235641 A JP2235641 A JP 2235641A JP 23564190 A JP23564190 A JP 23564190A JP H04116867 A JPH04116867 A JP H04116867A
Authority
JP
Japan
Prior art keywords
substrate
electrode
film
switching element
base electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2235641A
Other languages
Japanese (ja)
Inventor
Kiyoshi Takimoto
瀧本 清
Harunori Kawada
河田 春紀
Hideyuki Kawagishi
秀行 河岸
Yuuko Morikawa
森川 有子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2235641A priority Critical patent/JPH04116867A/en
Publication of JPH04116867A publication Critical patent/JPH04116867A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To stably realize switching characteristics having storing properties in an MIM element, by backing a metal thin film formed on a plane substrate with a solid retaining substrate, transferring the plane substrate surface to the metal thin film surface, and forming a substratum electrode having smoothness wherein height difference of uneveness is smaller than or equal to a specified value. CONSTITUTION:On a plane substrate 11 having smoothness, a film of gold (Au) is formed by a vacuum evaporation method, and a substratum electrode layer 12 is formed. An adhesion layer 13 is spread on the layer 12, and a solid retaining substrate 14 is stuck on the adhesion layer 13. The plane substrate 11 is exfoliated from the substratum electrode layer 12, thereby obtaining a plane electrode substrate constituted of the solid retaining substrate 14, the adhesion layer 13 and a substratum electrode layer 12. The height difference of uneveness of the electrode surface is smaller than or equal to 1nm. Said plane electrode substrate is used as carrier, and a monomolecular film 15 is accumulated on the substratum electrode layer 12 by an LB method. On the film 15, an upper electrode 16 is formed by vacuum evaporation method while the temperature of the plane electrode substrate is kept lower than or equal to a room temperature. A metal coating film 17 is formed by vacuum evaporation of gold (Au) on the upper electrode 16.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、メモリー機能を有したスイッチング素子に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a switching element having a memory function.

[従来の技術] 最近有機分子の機能性を電子デバイスなどに応用しよう
とする分子エレクトロニクスに対する関心が高まってお
り、分子電子デバイスの構築技術の一つとみられるラン
グミュア−プロジェット膜(LB膜)についての研究が
活発化してきている。LBliは有機分子を規則正しく
1分子層ずつ積層したもので1、膜厚の制御は分子長の
単位で行なうことができ、−様で均質な超薄膜を形成で
きることからこれを絶縁膜として使う多くの試みが行な
われてきた。例えば、金属・絶縁体・金属(MIM)構
造のトンネル接合素子[G。
[Prior art] Recently, interest in molecular electronics, which seeks to apply the functionality of organic molecules to electronic devices, has been increasing. Research is becoming more active. LBli is made by laminating organic molecules one molecular layer at a time1.The film thickness can be controlled in units of molecular length, and it is possible to form a -like, homogeneous ultra-thin film, so it is widely used as an insulating film. Attempts have been made. For example, a tunnel junction element with a metal-insulator-metal (MIM) structure [G.

L、Larkinset、al、著「シン・ソリッド・
フィルムズJ  (Thin  SolidFilms
)第99巻(1983年)]や金属・絶縁体・半導体(
MIS)構造の発光素子[G。
L. Larkinset, al., “Thin Solid.
Films J (Thin Solid Films
) Volume 99 (1983)] and Metals, Insulators, and Semiconductors (
MIS) structure light emitting device [G.

G、Robertset、al、著「エレクトロニクス
・レターズJ  (ElectronicsLette
rs)第20巻、489頁(1984年)コ或はスイッ
チング素子[N、J、Tho−mas  et、al、
著「エレクトロニクス・レターズJ  (Electr
onics  Let −ters)第20巻、838
頁(1984年)]がある。
Electronics Letters J, Robertset, al.
rs) Vol. 20, p. 489 (1984)
Written by “Electronics Letters J”
onics Let-ters) Volume 20, 838
Page (1984)].

従来、上記の如き検討は取り扱いが比較的容易な脂肪酸
のLB膜を中心に進められてきた。しかし最近これまで
劣るとされていた耐熱性、機械強度に対してもこれを克
服した有機材料が次々に生まれている。実際、既に本発
明者らは、これらの材料を用いたLB膜に対して、金属
等の導電性材料で両側から挟んだサンドウィッチ構造の
素子(その構成から一般に、MIM構造もしくはMIM
素子と呼ばれる)を作成し、材料物性或は電気的特性を
特徴とする特性の観察、測定を行なったところ、電気伝
導において全く新しいスイッチング現象を見出している
(特開昭63−96956号公報)。
Conventionally, the above studies have focused on fatty acid LB membranes, which are relatively easy to handle. However, recently, organic materials have been created one after another that overcome heat resistance and mechanical strength, which were previously thought to be inferior. In fact, the present inventors have already developed an LB film using these materials into an element with a sandwich structure sandwiched from both sides by conductive materials such as metals (generally called an MIM structure or MIM
By creating a device (called an element) and observing and measuring its material properties and electrical properties, we discovered a completely new switching phenomenon in electrical conduction (Japanese Patent Laid-Open No. 63-96956). .

絶!i膜をラングミュア−プロジェット法によって形成
した場合、下地電極の形状通りに単分子膜を累積し、絶
縁膜を形成でき、絶縁膜の膜厚不均一の問題は無い。
Definitely! When the i-film is formed by the Langmuir-Prodgett method, an insulating film can be formed by accumulating a monomolecular film according to the shape of the base electrode, and there is no problem of non-uniform thickness of the insulating film.

[発明が解決しようとするill!] 一方、MIM素子の下地電極は、従来、真空蒸着法やス
パッタリング法を用いて、形成されてきた。しかし、こ
れらの方法で形成した金属薄膜は多結晶膜となり、薄膜
表面の凹凸の高低差が5nm以下の平滑性を得ることは
極めて困難であった。このよ、うな下地電極上にMIM
素子を構成した場合、たとえLBliを使用しても絶縁
層の膜厚が不均一になり易く、素子に電圧を印加した際
、絶縁層中の電界が不均一となり易かりた。このため、
素子ごとの特性にバラツキが生じ、素子の設計性の向上
をさまたげる結果となっていた。
[The invention tries to solve ill! ] On the other hand, the base electrode of the MIM element has conventionally been formed using a vacuum evaporation method or a sputtering method. However, the metal thin films formed by these methods are polycrystalline films, and it is extremely difficult to obtain smoothness with a height difference of 5 nm or less on the surface of the thin film. MIM on a base electrode like this
When an element is constructed, even if LBli is used, the thickness of the insulating layer tends to be non-uniform, and when a voltage is applied to the element, the electric field in the insulating layer tends to become non-uniform. For this reason,
This results in variations in the characteristics of each element, which hinders improvements in element design.

また特に絶縁膜の膜厚がうすい場合、強電界がかかった
部分から絶縁破壊等による素子破損が起こり易かった。
Further, especially when the thickness of the insulating film is thin, element damage due to dielectric breakdown or the like is likely to occur from a portion to which a strong electric field is applied.

即ち、LBMにより絶縁膜の膜厚不均一に由来する素子
の不安定は解決されたが、下地電極の形状、即ち、電極
面の凸部や凹部の周辺のエッチの存在によフて、生じる
電界集中に由来した素子の不安定性については未解決で
あった。具体的には、下地電極表面の凸部や凹部周辺の
エッヂ付近には局所的な強電界が生じ易く、スイッチン
グ素子を長時間駆動した場合、この部分から絶縁破壊等
による素子破損によって素子寿命に満足な結果が得られ
ないことが多かった。
In other words, although the instability of the device caused by the non-uniform thickness of the insulating film has been solved by LBM, the instability caused by the shape of the underlying electrode, that is, the presence of etches around the protrusions and depressions on the electrode surface, causes instability. The instability of the device due to electric field concentration remained unresolved. Specifically, strong local electric fields are likely to occur near the edges around the convex and concave portions of the surface of the base electrode, and when a switching element is driven for a long time, the life of the element may be shortened due to damage to the element due to dielectric breakdown, etc. Satisfactory results were often not obtained.

また、平滑な電極表面を得るためには、金属のエピタキ
シャル成長による薄膜形成等の方法が挙げられるが、利
用で診る基板及び金属材料に大きな制約があり、上記M
IM素子に容易に使用することができなかった。
In addition, in order to obtain a smooth electrode surface, there are methods such as forming a thin film by epitaxial growth of metal, but there are major restrictions on the substrate and metal material that can be used.
It could not be easily used in IM devices.

[i!題を解決するための手段及び作用]本発明者らは
、上記問題点に鑑み鋭意検討を行なった結果、本発明に
至ったものである。
[i! Means and Effects for Solving the Problem] The present inventors have conducted extensive studies in view of the above problems, and as a result, have arrived at the present invention.

即ち、本発明は、一対の電極間に周期的な層構造を有す
る有機絶縁体を有し、スイッチング特性に対してメモリ
ー性を有するスイッチング素子であって、前記周期的な
層構造を有する有機絶縁体が表面凹凸の高低差1nm以
下の下地電極上に形成されていることを特徴とするスイ
ッチング素子である。
That is, the present invention provides a switching element that has an organic insulator having a periodic layer structure between a pair of electrodes and has a memory property for switching characteristics, wherein the organic insulator has a periodic layer structure. The switching element is characterized in that the body is formed on a base electrode with a height difference of 1 nm or less in surface irregularities.

以下、本発明の詳細な説明する。The present invention will be explained in detail below.

周期的な層構造を有する有機絶縁体とは、例えば、LB
法により形成された有機単分子膜又は有機単分子累積膜
、MBE法により形成された有機薄膜等が挙げられ、本
発明の特徴である下地電極の平滑性を有効に活用するた
めには、LB法により形成された有・機単分子膜又は有
機単分子累積膜が好ましい。具体的には、スクアリリウ
ム−ビス−6−オクチルアズレン単分子膜、又は単分子
累積膜、ポリイミド単分子膜又は単分子累積膜、フタロ
シアニン単分子膜又は単分子累積膜等が挙げられる。有
機絶縁体の厚みは、lnm−1100nが好ましい。
The organic insulator having a periodic layer structure is, for example, LB
Examples include organic monomolecular films or organic monomolecular cumulative films formed by the MBE method, and organic thin films formed by the MBE method. An organic monomolecular film or an organic monomolecular cumulative film formed by a method is preferable. Specifically, a squarylium-bis-6-octylazulene monolayer, a monomolecular cumulative film, a polyimide monomolecular film or a monomolecular cumulative film, a phthalocyanine monomolecular film or a monomolecular cumulative film, etc. may be mentioned. The thickness of the organic insulator is preferably lnm-1100n.

一対の電極とは上部電極、下地電極であり、本発明のス
イッチング素子は下地電極として、電極表面の凹凸の高
低差がlnm以下の電極を用いることを特徴とする。
The pair of electrodes is an upper electrode and a base electrode, and the switching element of the present invention is characterized in that an electrode having a height difference of 1 nm or less in unevenness on the electrode surface is used as the base electrode.

以下、下地電極の形成方法を説明する。下地電極は平滑
基板表面を転写することによって形成される。即ち、平
滑表面を有する平滑基板上に形成された金属薄膜を固体
支持基板で裏打ちし、平滑基板を剥離することにより平
滑基板表面を金属薄膜表面に転写して、凹凸の高低差1
nm以下の平滑性を有する下地電極を得るのである。こ
の際の金属薄膜の形成方法は、真空蒸着法やスパッタリ
ング法等従来公知の薄膜形成技術でよい。
The method for forming the base electrode will be described below. The base electrode is formed by transferring the surface of the smooth substrate. That is, a metal thin film formed on a smooth substrate having a smooth surface is backed with a solid support substrate, and by peeling off the smooth substrate, the smooth substrate surface is transferred to the metal thin film surface, and the height difference of unevenness is 1.
A base electrode having smoothness of less than nm is obtained. The method for forming the metal thin film at this time may be a conventionally known thin film forming technique such as a vacuum evaporation method or a sputtering method.

平滑基板としては、平滑性に優れていればいかなる材料
でも良いが、表面の凹凸の高低差がlnm以下の基板が
好ましい。係る平滑表面を提供する材料として、例えば
、マイカなどの単結晶基板の劈開面、フロートガラス、
#7059フュージョン、溶融石英などの主要面が溶融
により形成されたものなどが挙げられるが、好ましくは
、マイカなどの単結晶基板の劈開面が挙げられる。
The smooth substrate may be made of any material as long as it has excellent smoothness, but a substrate with a surface unevenness having a height difference of 1 nm or less is preferable. Materials that provide such a smooth surface include, for example, the cleavage plane of a single crystal substrate such as mica, float glass,
Examples include #7059 fusion, fused silica, etc. whose main surface is formed by melting, and preferably a cleaved surface of a single crystal substrate such as mica.

下地電極材料としては、高い導電性を有するもので、更
に平滑基板と密着性の良くない材料が好ましい。例えば
、Au、Ag、Pt、Pd、などの金属、及びAu−P
d、Pt−Pdなどの合金が挙げられるが、貴金属、貴
金属合金が好ましい。また、これらの金属、合金を含む
多層膜としてもよい。
The base electrode material is preferably a material that has high conductivity and also has poor adhesion to the smooth substrate. For example, metals such as Au, Ag, Pt, Pd, and Au-P
Examples include alloys such as Pt-Pd and Pt-Pd, but noble metals and noble metal alloys are preferred. Further, a multilayer film containing these metals and alloys may be used.

固体支持基板を裏打ちする際には適当な接着層を介する
のが簡便であるが、用いる材料によっては直接基板と接
合させる共晶接合によって強い接着力が得られる。接着
層としては無溶剤型の体積収縮がないものが好ましく、
例えばエポキシ樹脂系、α−シアノアクリレート系など
の絶縁性接着剤やエボテック・銀シリーズなどの導電性
接着剤などが好ましい。また、直接接合させる場合、接
着層は不要である。
When backing a solid support substrate, it is convenient to use a suitable adhesive layer, but depending on the material used, strong adhesive force can be obtained by eutectic bonding, which is directly bonded to the substrate. The adhesive layer is preferably solvent-free and does not have volumetric shrinkage.
For example, insulating adhesives such as epoxy resin-based and α-cyanoacrylate-based adhesives, and conductive adhesives such as Evotec Silver Series are preferred. Moreover, when directly bonding, an adhesive layer is not necessary.

固体支持基板としては、接着層を介する場合は、金属、
ガラス、セラミックス、プラスチック材料等いずれの材
料でも良いが、直接支持基板を電極と接合させる場合は
、比較的平滑な材料を用いるのが好ましい。また、電鋳
によって厚い金属層を形成して支持基板とすることも可
能である。
As a solid support substrate, if an adhesive layer is used, metal,
Any material such as glass, ceramics, or plastic material may be used, but if the supporting substrate is directly bonded to the electrode, it is preferable to use a relatively smooth material. It is also possible to form a thick metal layer by electroforming and use it as a support substrate.

次に上部電極材料としては、前述の下地電極と同様の材
料が使用でき、下地電極と同種の金属を使用してもよい
し、異なる金属を使用してもよい。
Next, as the upper electrode material, the same material as the base electrode described above can be used, and the same type of metal as the base electrode may be used, or a different metal may be used.

また、本発明のスイッチング素子は、前記有機絶縁体と
は別な第2の絶縁層を形成してもよ(、第2の絶縁層に
より、上部、下地電極間の通電領域を制限できる。第2
の絶縁層としては例えばSiO□+ S f s N4
 、 Al2x Os等を使用でき、厚みは1100n
〜500nmが好ましい。
Further, in the switching element of the present invention, a second insulating layer separate from the organic insulator may be formed (the second insulating layer can limit the current-carrying area between the upper and base electrodes. 2
As an insulating layer, for example, SiO□+S f s N4
, Al2x Os, etc. can be used, and the thickness is 1100n.
~500 nm is preferred.

形成方法は従来公知の薄膜形成技術で充分である。As for the forming method, conventionally known thin film forming techniques are sufficient.

[実施例] 以下、実施例に従って、具体的に本発明の説明をする。[Example] Hereinafter, the present invention will be specifically explained according to Examples.

東if糺1 大気中でマイカ板を劈開して得た0、5nm以下の平滑
性を有する平滑基板11上に、真空蒸着法により金(A
u)を製膜し、下地電極層12を形成した。(第1図(
b))該下地電極層12は平滑基板温度を室温に保ち蒸
着速度10人/ s e c 、到達圧力2X10−’
Torr。
Toif Glue 1 Gold (A
u) was formed into a film to form the base electrode layer 12. (Figure 1 (
b)) The base electrode layer 12 is made of a smooth substrate with a deposition rate of 10 persons/sec and an ultimate pressure of 2×10-' while keeping the temperature of the substrate at room temperature.
Torr.

膜厚2000人の条件で行なった。続いて接着層13(
セメダイン製、ハイス−パー5(エポキシ樹脂系))を
下地電極層12上に塗布し、固体支持基板14を接着層
13上に貼り付ける。第1図(d)該固体支持基板14
の接着は加圧力5kg/cm”、温度23℃、硬化時間
24時間の条件で行なった。その後、平滑基板11を下
地電極層12から引き剥し、固体支持基板14.接着層
13、下地電極層12からなる平滑電極基板を得た。(
第1図(e) 係る平滑電極基板を担体として下地電極層12上にLB
法によりスクアリリウム−ビス−6−オクチルアズレン
(SOAZ)単分子膜15の累積を行なった。(第1図
(f))以下にその詳細を記す。
The test was conducted under the condition that the film thickness was 2000. Next, the adhesive layer 13 (
Hi-Super 5 (epoxy resin system) manufactured by Cemedine is applied onto the base electrode layer 12, and the solid support substrate 14 is attached onto the adhesive layer 13. FIG. 1(d) The solid support substrate 14
The bonding was carried out under the conditions of a pressure of 5 kg/cm'', a temperature of 23° C., and a curing time of 24 hours. Thereafter, the smooth substrate 11 was peeled off from the base electrode layer 12, and the solid support substrate 14, adhesive layer 13, and base electrode layer were bonded. A smooth electrode substrate consisting of 12 was obtained. (
FIG. 1(e) LB is placed on the base electrode layer 12 using the smooth electrode substrate as a carrier.
A squarylium-bis-6-octylazulene (SOAZ) monomolecular film 15 was deposited by the method. (FIG. 1(f)) The details are described below.

5OAZを濃度0.2mg/mJ2で溶かしたクロロホ
ルム溶液を水温20℃の純水から成る水相上に展開し、
水面上に単分子膜を形成した。
A chloroform solution in which 5OAZ was dissolved at a concentration of 0.2 mg/mJ was developed on an aqueous phase consisting of pure water at a water temperature of 20 °C,
A monomolecular film was formed on the water surface.

溶媒の蒸発除去を待って係る単分子膜の表面圧を20 
m N / mまで高め、更にこれを一定に保ちながら
前記平滑電極基板を水面を横切る方向に速度10mm/
分で静かに浸漬した後、5mm/分で静かに引きあげ、
2層、単分子膜をY型に累積した。係る操作を適当回数
繰り返すことによって前記基板上に2.4.8,12,
20,30.40層の7種の単分子膜をY型に累積した
Waiting for the solvent to evaporate, the surface pressure of the monomolecular film is reduced to 20
mN/m, and while keeping this constant, the smooth electrode substrate was moved at a speed of 10 mm/m in the direction across the water surface.
After gently dipping for 1 minute, gently pull it out at 5 mm/minute.
Two layers, a monolayer, were stacked in a Y shape. By repeating the above operation an appropriate number of times, 2.4.8, 12,
Seven types of monomolecular films of 20, 30, and 40 layers were accumulated in a Y shape.

次に係る膜面15上にアルミニウム(八β)よりなる上
部電極16 (1500人)を平滑電極基板温度を室温
以下に保持して真空蒸着法により形成し、続いて金(A
u)(500人)を前記上部電極16上に真空蒸着法に
より形成して金属被覆17とした。(第1図(g))上
部電極16の大きさは1mmφとした。
Next, an upper electrode 16 (1500 electrodes) made of aluminum (8β) is formed on the film surface 15 by vacuum evaporation while keeping the smooth electrode substrate temperature below room temperature, and then gold (A
u) (500 people) was formed on the upper electrode 16 by vacuum evaporation to form the metal coating 17. (FIG. 1(g)) The size of the upper electrode 16 was 1 mmφ.

以上の様にして作成した試料の上下電極間に電圧を印加
したときの電流特性(I−V特性)を測定したところ、
本発明者らが、特開昭63−96956号公報において
開示したものと同じメモリー性のスイッチング特性が観
測された。
When we measured the current characteristics (IV characteristics) when voltage was applied between the upper and lower electrodes of the sample prepared as described above, we found that
The same memory-like switching characteristics as those disclosed by the present inventors in Japanese Patent Application Laid-Open No. 63-96956 were observed.

(第5図)係る素子は電圧を印加しない状態でも低抵抗
なON状態と高抵抗なOFF状態のいずれかを保持させ
ることができ、保存安定性は極めて良好であった。また
両状態の抵抗比は6桁程度あるいはそれ以上であった。
(FIG. 5) Such an element could maintain either a low-resistance ON state or a high-resistance OFF state even when no voltage was applied, and its storage stability was extremely good. Moreover, the resistance ratio in both states was about 6 digits or more.

係る素子に交流電圧を印加して連続的に0N10FF両
状態間の遷移を長時間行なわせたが、従来の下地電極の
表面凹凸が大きい素子に比し、ON10 F F遷移の
安定性が増し、ことに、これまでスイッチング特性が不
安定であった、5OAZ2層から成る素子において、効
果が顕著で、安定なスイッチング特性が発現されるよう
になった。更に局所的な電界集中に由来すると思われる
素子破損も極めて起こりに((なり、寿命が太き(延び
た。
An alternating current voltage was applied to such a device to cause it to continuously transition between the 0N10FF states for a long period of time, and the stability of the ON10FF transition was increased compared to a conventional device with large surface irregularities on the base electrode. Particularly, the effect is remarkable and stable switching characteristics are now exhibited in a device consisting of two 5OAZ layers, which had hitherto had unstable switching characteristics. Furthermore, element damage, which is thought to be caused by localized electric field concentration, is extremely unlikely (((), and the lifespan is extended (()).

IL玉ユ 大気中でマイカ板を劈開して得た0、5層m以下の平滑
性を有する平滑基板21上に、真空蒸着法により金(A
u)を製膜し、下地電極層22を形成した。(第2図(
b))該下地電極層22は平滑基板温度を400℃に保
ち、蒸着速度10人/ s e c 、到達圧力2XI
O−’Torr、膜厚1.0μmの条件で行なった。続
いて、シリコンウェハーを固体支持基板24として、ヒ
ータにより加熱し、一定の温度に保ちながら平滑基板2
1上に形成された下地電極層22の表面を固体支持基板
24に軽(こすり付けることにより、下地電極層22と
固体支持基板24を共晶接合させた。
Gold (A
u) was formed into a film to form the base electrode layer 22. (Figure 2 (
b)) The base electrode layer 22 is made of a smooth substrate with a temperature of 400°C, a deposition rate of 10 people/sec, and an ultimate pressure of 2XI.
The test was carried out under the conditions of O-' Torr and film thickness of 1.0 μm. Next, the silicon wafer is used as the solid support substrate 24 and heated with a heater, and the smooth substrate 2 is heated while maintaining the temperature at a constant temperature.
By lightly rubbing the surface of the base electrode layer 22 formed on the solid support substrate 24, the base electrode layer 22 and the solid support substrate 24 were eutectic bonded.

(第2図(C))係る接合は固体支持基板温度を400
℃、加圧力2kg/cm”、保持時間1分の条件で行な
った。しかる後に、平滑基板21を下地電極層22から
引き剥し、固体支持基板24及び下地電極層22から成
る平滑電極基板を得た。(第2図(d)) 係る平滑電極基板を担体として下地電極層22上にLB
法によりポリイミド単分子累積膜25を形成した。(第
2図(e))以下にその詳細を記す。(1)式に示すポ
リアミック酸(分子量約20万)をN、N−ジメチルア
セトアミド溶媒に溶解させた(単量体換算濃度I X 
10−”M)後、別途調整したN、N−ジメチルヘキサ
デシルアミンの同溶媒によるI X 10−”M溶液と
を1=2(V/V)に混合して(2)式に示すポリアミ
ック酸ヘキサデシルアミン塩溶液を調整した。
(Fig. 2 (C)) Such bonding is performed by increasing the temperature of the solid support substrate to 400°C.
℃, a pressure of 2 kg/cm", and a holding time of 1 minute. After that, the smooth substrate 21 was peeled off from the base electrode layer 22 to obtain a smooth electrode substrate consisting of the solid support substrate 24 and the base electrode layer 22. (FIG. 2(d)) LB was formed on the base electrode layer 22 using the smooth electrode substrate as a carrier.
A polyimide monomolecular cumulative film 25 was formed by the method. (FIG. 2(e)) The details are described below. Polyamic acid (molecular weight approximately 200,000) shown in formula (1) was dissolved in N,N-dimethylacetamide solvent (monomer equivalent concentration I
After 10-"M), a separately prepared IX 10-"M solution of N,N-dimethylhexadecylamine in the same solvent was mixed at a ratio of 1=2 (V/V) to form a polyamic compound represented by formula (2). An acid hexadecylamine salt solution was prepared.

2層のY型単分子累積膜を作成した。係る操作を繰り返
して、4,8,12,18,24,30゜42.60層
の8種類の累積膜を作成した。
A two-layer Y-type monomolecular cumulative film was created. By repeating this operation, eight types of cumulative films of 4, 8, 12, 18, 24, 30° and 42.60 layers were created.

次に係る基板を300℃で10分間の熱処理を行ない、
ポリアミック酸ヘキサデシルアミン塩をイミド化しく式
(3)) %式% 係る溶液を水温20℃の純水から成る水相上に展開し、
水面上に単分子膜を形成した。溶媒除去後、表面圧を2
5 m N / mに迄高めた0表面圧を一定に保ち乍
ら、前記平滑電極基板を水面を横切る方向に速度5 m
 m / m i nで静かに浸漬した後、続いて5m
m/minで静かに引き上げてポリイミド単分子累積膜
を得た。
Next, heat treatment is performed on the substrate at 300°C for 10 minutes,
When polyamic acid hexadecylamine salt is imidized, the solution is developed on an aqueous phase consisting of pure water with a water temperature of 20 ° C.
A monomolecular film was formed on the water surface. After removing the solvent, reduce the surface pressure to 2
The smooth electrode substrate was moved at a speed of 5 m in the direction across the water surface while keeping the zero surface pressure raised to 5 m N/m constant.
m/min followed by 5 m
It was gently pulled up at a speed of m/min to obtain a polyimide monomolecular cumulative film.

係るポリイミド単分子累積膜25上に第2の絶縁層28
としてSiO□を真空蒸着法を用いて厚さ3000人堆
積した。次にポジ型レジスト材料(商標名AZ1370
)をスピンナー塗布し、膜厚を1.2μmとする。これ
をプリベークしたのち、露光、現像、ボストベークを行
なう。その後HF : NH4F=1 : 7の溶液で
エツチングを行ないS i O*をバターニングし、次
にアセトン超音波処理、DMF超音波処理、純水洗浄に
よりレジストを剥離し、ベーキングを行なった。
A second insulating layer 28 is formed on the polyimide monomolecular cumulative film 25.
As a result, SiO□ was deposited to a thickness of 3,000 yen using a vacuum evaporation method. Next, positive resist material (trade name AZ1370)
) was applied with a spinner to a film thickness of 1.2 μm. After prebaking this, exposure, development, and post baking are performed. Thereafter, etching was performed with a solution of HF:NH4F=1:7 to butteren the SiO*, and then the resist was removed by acetone ultrasonic treatment, DMF ultrasonic treatment, and pure water cleaning, and baking was performed.

以上の工程によって1mmφから10μmφまでの種々
の直径を有するポリイミド単分子累積膜25の露出部が
形成され、他がS i O2膜28によって被覆された
構造を得た。(第2図(g))その後、真空蒸着法によ
って、第2図(h)に示すようにポリイミド単分子累積
膜25の露出部をおおうアルミニウム(Aβ)の上部電
極26(5000人)を形成した。
Through the above steps, a structure was obtained in which exposed portions of the polyimide monomolecular cumulative film 25 having various diameters from 1 mmφ to 10 μmφ were formed, and the other portions were covered with the SiO2 film 28. (Fig. 2 (g)) Then, as shown in Fig. 2 (h), an upper electrode 26 (5000 electrodes) of aluminum (Aβ) is formed to cover the exposed part of the polyimide monomolecular cumulative film 25 by vacuum evaporation. did.

以上の様にして作成した試料の上下電極間に電圧を印加
した時の、電流特性(I−V特性)を測定したところ、
実施例1と同様なメモリー性のスイッチング特性が観測
され、6桁程度の0N10FF比が得られた。更に交流
電圧を印加しての連続的なON10 F F遷移の長時
間駆動に対する安定性も従来の表面凹凸の大きい下地電
極を有するスイッチング素子に比し、増していることを
確認した。特に、これまで不安定なスイッチング特性し
か示さなかった4層、8層の試料に対しても安定なスイ
ッチング特性が得られた。更に、局所的な電界集中に由
来すると思われる素子破損も極めて起こりに((なり、
素子寿命も大幅に延長できた。
When a voltage was applied between the upper and lower electrodes of the sample prepared as described above, the current characteristics (IV characteristics) were measured.
Memory switching characteristics similar to those of Example 1 were observed, and an 0N10FF ratio of about 6 digits was obtained. Furthermore, it was confirmed that the stability of continuous ON10 F F transitions over long periods of time when AC voltage is applied is also improved compared to conventional switching elements having base electrodes with large surface irregularities. In particular, stable switching characteristics were obtained even for 4-layer and 8-layer samples, which had previously shown only unstable switching characteristics. Furthermore, element damage, which is thought to be caused by localized electric field concentration, is extremely unlikely.
The device life was also significantly extended.

失」1粗且 洗浄した溶融石英を固体支持基板34とし、金(Au)
を真空蒸着法により係る固体支持基板34上に製膜し、
下地電極層32を形成した。
Rough and cleaned fused quartz is used as the solid support substrate 34, and gold (Au) is used as the solid support substrate 34.
A film is formed on the solid support substrate 34 by a vacuum evaporation method,
A base electrode layer 32 was formed.

該下地電極層32は固体支持基板温度を室温に保ち、蒸
着速度10人/ s e c 、到達圧力2×10−’
Torr、膜厚500膜厚5丁00(b))続いて大気
中で劈開したマイカ板を平滑基板31とし、下地電極3
2上にのせプレスを行なう。係るプレスは、窒素雰囲気
中、加圧力10kg/am”、温度500℃、1時間の
条件で行なった。(第3図(C))しかる後に平滑基板
31を下地電極層32から引き剥すことにより、下地電
極層32及び固体支持基板34から成る平滑電極基板を
得た。(第3図(d))次に実施例2と同様にして下地
電極層32上にポリイミド単分子累積膜35を形成した
。(第3図(e)) 係るポリイミド単分子累積膜上に感光性ポリイミド(商
標名PL−1200)を塗布した。続いて、プリベーク
、露光、現像、キュアを行ない、実施例2と同様な1m
mφから10μmφの直径を有するポリイミド単分子累
積膜35の露出部を形成した。この時、上記パターン形
成に用いたポリイミド膜35の膜厚が3000人になる
様にした。(第3図(g)) 係るポリイミド膜上全面に真空蒸着法によってアルミニ
ウム(Aβ)を膜厚5000人堆積させた。(第3図(
h))次にポジ型レジスト(商標OMR−83)を膜厚
1.2μmとなる様にスピナー塗布し、露光、現像、ボ
ストベークを行ない、その後、H,PO4:HNOs 
 :CH3CO0H:H20=16:1:2:1の溶液
でAβを所望のパターンにエツチングする。係る基板を
アセトン超音波処理、DMF超音波処理、純水洗浄によ
りレジストを剥離し、上部電極36を形成した。係る上
部電極36の幅はポリイミド膜35に形成された、それ
ぞれの開ロバターンより大きく、ポリイミド単分子累積
膜35の露出部をおおうものである。(第3図(i))
以上の様にして作成された試料の上下電極間に電圧を印
加した時の電流特性(I−V特性)を測定した所、実施
例1と同様なメモリー性のスイッチング特性が観測され
、6桁程度のON10 F F比が得られた6更に交流
電圧を印加しての連続的なON10 F F遷移の長時
間駆動に対する安定性も従来の表面凹凸の大きい下地電
極を有するスイッチング素子に比し、実施例2と同様に
全ての素子について増していることを確認した。
The base electrode layer 32 maintains the temperature of the solid support substrate at room temperature, the deposition rate is 10 persons/sec, and the ultimate pressure is 2 x 10-'.
Torr, film thickness 500 film thickness 5 tons 00 (b)) Next, a mica plate cleaved in the atmosphere was used as a smooth substrate 31, and a base electrode 3
Place it on top of 2 and press. This pressing was carried out in a nitrogen atmosphere at a pressure of 10 kg/am'' and a temperature of 500° C. for 1 hour. A smooth electrode substrate consisting of a base electrode layer 32 and a solid support substrate 34 was obtained (FIG. 3(d)) Next, a polyimide monomolecular cumulative film 35 was formed on the base electrode layer 32 in the same manner as in Example 2. (Figure 3(e)) A photosensitive polyimide (trade name PL-1200) was coated on the polyimide monomolecular cumulative film.Subsequently, prebaking, exposure, development, and curing were performed in the same manner as in Example 2. 1m
An exposed portion of the polyimide monomolecular cumulative film 35 having a diameter of mφ to 10 μmφ was formed. At this time, the thickness of the polyimide film 35 used for the pattern formation was set to 3,000 layers. (FIG. 3(g)) Aluminum (Aβ) was deposited to a thickness of 5000 on the entire surface of the polyimide film by vacuum evaporation. (Figure 3 (
h)) Next, a positive resist (trademark OMR-83) was applied with a spinner to a film thickness of 1.2 μm, exposed, developed and post-baked, and then H,PO4:HNOs
Etch Aβ into a desired pattern using a solution of :CH3CO0H:H20=16:1:2:1. The resist was removed from the substrate by acetone ultrasonic treatment, DMF ultrasonic treatment, and pure water cleaning, and the upper electrode 36 was formed. The width of the upper electrode 36 is larger than each open pattern formed on the polyimide film 35, and covers the exposed portion of the polyimide monomolecular cumulative film 35. (Figure 3(i))
When we measured the current characteristics (IV characteristics) when a voltage was applied between the upper and lower electrodes of the sample prepared as described above, we observed a memory switching characteristic similar to that in Example 1, and 6 orders of magnitude. In addition, the stability of continuous ON10 F F transitions for long periods of time when an AC voltage is applied is also higher than that of conventional switching elements having base electrodes with large surface irregularities. As in Example 2, it was confirmed that the increase was observed in all elements.

支五土A 大気中でマイカ板を劈開し平滑基板41とし、該平滑基
板41上に真空蒸着法により金−パラジウム(Au−P
d)を成膜し下地電極層42を形成した。(第4図(b
))該下地電極層42は平滑基板温度を室温に保ち、蒸
着速度10人/ s e c 、到達圧力2X10−’
  Torr、膜厚1000人の条件で行なった。続い
て下地電極層42上にニッケル(Ni)を電鋳により形
成し固体支持基板44・とする。係る電鋳はワット浴を
用いて温度を50’Cに保ち、電流密度0.06A/a
m” 、電鋳時間2時間の条件で行ない、厚さ1100
LLを得た。(第4図(C))次に平滑基板41を下地
電極層42から引き剥し、固体支持基板44及び下地電
極層42からなる平滑電極基板を得た。(第4図(d)
) 続いて、実施例1と同様にして5OAZ単分子累積膜4
5、及び上部電極46、金属被覆47を形成した。(第
4図(e)、(f)) 係る素子においても実施例1と同様に良好なスイッチン
グ特性が得られた。
Shigoto A A mica plate is cleaved in the air to form a smooth substrate 41, and gold-palladium (Au-P) is deposited on the smooth substrate 41 by vacuum evaporation.
d) to form a base electrode layer 42. (Figure 4(b)
)) The base electrode layer 42 is made of a smooth substrate with a temperature of room temperature, a deposition rate of 10 persons/sec, and an ultimate pressure of 2×10−'.
The test was carried out under the conditions of Torr and film thickness of 1000 people. Subsequently, nickel (Ni) is formed on the base electrode layer 42 by electroforming to form a solid support substrate 44. Such electroforming uses a Watts bath to maintain the temperature at 50'C, and the current density is 0.06A/a.
m", electroforming time 2 hours, thickness 1100
I got LL. (FIG. 4(C)) Next, the smooth substrate 41 was peeled off from the underlying electrode layer 42 to obtain a smooth electrode substrate consisting of the solid support substrate 44 and the underlying electrode layer 42. (Figure 4(d)
) Subsequently, in the same manner as in Example 1, a 5OAZ monomolecular cumulative film 4 was formed.
5, an upper electrode 46, and a metal coating 47 were formed. (FIGS. 4(e) and (f)) As with Example 1, good switching characteristics were obtained in this element as well.

[発明の効果] 以上、説明したように、表面凹凸がlnm以下の平滑面
を有する電極基板をMIM素子の下地電極として用いる
ことにより、本発明者らが開示した、周期的な層構造を
有する有機薄膜を絶縁層としたMIM素子におけるメモ
リ・−性を有するスイッチング特性を、特に有機絶縁層
の膜厚を薄い領域で更に安定に発現させることが可能と
なった。また、2つのメモリー状態間の抵抗比、即ちO
N10 F F比が従来に比して大きくなるとともにO
N10 F F間の遷移を長時間、連続的におこさせた
場合も局所的な電界集中に由来すると思われる素子破損
が起こりにくくなり、素子寿命を大きく延ばすことが可
能になった。
[Effects of the Invention] As explained above, by using an electrode substrate having a smooth surface with surface irregularities of 1 nm or less as a base electrode of an MIM element, it is possible to obtain a material having the periodic layer structure disclosed by the present inventors. It has become possible to more stably exhibit switching characteristics having memory properties in an MIM element using an organic thin film as an insulating layer, especially in a region where the thickness of the organic insulating layer is thin. Also, the resistance ratio between two memory states, i.e., O
N10 F As the F ratio becomes larger than before, O
Even when the transition between N10F and F is made to occur continuously for a long time, element damage, which is thought to be caused by local electric field concentration, becomes less likely to occur, making it possible to significantly extend the element life.

更に、係る平滑電極基板は、平滑基板の表面形状を転写
することにより形成するため、従来の方法に比べ、電極
材料や基板に対する制約が少なく、容易に形成できるよ
うになり、MIM素子への応用が容易になった。
Furthermore, since such a smooth electrode substrate is formed by transferring the surface shape of a smooth substrate, there are fewer restrictions on electrode materials and substrates than in conventional methods, and it can be easily formed, making it suitable for application to MIM devices. has become easier.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図から第4図は、各実施例における素子の製造工程
を示し、第5図は本発明のMIM素子で得られた電流電
圧特性(1−V特性)を示す。 11.21,31.41  平滑基板 12.22,32.42  下地電極層13 接着層 14.24,34.44  固体支持基板15.25,
35.45  有機絶縁層16.26.・36.46 
 上部電極17.47  金属被覆 28.38  第2の絶縁層
1 to 4 show the manufacturing process of the device in each example, and FIG. 5 shows the current-voltage characteristics (1-V characteristics) obtained with the MIM device of the present invention. 11.21, 31.41 Smooth substrate 12.22, 32.42 Base electrode layer 13 Adhesive layer 14.24, 34.44 Solid support substrate 15.25,
35.45 Organic Insulating Layer 16.26.・36.46
Upper electrode 17.47 Metal coating 28.38 Second insulating layer

Claims (9)

【特許請求の範囲】[Claims] (1)一対の電極間に周期的な層構造を有する有機絶縁
体を有し、スイッチング特性に対してメモリー性を有す
るスイッチング素子であって、前記周期的な層構造を、
有する有機絶縁体が表面凹凸の高低差1nm以下の下地
電極上に形成されていることを特徴とするスイッチング
素子。
(1) A switching element having an organic insulator having a periodic layer structure between a pair of electrodes and having a memory property for switching characteristics, the periodic layer structure comprising:
1. A switching element comprising: an organic insulator formed on a base electrode having a surface unevenness having a height difference of 1 nm or less.
(2)下地電極表面が平滑基板の表面形状の転写により
形成されることを特徴とする特許請求の範囲第1項記載
のスイッチング素子。
(2) The switching element according to claim 1, wherein the base electrode surface is formed by transferring the surface shape of a smooth substrate.
(3)下地電極材料が貴金属であることを特徴とする特
許請求の範囲第1項記載のスイッチング素子。
(3) The switching element according to claim 1, wherein the base electrode material is a noble metal.
(4)下地電極材料が貴金属合金であることを特徴とす
る特許請求の範囲第1項記載のスイッチング素子。
(4) The switching element according to claim 1, wherein the base electrode material is a noble metal alloy.
(5)下地電極材料が貴金属又は貴金属合金を含む多層
膜であることを特徴とする特許請求の範囲第1項記載の
スイッチング素子。
(5) The switching element according to claim 1, wherein the base electrode material is a multilayer film containing a noble metal or a noble metal alloy.
(6)平滑基板が劈開した結晶基板であることを特徴と
する特許請求の範囲第1項記載のスイッチング素子。
(6) The switching element according to claim 1, wherein the smooth substrate is a cleaved crystal substrate.
(7)平滑基板の主要面が溶融により形成されたことを
特徴とする特許請求の範囲第1項記載のスイッチング素
子。
(7) The switching element according to claim 1, wherein the main surface of the smooth substrate is formed by melting.
(8)周期的な層構造を有する有機絶縁体がラングミュ
ア=ブロジェット法によって形成されたことを特徴とす
る特許請求の範囲第1項記載のスイッチング素子。
(8) The switching element according to claim 1, wherein the organic insulator having a periodic layer structure is formed by the Langmuir-Blodgett method.
(9)一対の電極間に周期的な層構造を有する有機絶縁
体と別な第2の絶縁層を有することを特徴とする特許請
求の範囲第1項記載のスイッチング素子。
(9) The switching element according to claim 1, further comprising a second insulating layer separate from the organic insulator having a periodic layer structure between the pair of electrodes.
JP2235641A 1990-09-07 1990-09-07 Switching element Pending JPH04116867A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2235641A JPH04116867A (en) 1990-09-07 1990-09-07 Switching element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2235641A JPH04116867A (en) 1990-09-07 1990-09-07 Switching element

Publications (1)

Publication Number Publication Date
JPH04116867A true JPH04116867A (en) 1992-04-17

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2235641A Pending JPH04116867A (en) 1990-09-07 1990-09-07 Switching element

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Country Link
JP (1) JPH04116867A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19538128C1 (en) * 1995-10-13 1997-02-27 Lueder Ernst Method of manufacturing an electronic switching element
US11042117B2 (en) 2015-02-27 2021-06-22 Canon Kabushiki Kaisha Cartridge

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19538128C1 (en) * 1995-10-13 1997-02-27 Lueder Ernst Method of manufacturing an electronic switching element
US11042117B2 (en) 2015-02-27 2021-06-22 Canon Kabushiki Kaisha Cartridge

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